| cy_pci.c (90102) | cy_pci.c (92467) |
|---|---|
| 1/* 2 * Copyright (c) 1996, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/* 2 * Copyright (c) 1996, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/cy/cy_pci.c 90102 2002-02-02 02:22:51Z bde $ | 27 * $FreeBSD: head/sys/dev/cy/cy_pci.c 92467 2002-03-17 04:10:38Z bde $ |
| 28 */ 29 30/* 31 * Cyclades Y PCI serial interface driver 32 */ 33 34#include "opt_cy_pci_fastintr.h" 35 --- 14 unchanged lines hidden (view full) --- 50#define CY_PCI_BASE_ADDR0 0x10 51#define CY_PCI_BASE_ADDR1 0x14 52#define CY_PCI_BASE_ADDR2 0x18 53 54#define CY_PLX_9050_ICS 0x4c 55#define CY_PLX_9060_ICS 0x68 56#define CY_PLX_9050_ICS_IENABLE 0x040 57#define CY_PLX_9050_ICS_LOCAL_IENABLE 0x001 | 28 */ 29 30/* 31 * Cyclades Y PCI serial interface driver 32 */ 33 34#include "opt_cy_pci_fastintr.h" 35 --- 14 unchanged lines hidden (view full) --- 50#define CY_PCI_BASE_ADDR0 0x10 51#define CY_PCI_BASE_ADDR1 0x14 52#define CY_PCI_BASE_ADDR2 0x18 53 54#define CY_PLX_9050_ICS 0x4c 55#define CY_PLX_9060_ICS 0x68 56#define CY_PLX_9050_ICS_IENABLE 0x040 57#define CY_PLX_9050_ICS_LOCAL_IENABLE 0x001 |
| 58#define CY_PLX_9050_ICS_LOCAL_IPOLARITY 0x002 |
|
| 58#define CY_PLX_9060_ICS_IENABLE 0x100 59#define CY_PLX_9060_ICS_LOCAL_IENABLE 0x800 60 61/* Cyclom-Y Custom Register for PLX ID. */ 62#define PLX_VER 0x3400 63#define PLX_9050 0x0b 64#define PLX_9060 0x0c 65#define PLX_9080 0x0d --- 106 unchanged lines hidden (view full) --- 172 173 /* 174 * Enable the "local" interrupt input to generate a 175 * PCI interrupt. 176 */ 177 plx_ver = *((u_char *)vaddr + PLX_VER) & 0x0f; 178 switch (plx_ver) { 179 case PLX_9050: | 59#define CY_PLX_9060_ICS_IENABLE 0x100 60#define CY_PLX_9060_ICS_LOCAL_IENABLE 0x800 61 62/* Cyclom-Y Custom Register for PLX ID. */ 63#define PLX_VER 0x3400 64#define PLX_9050 0x0b 65#define PLX_9060 0x0c 66#define PLX_9080 0x0d --- 106 unchanged lines hidden (view full) --- 173 174 /* 175 * Enable the "local" interrupt input to generate a 176 * PCI interrupt. 177 */ 178 plx_ver = *((u_char *)vaddr + PLX_VER) & 0x0f; 179 switch (plx_ver) { 180 case PLX_9050: |
| 180 outw(ioport + CY_PLX_9050_ICS, 181 inw(ioport + CY_PLX_9050_ICS) | CY_PLX_9050_ICS_IENABLE | 182 CY_PLX_9050_ICS_LOCAL_IENABLE); | 181 outw(ioport + CY_PLX_9050_ICS, 182 CY_PLX_9050_ICS_IENABLE | CY_PLX_9050_ICS_LOCAL_IENABLE | 183 CY_PLX_9050_ICS_LOCAL_IPOLARITY); |
| 183 break; 184 case PLX_9060: 185 case PLX_9080: 186 default: /* Old board, use PLX_9060 values. */ 187 outw(ioport + CY_PLX_9060_ICS, 188 inw(ioport + CY_PLX_9060_ICS) | CY_PLX_9060_ICS_IENABLE | 189 CY_PLX_9060_ICS_LOCAL_IENABLE); 190 break; --- 14 unchanged lines hidden --- | 184 break; 185 case PLX_9060: 186 case PLX_9080: 187 default: /* Old board, use PLX_9060 values. */ 188 outw(ioport + CY_PLX_9060_ICS, 189 inw(ioport + CY_PLX_9060_ICS) | CY_PLX_9060_ICS_IENABLE | 190 CY_PLX_9060_ICS_LOCAL_IENABLE); 191 break; --- 14 unchanged lines hidden --- |