| t4_ioctl.h (222973) | t4_ioctl.h (228561) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/cxgbe/t4_ioctl.h 222973 2011-06-11 04:50:54Z np $ | 27 * $FreeBSD: head/sys/dev/cxgbe/t4_ioctl.h 228561 2011-12-16 02:09:51Z np $ |
| 28 * 29 */ 30 31#ifndef __T4_IOCTL_H__ 32#define __T4_IOCTL_H__ 33 34#include <sys/types.h> 35#include <net/ethernet.h> --- 6 unchanged lines hidden (view full) --- 42 T4_SETREG, /* write register */ 43 T4_REGDUMP, /* dump of all registers */ 44 T4_GET_FILTER_MODE, /* get global filter mode */ 45 T4_SET_FILTER_MODE, /* set global filter mode */ 46 T4_GET_FILTER, /* get information about a filter */ 47 T4_SET_FILTER, /* program a filter */ 48 T4_DEL_FILTER, /* delete a filter */ 49 T4_GET_SGE_CONTEXT, /* get SGE context for a queue */ | 28 * 29 */ 30 31#ifndef __T4_IOCTL_H__ 32#define __T4_IOCTL_H__ 33 34#include <sys/types.h> 35#include <net/ethernet.h> --- 6 unchanged lines hidden (view full) --- 42 T4_SETREG, /* write register */ 43 T4_REGDUMP, /* dump of all registers */ 44 T4_GET_FILTER_MODE, /* get global filter mode */ 45 T4_SET_FILTER_MODE, /* set global filter mode */ 46 T4_GET_FILTER, /* get information about a filter */ 47 T4_SET_FILTER, /* program a filter */ 48 T4_DEL_FILTER, /* delete a filter */ 49 T4_GET_SGE_CONTEXT, /* get SGE context for a queue */ |
| 50 T4_LOAD_FW, /* flash firmware */ 51 T4_GET_MEM, /* read memory */ |
|
| 50}; 51 52struct t4_reg { 53 uint32_t addr; 54 uint32_t size; 55 uint64_t val; 56}; 57 58#define T4_REGDUMP_SIZE (160 * 1024) 59struct t4_regdump { 60 uint32_t version; 61 uint32_t len; /* bytes */ 62 uint32_t *data; 63}; 64 | 52}; 53 54struct t4_reg { 55 uint32_t addr; 56 uint32_t size; 57 uint64_t val; 58}; 59 60#define T4_REGDUMP_SIZE (160 * 1024) 61struct t4_regdump { 62 uint32_t version; 63 uint32_t len; /* bytes */ 64 uint32_t *data; 65}; 66 |
| 67struct t4_data { 68 uint32_t len; 69 uint8_t *data; 70}; 71 |
|
| 65/* 66 * A hardware filter is some valid combination of these. 67 */ 68#define T4_FILTER_IPv4 0x1 /* IPv4 packet */ 69#define T4_FILTER_IPv6 0x2 /* IPv6 packet */ 70#define T4_FILTER_IP_SADDR 0x4 /* Source IP address or network */ 71#define T4_FILTER_IP_DADDR 0x8 /* Destination IP address or network */ 72#define T4_FILTER_IP_SPORT 0x10 /* Source IP port */ 73#define T4_FILTER_IP_DPORT 0x20 /* Destination IP port */ 74#define T4_FILTER_FCoE 0x40 /* Fibre Channel over Ethernet packet */ 75#define T4_FILTER_PORT 0x80 /* Physical ingress port */ | 72/* 73 * A hardware filter is some valid combination of these. 74 */ 75#define T4_FILTER_IPv4 0x1 /* IPv4 packet */ 76#define T4_FILTER_IPv6 0x2 /* IPv6 packet */ 77#define T4_FILTER_IP_SADDR 0x4 /* Source IP address or network */ 78#define T4_FILTER_IP_DADDR 0x8 /* Destination IP address or network */ 79#define T4_FILTER_IP_SPORT 0x10 /* Source IP port */ 80#define T4_FILTER_IP_DPORT 0x20 /* Destination IP port */ 81#define T4_FILTER_FCoE 0x40 /* Fibre Channel over Ethernet packet */ 82#define T4_FILTER_PORT 0x80 /* Physical ingress port */ |
| 76#define T4_FILTER_OVLAN 0x100 /* Outer VLAN ID */ 77#define T4_FILTER_IVLAN 0x200 /* Inner VLAN ID */ | 83#define T4_FILTER_VNIC 0x100 /* VNIC id or outer VLAN */ 84#define T4_FILTER_VLAN 0x200 /* VLAN ID */ |
| 78#define T4_FILTER_IP_TOS 0x400 /* IPv4 TOS/IPv6 Traffic Class */ 79#define T4_FILTER_IP_PROTO 0x800 /* IP protocol */ 80#define T4_FILTER_ETH_TYPE 0x1000 /* Ethernet Type */ 81#define T4_FILTER_MAC_IDX 0x2000 /* MPS MAC address match index */ 82#define T4_FILTER_MPS_HIT_TYPE 0x4000 /* MPS match type */ 83#define T4_FILTER_IP_FRAGMENT 0x8000 /* IP fragment */ 84 85/* Filter action */ --- 40 unchanged lines hidden (view full) --- 126 uint16_t sport; /* source port */ 127 uint16_t dport; /* destination port */ 128 129 /* 130 * A combination of these (upto 36 bits) is available. TP_VLAN_PRI_MAP 131 * is used to select the global mode and all filters are limited to the 132 * set of fields allowed by the global mode. 133 */ | 85#define T4_FILTER_IP_TOS 0x400 /* IPv4 TOS/IPv6 Traffic Class */ 86#define T4_FILTER_IP_PROTO 0x800 /* IP protocol */ 87#define T4_FILTER_ETH_TYPE 0x1000 /* Ethernet Type */ 88#define T4_FILTER_MAC_IDX 0x2000 /* MPS MAC address match index */ 89#define T4_FILTER_MPS_HIT_TYPE 0x4000 /* MPS match type */ 90#define T4_FILTER_IP_FRAGMENT 0x8000 /* IP fragment */ 91 92/* Filter action */ --- 40 unchanged lines hidden (view full) --- 133 uint16_t sport; /* source port */ 134 uint16_t dport; /* destination port */ 135 136 /* 137 * A combination of these (upto 36 bits) is available. TP_VLAN_PRI_MAP 138 * is used to select the global mode and all filters are limited to the 139 * set of fields allowed by the global mode. 140 */ |
| 134 uint16_t ovlan; /* outer VLAN */ 135 uint16_t ivlan; /* inner VLAN */ | 141 uint16_t vnic; /* VNIC id or outer VLAN tag */ 142 uint16_t vlan; /* VLAN tag */ |
| 136 uint16_t ethtype; /* Ethernet type */ 137 uint8_t tos; /* TOS/Traffic Type */ 138 uint8_t proto; /* protocol type */ 139 uint32_t fcoe:1; /* FCoE packet */ 140 uint32_t iport:3; /* ingress port */ 141 uint32_t matchtype:3; /* MPS match type */ 142 uint32_t frag:1; /* fragmentation extension header */ 143 uint32_t macidx:9; /* exact match MAC index */ | 143 uint16_t ethtype; /* Ethernet type */ 144 uint8_t tos; /* TOS/Traffic Type */ 145 uint8_t proto; /* protocol type */ 146 uint32_t fcoe:1; /* FCoE packet */ 147 uint32_t iport:3; /* ingress port */ 148 uint32_t matchtype:3; /* MPS match type */ 149 uint32_t frag:1; /* fragmentation extension header */ 150 uint32_t macidx:9; /* exact match MAC index */ |
| 144 uint32_t ivlan_vld:1; /* inner VLAN valid */ 145 uint32_t ovlan_vld:1; /* outer VLAN valid */ | 151 uint32_t vlan_vld:1; /* VLAN valid */ 152 uint32_t vnic_vld:1; /* VNIC id/outer VLAN tag valid */ |
| 146}; 147 148struct t4_filter_specification { 149 uint32_t hitcnts:1; /* count filter hits in TCB */ 150 uint32_t prio:1; /* filter has priority over active/server */ 151 uint32_t type:1; /* 0 => IPv4, 1 => IPv6 */ 152 uint32_t action:2; /* drop, pass, switch */ 153 uint32_t rpttid:1; /* report TID in RSS hash field */ --- 40 unchanged lines hidden (view full) --- 194}; 195 196struct t4_sge_context { 197 uint32_t mem_id; 198 uint32_t cid; 199 uint32_t data[T4_SGE_CONTEXT_SIZE / 4]; 200}; 201 | 153}; 154 155struct t4_filter_specification { 156 uint32_t hitcnts:1; /* count filter hits in TCB */ 157 uint32_t prio:1; /* filter has priority over active/server */ 158 uint32_t type:1; /* 0 => IPv4, 1 => IPv6 */ 159 uint32_t action:2; /* drop, pass, switch */ 160 uint32_t rpttid:1; /* report TID in RSS hash field */ --- 40 unchanged lines hidden (view full) --- 201}; 202 203struct t4_sge_context { 204 uint32_t mem_id; 205 uint32_t cid; 206 uint32_t data[T4_SGE_CONTEXT_SIZE / 4]; 207}; 208 |
| 209struct t4_mem_range { 210 uint32_t addr; 211 uint32_t len; 212 uint32_t *data; 213}; 214 |
|
| 202#define CHELSIO_T4_GETREG _IOWR('f', T4_GETREG, struct t4_reg) 203#define CHELSIO_T4_SETREG _IOW('f', T4_SETREG, struct t4_reg) 204#define CHELSIO_T4_REGDUMP _IOWR('f', T4_REGDUMP, struct t4_regdump) 205#define CHELSIO_T4_GET_FILTER_MODE _IOWR('f', T4_GET_FILTER_MODE, uint32_t) 206#define CHELSIO_T4_SET_FILTER_MODE _IOW('f', T4_SET_FILTER_MODE, uint32_t) 207#define CHELSIO_T4_GET_FILTER _IOWR('f', T4_GET_FILTER, struct t4_filter) 208#define CHELSIO_T4_SET_FILTER _IOW('f', T4_SET_FILTER, struct t4_filter) 209#define CHELSIO_T4_DEL_FILTER _IOW('f', T4_DEL_FILTER, struct t4_filter) 210#define CHELSIO_T4_GET_SGE_CONTEXT _IOWR('f', T4_GET_SGE_CONTEXT, \ 211 struct t4_sge_context) | 215#define CHELSIO_T4_GETREG _IOWR('f', T4_GETREG, struct t4_reg) 216#define CHELSIO_T4_SETREG _IOW('f', T4_SETREG, struct t4_reg) 217#define CHELSIO_T4_REGDUMP _IOWR('f', T4_REGDUMP, struct t4_regdump) 218#define CHELSIO_T4_GET_FILTER_MODE _IOWR('f', T4_GET_FILTER_MODE, uint32_t) 219#define CHELSIO_T4_SET_FILTER_MODE _IOW('f', T4_SET_FILTER_MODE, uint32_t) 220#define CHELSIO_T4_GET_FILTER _IOWR('f', T4_GET_FILTER, struct t4_filter) 221#define CHELSIO_T4_SET_FILTER _IOW('f', T4_SET_FILTER, struct t4_filter) 222#define CHELSIO_T4_DEL_FILTER _IOW('f', T4_DEL_FILTER, struct t4_filter) 223#define CHELSIO_T4_GET_SGE_CONTEXT _IOWR('f', T4_GET_SGE_CONTEXT, \ 224 struct t4_sge_context) |
| 225#define CHELSIO_T4_LOAD_FW _IOW('f', T4_LOAD_FW, struct t4_data) 226#define CHELSIO_T4_GET_MEM _IOW('f', T4_GET_MEM, struct t4_mem_range) |
|
| 212#endif | 227#endif |