| t4fw_interface.h (247291) | t4fw_interface.h (250090) |
|---|---|
| 1/*- 2 * Copyright (c) 2012 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2012 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/dev/cxgbe/firmware/t4fw_interface.h 247291 2013-02-26 00:27:27Z np $ | 26 * $FreeBSD: head/sys/dev/cxgbe/firmware/t4fw_interface.h 250090 2013-04-30 05:32:07Z np $ |
| 27 * 28 */ 29 30#ifndef _T4FW_INTERFACE_H_ 31#define _T4FW_INTERFACE_H_ 32 33/****************************************************************************** 34 * R E T U R N V A L U E S --- 40 unchanged lines hidden (view full) --- 75 FW_SCSI_TASK_ERR = 142, /* No SCSI tasks available */ 76}; 77 78/****************************************************************************** 79 * W O R K R E Q U E S T s 80 ********************************/ 81 82enum fw_wr_opcodes { | 27 * 28 */ 29 30#ifndef _T4FW_INTERFACE_H_ 31#define _T4FW_INTERFACE_H_ 32 33/****************************************************************************** 34 * R E T U R N V A L U E S --- 40 unchanged lines hidden (view full) --- 75 FW_SCSI_TASK_ERR = 142, /* No SCSI tasks available */ 76}; 77 78/****************************************************************************** 79 * W O R K R E Q U E S T s 80 ********************************/ 81 82enum fw_wr_opcodes { |
| 83 FW_FRAG_WR = 0x1d, |
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| 83 FW_FILTER_WR = 0x02, 84 FW_ULPTX_WR = 0x04, 85 FW_TP_WR = 0x05, 86 FW_ETH_TX_PKT_WR = 0x08, 87 FW_ETH_TX_PKTS_WR = 0x09, 88 FW_ETH_TX_UO_WR = 0x1c, 89 FW_EQ_FLUSH_WR = 0x1b, 90 FW_OFLD_CONNECTION_WR = 0x2f, --- 107 unchanged lines hidden (view full) --- 198 199/* length in units of 16-bytes (lo) 200 */ 201#define S_FW_WR_LEN16 0 202#define M_FW_WR_LEN16 0xff 203#define V_FW_WR_LEN16(x) ((x) << S_FW_WR_LEN16) 204#define G_FW_WR_LEN16(x) (((x) >> S_FW_WR_LEN16) & M_FW_WR_LEN16) 205 | 84 FW_FILTER_WR = 0x02, 85 FW_ULPTX_WR = 0x04, 86 FW_TP_WR = 0x05, 87 FW_ETH_TX_PKT_WR = 0x08, 88 FW_ETH_TX_PKTS_WR = 0x09, 89 FW_ETH_TX_UO_WR = 0x1c, 90 FW_EQ_FLUSH_WR = 0x1b, 91 FW_OFLD_CONNECTION_WR = 0x2f, --- 107 unchanged lines hidden (view full) --- 199 200/* length in units of 16-bytes (lo) 201 */ 202#define S_FW_WR_LEN16 0 203#define M_FW_WR_LEN16 0xff 204#define V_FW_WR_LEN16(x) ((x) << S_FW_WR_LEN16) 205#define G_FW_WR_LEN16(x) (((x) >> S_FW_WR_LEN16) & M_FW_WR_LEN16) 206 |
| 207struct fw_frag_wr { 208 __be32 op_to_fragoff16; 209 __be32 flowid_len16; 210 __be64 r4; 211}; 212 213#define S_FW_FRAG_WR_EOF 15 214#define M_FW_FRAG_WR_EOF 0x1 215#define V_FW_FRAG_WR_EOF(x) ((x) << S_FW_FRAG_WR_EOF) 216#define G_FW_FRAG_WR_EOF(x) (((x) >> S_FW_FRAG_WR_EOF) & M_FW_FRAG_WR_EOF) 217#define F_FW_FRAG_WR_EOF V_FW_FRAG_WR_EOF(1U) 218 219#define S_FW_FRAG_WR_FRAGOFF16 8 220#define M_FW_FRAG_WR_FRAGOFF16 0x7f 221#define V_FW_FRAG_WR_FRAGOFF16(x) ((x) << S_FW_FRAG_WR_FRAGOFF16) 222#define G_FW_FRAG_WR_FRAGOFF16(x) \ 223 (((x) >> S_FW_FRAG_WR_FRAGOFF16) & M_FW_FRAG_WR_FRAGOFF16) 224 |
|
| 206/* valid filter configurations for compressed tuple 207 * Encodings: TPL - Compressed TUPLE for filter in addition to 4-tuple 208 * FR - FRAGMENT, FC - FCoE, MT - MPS MATCH TYPE, M - MPS MATCH, 209 * E - Ethertype, P - Port, PR - Protocol, T - TOS, IV - Inner VLAN, 210 * OV - Outer VLAN/VNIC_ID, 211*/ 212#define HW_TPL_FR_MT_M_E_P_FC 0x3C3 213#define HW_TPL_FR_MT_M_PR_T_FC 0x3B3 --- 2777 unchanged lines hidden (view full) --- 2991 FW_LDST_ADDRSPC_TP_MIB = 0x0012, 2992 FW_LDST_ADDRSPC_MDIO = 0x0018, 2993 FW_LDST_ADDRSPC_MPS = 0x0020, 2994 FW_LDST_ADDRSPC_FUNC = 0x0028, 2995 FW_LDST_ADDRSPC_FUNC_PCIE = 0x0029, 2996 FW_LDST_ADDRSPC_FUNC_I2C = 0x002A, /* legacy */ 2997 FW_LDST_ADDRSPC_LE = 0x0030, 2998 FW_LDST_ADDRSPC_I2C = 0x0038, | 225/* valid filter configurations for compressed tuple 226 * Encodings: TPL - Compressed TUPLE for filter in addition to 4-tuple 227 * FR - FRAGMENT, FC - FCoE, MT - MPS MATCH TYPE, M - MPS MATCH, 228 * E - Ethertype, P - Port, PR - Protocol, T - TOS, IV - Inner VLAN, 229 * OV - Outer VLAN/VNIC_ID, 230*/ 231#define HW_TPL_FR_MT_M_E_P_FC 0x3C3 232#define HW_TPL_FR_MT_M_PR_T_FC 0x3B3 --- 2777 unchanged lines hidden (view full) --- 3010 FW_LDST_ADDRSPC_TP_MIB = 0x0012, 3011 FW_LDST_ADDRSPC_MDIO = 0x0018, 3012 FW_LDST_ADDRSPC_MPS = 0x0020, 3013 FW_LDST_ADDRSPC_FUNC = 0x0028, 3014 FW_LDST_ADDRSPC_FUNC_PCIE = 0x0029, 3015 FW_LDST_ADDRSPC_FUNC_I2C = 0x002A, /* legacy */ 3016 FW_LDST_ADDRSPC_LE = 0x0030, 3017 FW_LDST_ADDRSPC_I2C = 0x0038, |
| 3018 FW_LDST_ADDRSPC_PCIE_CFGS = 0x0040, 3019 FW_LDST_ADDRSPC_PCIE_DBG = 0x0041, 3020 FW_LDST_ADDRSPC_PCIE_PHY = 0x0042, |
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| 2999}; 3000 3001/* 3002 * MDIO VSC8634 register access control field 3003 */ 3004enum fw_ldst_mdio_vsc8634_aid { 3005 FW_LDST_MDIO_VS_STANDARD, 3006 FW_LDST_MDIO_VS_EXTENDED, --- 470 unchanged lines hidden (view full) --- 3477 FW_PARAMS_PARAM_DEV_FLOWC_BUFFIFO_SZ = 0x03, 3478 FW_PARAMS_PARAM_DEV_INTFVER_NIC = 0x04, 3479 FW_PARAMS_PARAM_DEV_INTFVER_VNIC = 0x05, 3480 FW_PARAMS_PARAM_DEV_INTFVER_OFLD = 0x06, 3481 FW_PARAMS_PARAM_DEV_INTFVER_RI = 0x07, 3482 FW_PARAMS_PARAM_DEV_INTFVER_ISCSIPDU = 0x08, 3483 FW_PARAMS_PARAM_DEV_INTFVER_ISCSI = 0x09, 3484 FW_PARAMS_PARAM_DEV_INTFVER_FCOE = 0x0A, | 3021}; 3022 3023/* 3024 * MDIO VSC8634 register access control field 3025 */ 3026enum fw_ldst_mdio_vsc8634_aid { 3027 FW_LDST_MDIO_VS_STANDARD, 3028 FW_LDST_MDIO_VS_EXTENDED, --- 470 unchanged lines hidden (view full) --- 3499 FW_PARAMS_PARAM_DEV_FLOWC_BUFFIFO_SZ = 0x03, 3500 FW_PARAMS_PARAM_DEV_INTFVER_NIC = 0x04, 3501 FW_PARAMS_PARAM_DEV_INTFVER_VNIC = 0x05, 3502 FW_PARAMS_PARAM_DEV_INTFVER_OFLD = 0x06, 3503 FW_PARAMS_PARAM_DEV_INTFVER_RI = 0x07, 3504 FW_PARAMS_PARAM_DEV_INTFVER_ISCSIPDU = 0x08, 3505 FW_PARAMS_PARAM_DEV_INTFVER_ISCSI = 0x09, 3506 FW_PARAMS_PARAM_DEV_INTFVER_FCOE = 0x0A, |
| 3485 FW_PARAMS_PARAM_DEV_FWREV = 0x0B, 3486 FW_PARAMS_PARAM_DEV_TPREV = 0x0C, 3487 FW_PARAMS_PARAM_DEV_CF = 0x0D, 3488 FW_PARAMS_PARAM_DEV_BYPASS = 0x0E, 3489 FW_PARAMS_PARAM_DEV_PHYFW = 0x0F, 3490 FW_PARAMS_PARAM_DEV_LOAD = 0x10, 3491 FW_PARAMS_PARAM_DEV_DIAG = 0x11, | 3507 FW_PARAMS_PARAM_DEV_FWREV = 0x0B, 3508 FW_PARAMS_PARAM_DEV_TPREV = 0x0C, 3509 FW_PARAMS_PARAM_DEV_CF = 0x0D, 3510 FW_PARAMS_PARAM_DEV_BYPASS = 0x0E, 3511 FW_PARAMS_PARAM_DEV_PHYFW = 0x0F, 3512 FW_PARAMS_PARAM_DEV_LOAD = 0x10, 3513 FW_PARAMS_PARAM_DEV_DIAG = 0x11, 3514 FW_PARAMS_PARAM_DEV_UCLK = 0x12, /* uP clock in khz */ 3515 FW_PARAMS_PARAM_DEV_MAXORDIRD_QP = 0x13, /* max supported QP IRD/ORD 3516 */ 3517 FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER= 0x14,/* max supported ADAPTER IRD 3518 */ 3519 FW_PARAMS_PARAM_DEV_INTFVER_FCOEPDU = 0x15, 3520 FW_PARAMS_PARAM_DEV_MCINIT = 0x16, |
| 3492}; 3493 3494/* 3495 * physical and virtual function parameters 3496 */ 3497enum fw_params_param_pfvf { 3498 FW_PARAMS_PARAM_PFVF_RWXCAPS = 0x00, 3499 FW_PARAMS_PARAM_PFVF_ROUTE_START = 0x01, --- 2355 unchanged lines hidden (view full) --- 5855 FW_PORT_TYPE_BT_XAUI = 4, /* Y, 4, No, No, No, No, 10G/1G/100M? */ 5856 FW_PORT_TYPE_KX4 = 5, /* No, 4, No, No, Yes, Yes, 10G */ 5857 FW_PORT_TYPE_CX4 = 6, /* No, 4, No, No, No, No, 10G */ 5858 FW_PORT_TYPE_KX = 7, /* No, 1, No, No, Yes, No, 1G */ 5859 FW_PORT_TYPE_KR = 8, /* No, 1, No, No, Yes, Yes, 10G */ 5860 FW_PORT_TYPE_SFP = 9, /* No, 1, Yes, No, No, No, 10G */ 5861 FW_PORT_TYPE_BP_AP = 10, /* No, 1, No, No, Yes, Yes, 10G, BP ANGE */ 5862 FW_PORT_TYPE_BP4_AP = 11, /* No, 4, No, No, Yes, Yes, 10G, BP ANGE */ | 3521}; 3522 3523/* 3524 * physical and virtual function parameters 3525 */ 3526enum fw_params_param_pfvf { 3527 FW_PARAMS_PARAM_PFVF_RWXCAPS = 0x00, 3528 FW_PARAMS_PARAM_PFVF_ROUTE_START = 0x01, --- 2355 unchanged lines hidden (view full) --- 5884 FW_PORT_TYPE_BT_XAUI = 4, /* Y, 4, No, No, No, No, 10G/1G/100M? */ 5885 FW_PORT_TYPE_KX4 = 5, /* No, 4, No, No, Yes, Yes, 10G */ 5886 FW_PORT_TYPE_CX4 = 6, /* No, 4, No, No, No, No, 10G */ 5887 FW_PORT_TYPE_KX = 7, /* No, 1, No, No, Yes, No, 1G */ 5888 FW_PORT_TYPE_KR = 8, /* No, 1, No, No, Yes, Yes, 10G */ 5889 FW_PORT_TYPE_SFP = 9, /* No, 1, Yes, No, No, No, 10G */ 5890 FW_PORT_TYPE_BP_AP = 10, /* No, 1, No, No, Yes, Yes, 10G, BP ANGE */ 5891 FW_PORT_TYPE_BP4_AP = 11, /* No, 4, No, No, Yes, Yes, 10G, BP ANGE */ |
| 5892 FW_PORT_TYPE_QSFP_10G = 12, /* No, 1, Yes, No, No, No, 10G */ 5893 FW_PORT_TYPE_QSFP = 14, /* No, 4, Yes, No, No, No, 40G */ 5894 FW_PORT_TYPE_BP40_BA = 15, /* No, 4, No, No, Yes, Yes, 40G/10G/1G, BP ANGE */ |
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| 5863 5864 FW_PORT_TYPE_NONE = M_FW_PORT_CMD_PTYPE 5865}; 5866 5867/* These are read from module's EEPROM and determined once the 5868 module is inserted. */ 5869enum fw_port_module_type { 5870 FW_PORT_MOD_TYPE_NA = 0x0, --- 907 unchanged lines hidden (view full) --- 6778 FW_DEVLOG_LEVEL_MAX = 0x5, 6779}; 6780 6781/* 6782 * facilities that may send a log message 6783 */ 6784enum fw_devlog_facility { 6785 FW_DEVLOG_FACILITY_CORE = 0x00, | 5895 5896 FW_PORT_TYPE_NONE = M_FW_PORT_CMD_PTYPE 5897}; 5898 5899/* These are read from module's EEPROM and determined once the 5900 module is inserted. */ 5901enum fw_port_module_type { 5902 FW_PORT_MOD_TYPE_NA = 0x0, --- 907 unchanged lines hidden (view full) --- 6810 FW_DEVLOG_LEVEL_MAX = 0x5, 6811}; 6812 6813/* 6814 * facilities that may send a log message 6815 */ 6816enum fw_devlog_facility { 6817 FW_DEVLOG_FACILITY_CORE = 0x00, |
| 6818 FW_DEVLOG_FACILITY_CF = 0x01, |
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| 6786 FW_DEVLOG_FACILITY_SCHED = 0x02, 6787 FW_DEVLOG_FACILITY_TIMER = 0x04, 6788 FW_DEVLOG_FACILITY_RES = 0x06, 6789 FW_DEVLOG_FACILITY_HW = 0x08, 6790 FW_DEVLOG_FACILITY_FLR = 0x10, 6791 FW_DEVLOG_FACILITY_DMAQ = 0x12, 6792 FW_DEVLOG_FACILITY_PHY = 0x14, 6793 FW_DEVLOG_FACILITY_MAC = 0x16, --- 811 unchanged lines hidden --- | 6819 FW_DEVLOG_FACILITY_SCHED = 0x02, 6820 FW_DEVLOG_FACILITY_TIMER = 0x04, 6821 FW_DEVLOG_FACILITY_RES = 0x06, 6822 FW_DEVLOG_FACILITY_HW = 0x08, 6823 FW_DEVLOG_FACILITY_FLR = 0x10, 6824 FW_DEVLOG_FACILITY_DMAQ = 0x12, 6825 FW_DEVLOG_FACILITY_PHY = 0x14, 6826 FW_DEVLOG_FACILITY_MAC = 0x16, --- 811 unchanged lines hidden --- |