t4fw_cfg_uwire.txt (256791) | t4fw_cfg_uwire.txt (267849) |
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1# Chelsio T4 Factory Default configuration file. 2# | 1# Chelsio T4 Factory Default configuration file. 2# |
3# Copyright (C) 2010-2013 Chelsio Communications. All rights reserved. | 3# Copyright (C) 2010-2014 Chelsio Communications. All rights reserved. |
4# 5# DO NOT MODIFY THIS FILE UNDER ANY CIRCUMSTANCES. MODIFICATION OF 6# THIS FILE WILL RESULT IN A NON-FUNCTIONAL T4 ADAPTER AND MAY RESULT 7# IN PHYSICAL DAMAGE TO T4 ADAPTERS. 8 9# This file provides the default, power-on configuration for 4-port T4-based 10# adapters shipped from the factory. These defaults are designed to address 11# the needs of the vast majority of T4 customers. The basic idea is to have --- 479 unchanged lines hidden (view full) --- 491# lpbk_mem: %-age of port/bg mem to use for loopback 492# hwm: high watermark; bytes available when starting to send pause 493# frames (in units of 0.1 MTU) 494# lwm: low watermark; bytes remaining when sending 'unpause' frame 495# (in inuits of 0.1 MTU) 496# dwm: minimum delta between high and low watermark (in units of 100 497# Bytes) 498# | 4# 5# DO NOT MODIFY THIS FILE UNDER ANY CIRCUMSTANCES. MODIFICATION OF 6# THIS FILE WILL RESULT IN A NON-FUNCTIONAL T4 ADAPTER AND MAY RESULT 7# IN PHYSICAL DAMAGE TO T4 ADAPTERS. 8 9# This file provides the default, power-on configuration for 4-port T4-based 10# adapters shipped from the factory. These defaults are designed to address 11# the needs of the vast majority of T4 customers. The basic idea is to have --- 479 unchanged lines hidden (view full) --- 491# lpbk_mem: %-age of port/bg mem to use for loopback 492# hwm: high watermark; bytes available when starting to send pause 493# frames (in units of 0.1 MTU) 494# lwm: low watermark; bytes remaining when sending 'unpause' frame 495# (in inuits of 0.1 MTU) 496# dwm: minimum delta between high and low watermark (in units of 100 497# Bytes) 498# |
499# 500 |
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499[port "0"] 500 dcb = ppp, dcbx # configure for DCB PPP and enable DCBX offload 501 bg_mem = 25 502 lpbk_mem = 25 503 hwm = 30 504 lwm = 15 505 dwm = 30 | 501[port "0"] 502 dcb = ppp, dcbx # configure for DCB PPP and enable DCBX offload 503 bg_mem = 25 504 lpbk_mem = 25 505 hwm = 30 506 lwm = 15 507 dwm = 30 |
508 dcb_app_tlv[0] = 0x8906, ethertype, 3 509 dcb_app_tlv[1] = 0x8914, ethertype, 3 510 dcb_app_tlv[2] = 3260, socketnum, 5 |
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506 507[port "1"] 508 dcb = ppp, dcbx 509 bg_mem = 25 510 lpbk_mem = 25 511 hwm = 30 512 lwm = 15 513 dwm = 30 | 511 512[port "1"] 513 dcb = ppp, dcbx 514 bg_mem = 25 515 lpbk_mem = 25 516 hwm = 30 517 lwm = 15 518 dwm = 30 |
519 dcb_app_tlv[0] = 0x8906, ethertype, 3 520 dcb_app_tlv[1] = 0x8914, ethertype, 3 521 dcb_app_tlv[2] = 3260, socketnum, 5 |
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514 515[port "2"] 516 dcb = ppp, dcbx 517 bg_mem = 25 518 lpbk_mem = 25 519 hwm = 30 520 lwm = 15 521 dwm = 30 | 522 523[port "2"] 524 dcb = ppp, dcbx 525 bg_mem = 25 526 lpbk_mem = 25 527 hwm = 30 528 lwm = 15 529 dwm = 30 |
530 dcb_app_tlv[0] = 0x8906, ethertype, 3 531 dcb_app_tlv[1] = 0x8914, ethertype, 3 532 dcb_app_tlv[2] = 3260, socketnum, 5 |
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522 523[port "3"] 524 dcb = ppp, dcbx 525 bg_mem = 25 526 lpbk_mem = 25 527 hwm = 30 528 lwm = 15 529 dwm = 30 | 533 534[port "3"] 535 dcb = ppp, dcbx 536 bg_mem = 25 537 lpbk_mem = 25 538 hwm = 30 539 lwm = 15 540 dwm = 30 |
541 dcb_app_tlv[0] = 0x8906, ethertype, 3 542 dcb_app_tlv[1] = 0x8914, ethertype, 3 543 dcb_app_tlv[2] = 3260, socketnum, 5 |
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530 531[fini] | 544 545[fini] |
532 version = 0x14250010 533 checksum = 0x5a5526c3 | 546 version = 0x14250012 547 checksum = 0xd9ae0325 |
534 535# Total resources used by above allocations: 536# Virtual Interfaces: 104 537# Ingress Queues/w Free Lists and Interrupts: 526 538# Egress Queues: 702 539# MPS TCAM Entries: 336 540# MSI-X Vectors: 736 541# Virtual Functions: 64 542# | 548 549# Total resources used by above allocations: 550# Virtual Interfaces: 104 551# Ingress Queues/w Free Lists and Interrupts: 526 552# Egress Queues: 702 553# MPS TCAM Entries: 336 554# MSI-X Vectors: 736 555# Virtual Functions: 64 556# |
543# $FreeBSD: stable/10/sys/dev/cxgbe/firmware/t4fw_cfg_uwire.txt 256791 2013-10-20 15:24:44Z np $ | 557# $FreeBSD: stable/10/sys/dev/cxgbe/firmware/t4fw_cfg_uwire.txt 267849 2014-06-25 02:14:55Z np $ |
544# | 558# |