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t4_hw.c (269082) t4_hw.c (270297)
1/*-
2 * Copyright (c) 2012 Chelsio Communications, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2012 Chelsio Communications, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: stable/10/sys/dev/cxgbe/common/t4_hw.c 269082 2014-07-25 00:30:55Z np $");
28__FBSDID("$FreeBSD: stable/10/sys/dev/cxgbe/common/t4_hw.c 270297 2014-08-21 19:54:02Z np $");
29
30#include "opt_inet.h"
31
32#include "common.h"
33#include "t4_regs.h"
34#include "t4_regs_values.h"
35#include "firmware/t4fw_interface.h"
36

--- 2032 unchanged lines hidden (view full) ---

2069 { F_TRGT1GRPPERR, "PCI TRGT1 group FIFOs parity error", -1, 1 },
2070 { F_READRSPERR, "Outbound read error", -1,
2071 0 },
2072 { 0 }
2073 };
2074
2075 int fat;
2076
29
30#include "opt_inet.h"
31
32#include "common.h"
33#include "t4_regs.h"
34#include "t4_regs_values.h"
35#include "firmware/t4fw_interface.h"
36

--- 2032 unchanged lines hidden (view full) ---

2069 { F_TRGT1GRPPERR, "PCI TRGT1 group FIFOs parity error", -1, 1 },
2070 { F_READRSPERR, "Outbound read error", -1,
2071 0 },
2072 { 0 }
2073 };
2074
2075 int fat;
2076
2077 fat = t4_handle_intr_status(adapter,
2078 A_PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS,
2079 sysbus_intr_info) +
2080 t4_handle_intr_status(adapter,
2081 A_PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS,
2082 pcie_port_intr_info) +
2083 t4_handle_intr_status(adapter, A_PCIE_INT_CAUSE,
2084 is_t4(adapter) ?
2085 pcie_intr_info : t5_pcie_intr_info);
2077 if (is_t4(adapter))
2078 fat = t4_handle_intr_status(adapter,
2079 A_PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS,
2080 sysbus_intr_info) +
2081 t4_handle_intr_status(adapter,
2082 A_PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS,
2083 pcie_port_intr_info) +
2084 t4_handle_intr_status(adapter, A_PCIE_INT_CAUSE,
2085 pcie_intr_info);
2086 else
2087 fat = t4_handle_intr_status(adapter, A_PCIE_INT_CAUSE,
2088 t5_pcie_intr_info);
2086 if (fat)
2087 t4_fatal_err(adapter);
2088}
2089
2090/*
2091 * TP interrupt handler.
2092 */
2093static void tp_intr_handler(struct adapter *adapter)

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2458
2459/*
2460 * MA interrupt handler.
2461 */
2462static void ma_intr_handler(struct adapter *adapter)
2463{
2464 u32 v, status = t4_read_reg(adapter, A_MA_INT_CAUSE);
2465
2089 if (fat)
2090 t4_fatal_err(adapter);
2091}
2092
2093/*
2094 * TP interrupt handler.
2095 */
2096static void tp_intr_handler(struct adapter *adapter)

--- 364 unchanged lines hidden (view full) ---

2461
2462/*
2463 * MA interrupt handler.
2464 */
2465static void ma_intr_handler(struct adapter *adapter)
2466{
2467 u32 v, status = t4_read_reg(adapter, A_MA_INT_CAUSE);
2468
2466 if (status & F_MEM_PERR_INT_CAUSE)
2469 if (status & F_MEM_PERR_INT_CAUSE) {
2467 CH_ALERT(adapter, "MA parity error, parity status %#x\n",
2470 CH_ALERT(adapter, "MA parity error, parity status %#x\n",
2468 t4_read_reg(adapter, A_MA_PARITY_ERROR_STATUS));
2471 t4_read_reg(adapter, A_MA_PARITY_ERROR_STATUS1));
2472 if (is_t5(adapter))
2473 CH_ALERT(adapter,
2474 "MA parity error, parity status %#x\n",
2475 t4_read_reg(adapter,
2476 A_MA_PARITY_ERROR_STATUS2));
2477 }
2469 if (status & F_MEM_WRAP_INT_CAUSE) {
2470 v = t4_read_reg(adapter, A_MA_INT_WRAP_STATUS);
2471 CH_ALERT(adapter, "MA address wrap-around error by client %u to"
2472 " address %#x\n", G_MEM_WRAP_CLIENT_NUM(v),
2473 G_MEM_WRAP_ADDRESS(v) << 4);
2474 }
2475 t4_write_reg(adapter, A_MA_INT_CAUSE, status);
2476 t4_fatal_err(adapter);

--- 200 unchanged lines hidden (view full) ---

2677 *
2678 * Clears all interrupts. The caller must be a PCI function managing
2679 * global interrupts.
2680 */
2681void t4_intr_clear(struct adapter *adapter)
2682{
2683 static const unsigned int cause_reg[] = {
2684 A_SGE_INT_CAUSE1, A_SGE_INT_CAUSE2, A_SGE_INT_CAUSE3,
2478 if (status & F_MEM_WRAP_INT_CAUSE) {
2479 v = t4_read_reg(adapter, A_MA_INT_WRAP_STATUS);
2480 CH_ALERT(adapter, "MA address wrap-around error by client %u to"
2481 " address %#x\n", G_MEM_WRAP_CLIENT_NUM(v),
2482 G_MEM_WRAP_ADDRESS(v) << 4);
2483 }
2484 t4_write_reg(adapter, A_MA_INT_CAUSE, status);
2485 t4_fatal_err(adapter);

--- 200 unchanged lines hidden (view full) ---

2686 *
2687 * Clears all interrupts. The caller must be a PCI function managing
2688 * global interrupts.
2689 */
2690void t4_intr_clear(struct adapter *adapter)
2691{
2692 static const unsigned int cause_reg[] = {
2693 A_SGE_INT_CAUSE1, A_SGE_INT_CAUSE2, A_SGE_INT_CAUSE3,
2685 A_PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS,
2686 A_PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS,
2687 A_PCIE_NONFAT_ERR, A_PCIE_INT_CAUSE,
2694 A_PCIE_NONFAT_ERR, A_PCIE_INT_CAUSE,
2688 A_MA_INT_WRAP_STATUS, A_MA_PARITY_ERROR_STATUS, A_MA_INT_CAUSE,
2695 A_MA_INT_WRAP_STATUS, A_MA_PARITY_ERROR_STATUS1, A_MA_INT_CAUSE,
2689 A_EDC_INT_CAUSE, EDC_REG(A_EDC_INT_CAUSE, 1),
2690 A_CIM_HOST_INT_CAUSE, A_CIM_HOST_UPACC_INT_CAUSE,
2691 MYPF_REG(A_CIM_PF_HOST_INT_CAUSE),
2692 A_TP_INT_CAUSE,
2693 A_ULP_RX_INT_CAUSE, A_ULP_TX_INT_CAUSE,
2694 A_PM_RX_INT_CAUSE, A_PM_TX_INT_CAUSE,
2695 A_MPS_RX_PERR_INT_CAUSE,
2696 A_CPL_INTR_CAUSE,

--- 5 unchanged lines hidden (view full) ---

2702 unsigned int i;
2703
2704 for (i = 0; i < ARRAY_SIZE(cause_reg); ++i)
2705 t4_write_reg(adapter, cause_reg[i], 0xffffffff);
2706
2707 t4_write_reg(adapter, is_t4(adapter) ? A_MC_INT_CAUSE :
2708 A_MC_P_INT_CAUSE, 0xffffffff);
2709
2696 A_EDC_INT_CAUSE, EDC_REG(A_EDC_INT_CAUSE, 1),
2697 A_CIM_HOST_INT_CAUSE, A_CIM_HOST_UPACC_INT_CAUSE,
2698 MYPF_REG(A_CIM_PF_HOST_INT_CAUSE),
2699 A_TP_INT_CAUSE,
2700 A_ULP_RX_INT_CAUSE, A_ULP_TX_INT_CAUSE,
2701 A_PM_RX_INT_CAUSE, A_PM_TX_INT_CAUSE,
2702 A_MPS_RX_PERR_INT_CAUSE,
2703 A_CPL_INTR_CAUSE,

--- 5 unchanged lines hidden (view full) ---

2709 unsigned int i;
2710
2711 for (i = 0; i < ARRAY_SIZE(cause_reg); ++i)
2712 t4_write_reg(adapter, cause_reg[i], 0xffffffff);
2713
2714 t4_write_reg(adapter, is_t4(adapter) ? A_MC_INT_CAUSE :
2715 A_MC_P_INT_CAUSE, 0xffffffff);
2716
2717 if (is_t4(adapter)) {
2718 t4_write_reg(adapter, A_PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS,
2719 0xffffffff);
2720 t4_write_reg(adapter, A_PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS,
2721 0xffffffff);
2722 } else
2723 t4_write_reg(adapter, A_MA_PARITY_ERROR_STATUS2, 0xffffffff);
2724
2710 t4_write_reg(adapter, A_PL_INT_CAUSE, GLBL_INTR_MASK);
2711 (void) t4_read_reg(adapter, A_PL_INT_CAUSE); /* flush */
2712}
2713
2714/**
2715 * hash_mac_addr - return the hash value of a MAC address
2716 * @addr: the 48-bit Ethernet MAC address
2717 *

--- 2151 unchanged lines hidden (view full) ---

4869 * Allocates a virtual interface for the given physical port. If @mac is
4870 * not %NULL it contains the MAC addresses of the VI as assigned by FW.
4871 * @mac should be large enough to hold @nmac Ethernet addresses, they are
4872 * stored consecutively so the space needed is @nmac * 6 bytes.
4873 * Returns a negative error number or the non-negative VI id.
4874 */
4875int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,
4876 unsigned int port, unsigned int pf, unsigned int vf,
2725 t4_write_reg(adapter, A_PL_INT_CAUSE, GLBL_INTR_MASK);
2726 (void) t4_read_reg(adapter, A_PL_INT_CAUSE); /* flush */
2727}
2728
2729/**
2730 * hash_mac_addr - return the hash value of a MAC address
2731 * @addr: the 48-bit Ethernet MAC address
2732 *

--- 2151 unchanged lines hidden (view full) ---

4884 * Allocates a virtual interface for the given physical port. If @mac is
4885 * not %NULL it contains the MAC addresses of the VI as assigned by FW.
4886 * @mac should be large enough to hold @nmac Ethernet addresses, they are
4887 * stored consecutively so the space needed is @nmac * 6 bytes.
4888 * Returns a negative error number or the non-negative VI id.
4889 */
4890int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,
4891 unsigned int port, unsigned int pf, unsigned int vf,
4877 unsigned int nmac, u8 *mac, unsigned int *rss_size,
4892 unsigned int nmac, u8 *mac, u16 *rss_size,
4878 unsigned int portfunc, unsigned int idstype)
4879{
4880 int ret;
4881 struct fw_vi_cmd c;
4882
4883 memset(&c, 0, sizeof(c));
4884 c.op_to_vfn = htonl(V_FW_CMD_OP(FW_VI_CMD) | F_FW_CMD_REQUEST |
4885 F_FW_CMD_WRITE | F_FW_CMD_EXEC |

--- 38 unchanged lines hidden (view full) ---

4924 * @rss_size: size of RSS table slice associated with this VI
4925 *
4926 * backwards compatible and convieniance routine to allocate a Virtual
4927 * Interface with a Ethernet Port Application Function and Intrustion
4928 * Detection System disabled.
4929 */
4930int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
4931 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
4893 unsigned int portfunc, unsigned int idstype)
4894{
4895 int ret;
4896 struct fw_vi_cmd c;
4897
4898 memset(&c, 0, sizeof(c));
4899 c.op_to_vfn = htonl(V_FW_CMD_OP(FW_VI_CMD) | F_FW_CMD_REQUEST |
4900 F_FW_CMD_WRITE | F_FW_CMD_EXEC |

--- 38 unchanged lines hidden (view full) ---

4939 * @rss_size: size of RSS table slice associated with this VI
4940 *
4941 * backwards compatible and convieniance routine to allocate a Virtual
4942 * Interface with a Ethernet Port Application Function and Intrustion
4943 * Detection System disabled.
4944 */
4945int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
4946 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
4932 unsigned int *rss_size)
4947 u16 *rss_size)
4933{
4934 return t4_alloc_vi_func(adap, mbox, port, pf, vf, nmac, mac, rss_size,
4935 FW_VI_FUNC_ETH, 0);
4936}
4937
4938/**
4939 * t4_free_vi - free a virtual interface
4940 * @adap: the adapter

--- 725 unchanged lines hidden (view full) ---

5666 return field_shift;
5667}
5668
5669int __devinit t4_port_init(struct port_info *p, int mbox, int pf, int vf)
5670{
5671 u8 addr[6];
5672 int ret, i, j;
5673 struct fw_port_cmd c;
4948{
4949 return t4_alloc_vi_func(adap, mbox, port, pf, vf, nmac, mac, rss_size,
4950 FW_VI_FUNC_ETH, 0);
4951}
4952
4953/**
4954 * t4_free_vi - free a virtual interface
4955 * @adap: the adapter

--- 725 unchanged lines hidden (view full) ---

5681 return field_shift;
5682}
5683
5684int __devinit t4_port_init(struct port_info *p, int mbox, int pf, int vf)
5685{
5686 u8 addr[6];
5687 int ret, i, j;
5688 struct fw_port_cmd c;
5674 unsigned int rss_size;
5689 u16 rss_size;
5675 adapter_t *adap = p->adapter;
5676
5677 memset(&c, 0, sizeof(c));
5678
5679 for (i = 0, j = -1; i <= p->port_id; i++) {
5680 do {
5681 j++;
5682 } while ((adap->params.portvec & (1 << j)) == 0);

--- 26 unchanged lines hidden (view full) ---

5709 p->port_type = G_FW_PORT_CMD_PTYPE(ret);
5710 p->mod_type = G_FW_PORT_CMD_MODTYPE(ret);
5711
5712 init_link_config(&p->link_cfg, ntohs(c.u.info.pcap));
5713
5714 return 0;
5715}
5716
5690 adapter_t *adap = p->adapter;
5691
5692 memset(&c, 0, sizeof(c));
5693
5694 for (i = 0, j = -1; i <= p->port_id; i++) {
5695 do {
5696 j++;
5697 } while ((adap->params.portvec & (1 << j)) == 0);

--- 26 unchanged lines hidden (view full) ---

5724 p->port_type = G_FW_PORT_CMD_PTYPE(ret);
5725 p->mod_type = G_FW_PORT_CMD_MODTYPE(ret);
5726
5727 init_link_config(&p->link_cfg, ntohs(c.u.info.pcap));
5728
5729 return 0;
5730}
5731
5717int t4_sched_config(struct adapter *adapter, int type, int minmaxen)
5732int t4_sched_config(struct adapter *adapter, int type, int minmaxen,
5733 int sleep_ok)
5718{
5719 struct fw_sched_cmd cmd;
5720
5721 memset(&cmd, 0, sizeof(cmd));
5722 cmd.op_to_write = cpu_to_be32(V_FW_CMD_OP(FW_SCHED_CMD) |
5723 F_FW_CMD_REQUEST |
5724 F_FW_CMD_WRITE);
5725 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
5726
5727 cmd.u.config.sc = FW_SCHED_SC_CONFIG;
5728 cmd.u.config.type = type;
5729 cmd.u.config.minmaxen = minmaxen;
5730
5731 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
5734{
5735 struct fw_sched_cmd cmd;
5736
5737 memset(&cmd, 0, sizeof(cmd));
5738 cmd.op_to_write = cpu_to_be32(V_FW_CMD_OP(FW_SCHED_CMD) |
5739 F_FW_CMD_REQUEST |
5740 F_FW_CMD_WRITE);
5741 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));
5742
5743 cmd.u.config.sc = FW_SCHED_SC_CONFIG;
5744 cmd.u.config.type = type;
5745 cmd.u.config.minmaxen = minmaxen;
5746
5747 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
5732 NULL, 1);
5748 NULL, sleep_ok);
5733}
5734
5735int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
5736 int rateunit, int ratemode, int channel, int cl,
5749}
5750
5751int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
5752 int rateunit, int ratemode, int channel, int cl,
5737 int minrate, int maxrate, int weight, int pktsize)
5753 int minrate, int maxrate, int weight, int pktsize,
5754 int sleep_ok)
5738{
5739 struct fw_sched_cmd cmd;
5740
5741 memset(&cmd, 0, sizeof(cmd));
5742 cmd.op_to_write = cpu_to_be32(V_FW_CMD_OP(FW_SCHED_CMD) |
5743 F_FW_CMD_REQUEST |
5744 F_FW_CMD_WRITE);
5745 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));

--- 7 unchanged lines hidden (view full) ---

5753 cmd.u.params.unit = rateunit;
5754 cmd.u.params.rate = ratemode;
5755 cmd.u.params.min = cpu_to_be32(minrate);
5756 cmd.u.params.max = cpu_to_be32(maxrate);
5757 cmd.u.params.weight = cpu_to_be16(weight);
5758 cmd.u.params.pktsize = cpu_to_be16(pktsize);
5759
5760 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
5755{
5756 struct fw_sched_cmd cmd;
5757
5758 memset(&cmd, 0, sizeof(cmd));
5759 cmd.op_to_write = cpu_to_be32(V_FW_CMD_OP(FW_SCHED_CMD) |
5760 F_FW_CMD_REQUEST |
5761 F_FW_CMD_WRITE);
5762 cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd));

--- 7 unchanged lines hidden (view full) ---

5770 cmd.u.params.unit = rateunit;
5771 cmd.u.params.rate = ratemode;
5772 cmd.u.params.min = cpu_to_be32(minrate);
5773 cmd.u.params.max = cpu_to_be32(maxrate);
5774 cmd.u.params.weight = cpu_to_be16(weight);
5775 cmd.u.params.pktsize = cpu_to_be16(pktsize);
5776
5777 return t4_wr_mbox_meat(adapter,adapter->mbox, &cmd, sizeof(cmd),
5761 NULL, 1);
5778 NULL, sleep_ok);
5762}
5779}