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cxgb_main.c (170197) cxgb_main.c (170654)
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 14 unchanged lines hidden (view full) ---

23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 14 unchanged lines hidden (view full) ---

23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/cxgb_main.c 170197 2007-06-02 03:02:36Z kmacy $");
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/cxgb_main.c 170654 2007-06-13 05:36:00Z kmacy $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/module.h>
38#include <sys/pciio.h>
39#include <sys/conf.h>

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78#include <dev/cxgb/cxgb_include.h>
79#endif
80
81#ifdef PRIV_SUPPORTED
82#include <sys/priv.h>
83#endif
84
85static int cxgb_setup_msix(adapter_t *, int);
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/bus.h>
37#include <sys/module.h>
38#include <sys/pciio.h>
39#include <sys/conf.h>

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78#include <dev/cxgb/cxgb_include.h>
79#endif
80
81#ifdef PRIV_SUPPORTED
82#include <sys/priv.h>
83#endif
84
85static int cxgb_setup_msix(adapter_t *, int);
86static void cxgb_teardown_msix(adapter_t *);
86static void cxgb_init(void *);
87static void cxgb_init_locked(struct port_info *);
88static void cxgb_stop_locked(struct port_info *);
89static void cxgb_set_rxmode(struct port_info *);
90static int cxgb_ioctl(struct ifnet *, unsigned long, caddr_t);
91static void cxgb_start(struct ifnet *);
92static void cxgb_start_proc(void *, int ncount);
93static int cxgb_media_change(struct ifnet *);

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153
154static driver_t cxgb_port_driver = {
155 "cxgb",
156 cxgb_port_methods,
157 0
158};
159
160static d_ioctl_t cxgb_extension_ioctl;
87static void cxgb_init(void *);
88static void cxgb_init_locked(struct port_info *);
89static void cxgb_stop_locked(struct port_info *);
90static void cxgb_set_rxmode(struct port_info *);
91static int cxgb_ioctl(struct ifnet *, unsigned long, caddr_t);
92static void cxgb_start(struct ifnet *);
93static void cxgb_start_proc(void *, int ncount);
94static int cxgb_media_change(struct ifnet *);

--- 59 unchanged lines hidden (view full) ---

154
155static driver_t cxgb_port_driver = {
156 "cxgb",
157 cxgb_port_methods,
158 0
159};
160
161static d_ioctl_t cxgb_extension_ioctl;
162static d_open_t cxgb_extension_open;
163static d_close_t cxgb_extension_close;
161
164
165static struct cdevsw cxgb_cdevsw = {
166 .d_version = D_VERSION,
167 .d_flags = 0,
168 .d_open = cxgb_extension_open,
169 .d_close = cxgb_extension_close,
170 .d_ioctl = cxgb_extension_ioctl,
171 .d_name = "cxgb",
172};
173
162static devclass_t cxgb_port_devclass;
163DRIVER_MODULE(cxgb, cxgbc, cxgb_port_driver, cxgb_port_devclass, 0, 0);
164
165#define SGE_MSIX_COUNT (SGE_QSETS + 1)
166
167extern int collapse_mbufs;
168/*
169 * The driver uses the best interrupt scheme available on a platform in the

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225 {PCI_VENDOR_ID_CHELSIO, 0x0022, 2, "T310E"},
226 {PCI_VENDOR_ID_CHELSIO, 0x0023, 3, "T320X"},
227 {PCI_VENDOR_ID_CHELSIO, 0x0024, 1, "T302X"},
228 {PCI_VENDOR_ID_CHELSIO, 0x0025, 3, "T320E"},
229 {PCI_VENDOR_ID_CHELSIO, 0x0026, 2, "T310X"},
230 {PCI_VENDOR_ID_CHELSIO, 0x0030, 2, "T3B10"},
231 {PCI_VENDOR_ID_CHELSIO, 0x0031, 3, "T3B20"},
232 {PCI_VENDOR_ID_CHELSIO, 0x0032, 1, "T3B02"},
174static devclass_t cxgb_port_devclass;
175DRIVER_MODULE(cxgb, cxgbc, cxgb_port_driver, cxgb_port_devclass, 0, 0);
176
177#define SGE_MSIX_COUNT (SGE_QSETS + 1)
178
179extern int collapse_mbufs;
180/*
181 * The driver uses the best interrupt scheme available on a platform in the

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237 {PCI_VENDOR_ID_CHELSIO, 0x0022, 2, "T310E"},
238 {PCI_VENDOR_ID_CHELSIO, 0x0023, 3, "T320X"},
239 {PCI_VENDOR_ID_CHELSIO, 0x0024, 1, "T302X"},
240 {PCI_VENDOR_ID_CHELSIO, 0x0025, 3, "T320E"},
241 {PCI_VENDOR_ID_CHELSIO, 0x0026, 2, "T310X"},
242 {PCI_VENDOR_ID_CHELSIO, 0x0030, 2, "T3B10"},
243 {PCI_VENDOR_ID_CHELSIO, 0x0031, 3, "T3B20"},
244 {PCI_VENDOR_ID_CHELSIO, 0x0032, 1, "T3B02"},
245 {PCI_VENDOR_ID_CHELSIO, 0x0033, 4, "T3B04"},
233 {0, 0, 0, NULL}
234};
235
236static struct cxgb_ident *
237cxgb_get_ident(device_t dev)
238{
239 struct cxgb_ident *id;
240

--- 21 unchanged lines hidden (view full) ---

262 return (ai);
263}
264
265static int
266cxgb_controller_probe(device_t dev)
267{
268 const struct adapter_info *ai;
269 char *ports, buf[80];
246 {0, 0, 0, NULL}
247};
248
249static struct cxgb_ident *
250cxgb_get_ident(device_t dev)
251{
252 struct cxgb_ident *id;
253

--- 21 unchanged lines hidden (view full) ---

275 return (ai);
276}
277
278static int
279cxgb_controller_probe(device_t dev)
280{
281 const struct adapter_info *ai;
282 char *ports, buf[80];
270
283 int nports;
284
271 ai = cxgb_get_adapter_info(dev);
272 if (ai == NULL)
273 return (ENXIO);
274
285 ai = cxgb_get_adapter_info(dev);
286 if (ai == NULL)
287 return (ENXIO);
288
275 if (ai->nports == 1)
289 nports = ai->nports0 + ai->nports1;
290 if (nports == 1)
276 ports = "port";
277 else
278 ports = "ports";
279
291 ports = "port";
292 else
293 ports = "ports";
294
280 snprintf(buf, sizeof(buf), "%s RNIC, %d %s", ai->desc, ai->nports, ports);
295 snprintf(buf, sizeof(buf), "%s RNIC, %d %s", ai->desc, nports, ports);
281 device_set_desc_copy(dev, buf);
282 return (BUS_PROBE_DEFAULT);
283}
284
285static int
286upgrade_fw(adapter_t *sc)
287{
288 char buf[32];

--- 47 unchanged lines hidden (view full) ---

336 }
337 if (sc->link_width != 0 && sc->link_width <= 4) {
338 device_printf(sc->dev,
339 "PCIe x%d Link, expect reduced performance\n",
340 sc->link_width);
341 }
342
343 pci_enable_busmaster(dev);
296 device_set_desc_copy(dev, buf);
297 return (BUS_PROBE_DEFAULT);
298}
299
300static int
301upgrade_fw(adapter_t *sc)
302{
303 char buf[32];

--- 47 unchanged lines hidden (view full) ---

351 }
352 if (sc->link_width != 0 && sc->link_width <= 4) {
353 device_printf(sc->dev,
354 "PCIe x%d Link, expect reduced performance\n",
355 sc->link_width);
356 }
357
358 pci_enable_busmaster(dev);
344
345 /*
346 * Allocate the registers and make them available to the driver.
347 * The registers that we care about for NIC mode are in BAR 0
348 */
349 sc->regs_rid = PCIR_BAR(0);
350 if ((sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
351 &sc->regs_rid, RF_ACTIVE)) == NULL) {
352 device_printf(dev, "Cannot allocate BAR\n");
353 return (ENXIO);
354 }
355
356 mtx_init(&sc->sge.reg_lock, "SGE reg lock", NULL, MTX_DEF);
357 mtx_init(&sc->lock, "cxgb controller lock", NULL, MTX_DEF);
358 mtx_init(&sc->mdio_lock, "cxgb mdio", NULL, MTX_DEF);
359 /*
360 * Allocate the registers and make them available to the driver.
361 * The registers that we care about for NIC mode are in BAR 0
362 */
363 sc->regs_rid = PCIR_BAR(0);
364 if ((sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
365 &sc->regs_rid, RF_ACTIVE)) == NULL) {
366 device_printf(dev, "Cannot allocate BAR\n");
367 return (ENXIO);
368 }
369
370 mtx_init(&sc->sge.reg_lock, "SGE reg lock", NULL, MTX_DEF);
371 mtx_init(&sc->lock, "cxgb controller lock", NULL, MTX_DEF);
372 mtx_init(&sc->mdio_lock, "cxgb mdio", NULL, MTX_DEF);
373 mtx_init(&sc->elmer_lock, "cxgb elmer", NULL, MTX_DEF);
359
360 sc->bt = rman_get_bustag(sc->regs_res);
361 sc->bh = rman_get_bushandle(sc->regs_res);
362 sc->mmio_len = rman_get_size(sc->regs_res);
363
364 ai = cxgb_get_adapter_info(dev);
365 if (t3_prep_adapter(sc, ai, 1) < 0) {
374
375 sc->bt = rman_get_bustag(sc->regs_res);
376 sc->bh = rman_get_bushandle(sc->regs_res);
377 sc->mmio_len = rman_get_size(sc->regs_res);
378
379 ai = cxgb_get_adapter_info(dev);
380 if (t3_prep_adapter(sc, ai, 1) < 0) {
381 printf("prep adapter failed\n");
366 error = ENODEV;
367 goto out;
368 }
382 error = ENODEV;
383 goto out;
384 }
369
370 /* Allocate the BAR for doing MSI-X. If it succeeds, try to allocate
371 * enough messages for the queue sets. If that fails, try falling
372 * back to MSI. If that fails, then try falling back to the legacy
373 * interrupt pin model.
374 */
375#ifdef MSI_SUPPORTED
376
377 sc->msix_regs_rid = 0x20;

--- 95 unchanged lines hidden (view full) ---

473 goto out;
474
475 /*
476 * XXX need to poll for link status
477 */
478 sc->params.stats_update_period = 1;
479
480 /* initialize sge private state */
385 /* Allocate the BAR for doing MSI-X. If it succeeds, try to allocate
386 * enough messages for the queue sets. If that fails, try falling
387 * back to MSI. If that fails, then try falling back to the legacy
388 * interrupt pin model.
389 */
390#ifdef MSI_SUPPORTED
391
392 sc->msix_regs_rid = 0x20;

--- 95 unchanged lines hidden (view full) ---

488 goto out;
489
490 /*
491 * XXX need to poll for link status
492 */
493 sc->params.stats_update_period = 1;
494
495 /* initialize sge private state */
481 t3_sge_init_sw(sc);
496 t3_sge_init_adapter(sc);
482
483 t3_led_ready(sc);
484
485 cxgb_offload_init();
486 if (is_offload(sc)) {
487 setbit(&sc->registered_device_map, OFFLOAD_DEVMAP_BIT);
488 cxgb_adapter_ofld(sc);
489 }

--- 59 unchanged lines hidden (view full) ---

549 }
550
551 for (i = 0; i < (sc)->params.nports; ++i) {
552 if (sc->portdev[i] != NULL)
553 device_delete_child(sc->dev, sc->portdev[i]);
554 }
555
556 bus_generic_detach(sc->dev);
497
498 t3_led_ready(sc);
499
500 cxgb_offload_init();
501 if (is_offload(sc)) {
502 setbit(&sc->registered_device_map, OFFLOAD_DEVMAP_BIT);
503 cxgb_adapter_ofld(sc);
504 }

--- 59 unchanged lines hidden (view full) ---

564 }
565
566 for (i = 0; i < (sc)->params.nports; ++i) {
567 if (sc->portdev[i] != NULL)
568 device_delete_child(sc->dev, sc->portdev[i]);
569 }
570
571 bus_generic_detach(sc->dev);
557
572#ifdef notyet
558 if (is_offload(sc)) {
559 cxgb_adapter_unofld(sc);
560 if (isset(&sc->open_device_map, OFFLOAD_DEVMAP_BIT))
561 offload_close(&sc->tdev);
562 }
573 if (is_offload(sc)) {
574 cxgb_adapter_unofld(sc);
575 if (isset(&sc->open_device_map, OFFLOAD_DEVMAP_BIT))
576 offload_close(&sc->tdev);
577 }
578#endif
563 t3_free_sge_resources(sc);
564 t3_sge_free(sc);
565
566 if (sc->regs_res != NULL)
567 bus_release_resource(sc->dev, SYS_RES_MEMORY, sc->regs_rid,
568 sc->regs_res);
569
570 mtx_destroy(&sc->mdio_lock);

--- 40 unchanged lines hidden (view full) ---

611 return (err);
612 }
613 }
614 }
615
616 return (0);
617}
618
579 t3_free_sge_resources(sc);
580 t3_sge_free(sc);
581
582 if (sc->regs_res != NULL)
583 bus_release_resource(sc->dev, SYS_RES_MEMORY, sc->regs_rid,
584 sc->regs_res);
585
586 mtx_destroy(&sc->mdio_lock);

--- 40 unchanged lines hidden (view full) ---

627 return (err);
628 }
629 }
630 }
631
632 return (0);
633}
634
635static void
636cxgb_teardown_msix(adapter_t *sc)
637{
638 int i, nqsets;
639
640 for (nqsets = i = 0; i < (sc)->params.nports; i++)
641 nqsets += sc->port[i].nqsets;
642
643 for (i = 0; i < nqsets; i++) {
644 if (sc->msix_intr_tag[i] != NULL) {
645 bus_teardown_intr(sc->dev, sc->msix_irq_res[i],
646 sc->msix_intr_tag[i]);
647 sc->msix_intr_tag[i] = NULL;
648 }
649 if (sc->msix_irq_res[i] != NULL) {
650 bus_release_resource(sc->dev, SYS_RES_IRQ,
651 sc->msix_irq_rid[i], sc->msix_irq_res[i]);
652 sc->msix_irq_res[i] = NULL;
653 }
654 }
655}
656
619static int
620cxgb_setup_msix(adapter_t *sc, int msix_count)
621{
622 int i, j, k, nqsets, rid;
623
624 /* The first message indicates link changes and error conditions */
625 sc->irq_rid = 1;
626 if ((sc->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,

--- 5 unchanged lines hidden (view full) ---

632 if (bus_setup_intr(sc->dev, sc->irq_res, INTR_MPSAFE|INTR_TYPE_NET,
633#ifdef INTR_FILTERS
634 NULL,
635#endif
636 cxgb_async_intr, sc, &sc->intr_tag)) {
637 device_printf(sc->dev, "Cannot set up interrupt\n");
638 return (EINVAL);
639 }
657static int
658cxgb_setup_msix(adapter_t *sc, int msix_count)
659{
660 int i, j, k, nqsets, rid;
661
662 /* The first message indicates link changes and error conditions */
663 sc->irq_rid = 1;
664 if ((sc->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,

--- 5 unchanged lines hidden (view full) ---

670 if (bus_setup_intr(sc->dev, sc->irq_res, INTR_MPSAFE|INTR_TYPE_NET,
671#ifdef INTR_FILTERS
672 NULL,
673#endif
674 cxgb_async_intr, sc, &sc->intr_tag)) {
675 device_printf(sc->dev, "Cannot set up interrupt\n");
676 return (EINVAL);
677 }
640 for (i = 0, k = 0; i < (sc)->params.nports; ++i) {
678 for (i = k = 0; i < (sc)->params.nports; i++) {
641 nqsets = sc->port[i].nqsets;
679 nqsets = sc->port[i].nqsets;
642 for (j = 0; j < nqsets; ++j, k++) {
680 for (j = 0; j < nqsets; j++, k++) {
643 struct sge_qset *qs = &sc->sge.qs[k];
644
645 rid = k + 2;
646 if (cxgb_debug)
647 printf("rid=%d ", rid);
648 if ((sc->msix_irq_res[k] = bus_alloc_resource_any(
649 sc->dev, SYS_RES_IRQ, &rid,
650 RF_SHAREABLE | RF_ACTIVE)) == NULL) {
651 device_printf(sc->dev, "Cannot allocate "
652 "interrupt for message %d\n", rid);
653 return (EINVAL);
654 }
655 sc->msix_irq_rid[k] = rid;
681 struct sge_qset *qs = &sc->sge.qs[k];
682
683 rid = k + 2;
684 if (cxgb_debug)
685 printf("rid=%d ", rid);
686 if ((sc->msix_irq_res[k] = bus_alloc_resource_any(
687 sc->dev, SYS_RES_IRQ, &rid,
688 RF_SHAREABLE | RF_ACTIVE)) == NULL) {
689 device_printf(sc->dev, "Cannot allocate "
690 "interrupt for message %d\n", rid);
691 return (EINVAL);
692 }
693 sc->msix_irq_rid[k] = rid;
656 if (bus_setup_intr(sc->dev, sc->msix_irq_res[j],
694 if (bus_setup_intr(sc->dev, sc->msix_irq_res[k],
657 INTR_MPSAFE|INTR_TYPE_NET,
658#ifdef INTR_FILTERS
659 NULL,
660#endif
661 t3_intr_msix, qs, &sc->msix_intr_tag[k])) {
662 device_printf(sc->dev, "Cannot set up "
663 "interrupt for message %d\n", rid);
664 return (EINVAL);

--- 17 unchanged lines hidden (view full) ---

682 device_set_desc_copy(dev, buf);
683 return (0);
684}
685
686
687static int
688cxgb_makedev(struct port_info *pi)
689{
695 INTR_MPSAFE|INTR_TYPE_NET,
696#ifdef INTR_FILTERS
697 NULL,
698#endif
699 t3_intr_msix, qs, &sc->msix_intr_tag[k])) {
700 device_printf(sc->dev, "Cannot set up "
701 "interrupt for message %d\n", rid);
702 return (EINVAL);

--- 17 unchanged lines hidden (view full) ---

720 device_set_desc_copy(dev, buf);
721 return (0);
722}
723
724
725static int
726cxgb_makedev(struct port_info *pi)
727{
690 struct cdevsw *cxgb_cdevsw;
691
692 if ((cxgb_cdevsw = malloc(sizeof(struct cdevsw), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL)
693 return (ENOMEM);
694
728
695 cxgb_cdevsw->d_version = D_VERSION;
696 cxgb_cdevsw->d_name = strdup(pi->ifp->if_xname, M_DEVBUF);
697 cxgb_cdevsw->d_ioctl = cxgb_extension_ioctl;
729 pi->port_cdev = make_dev(&cxgb_cdevsw, pi->ifp->if_dunit,
730 UID_ROOT, GID_WHEEL, 0600, if_name(pi->ifp));
698
731
699 pi->port_cdev = make_dev(cxgb_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600,
700 pi->ifp->if_xname);
701
702 if (pi->port_cdev == NULL)
703 return (ENOMEM);
704
705 pi->port_cdev->si_drv1 = (void *)pi;
706
707 return (0);
708}
709

--- 11 unchanged lines hidden (view full) ---

721#endif
722
723
724static int
725cxgb_port_attach(device_t dev)
726{
727 struct port_info *p;
728 struct ifnet *ifp;
732 if (pi->port_cdev == NULL)
733 return (ENOMEM);
734
735 pi->port_cdev->si_drv1 = (void *)pi;
736
737 return (0);
738}
739

--- 11 unchanged lines hidden (view full) ---

751#endif
752
753
754static int
755cxgb_port_attach(device_t dev)
756{
757 struct port_info *p;
758 struct ifnet *ifp;
729 int media_flags;
730 int err;
759 int err, media_flags;
731 char buf[64];
732
733 p = device_get_softc(dev);
734
735 snprintf(buf, sizeof(buf), "cxgb port %d", p->port);
736 mtx_init(&p->lock, buf, 0, MTX_DEF);
737
738 /* Allocate an ifnet object and set it up */

--- 18 unchanged lines hidden (view full) ---

757 ifp->if_snd.ifq_drv_maxlen = TX_ETH_Q_SIZE;
758 IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
759 IFQ_SET_READY(&ifp->if_snd);
760
761 ifp->if_hwassist = ifp->if_capabilities = ifp->if_capenable = 0;
762 ifp->if_capabilities |= CXGB_CAP;
763 ifp->if_capenable |= CXGB_CAP_ENABLE;
764 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO);
760 char buf[64];
761
762 p = device_get_softc(dev);
763
764 snprintf(buf, sizeof(buf), "cxgb port %d", p->port);
765 mtx_init(&p->lock, buf, 0, MTX_DEF);
766
767 /* Allocate an ifnet object and set it up */

--- 18 unchanged lines hidden (view full) ---

786 ifp->if_snd.ifq_drv_maxlen = TX_ETH_Q_SIZE;
787 IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
788 IFQ_SET_READY(&ifp->if_snd);
789
790 ifp->if_hwassist = ifp->if_capabilities = ifp->if_capenable = 0;
791 ifp->if_capabilities |= CXGB_CAP;
792 ifp->if_capenable |= CXGB_CAP_ENABLE;
793 ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO);
765 ifp->if_baudrate = 100000000;
766
767 ether_ifattach(ifp, p->hw_addr);
768#ifdef DEFAULT_JUMBO
769 ifp->if_mtu = 9000;
770#endif
771 if ((err = cxgb_makedev(p)) != 0) {
772 printf("makedev failed %d\n", err);
773 return (err);
774 }
775 ifmedia_init(&p->media, IFM_IMASK, cxgb_media_change,
776 cxgb_media_status);
794
795 ether_ifattach(ifp, p->hw_addr);
796#ifdef DEFAULT_JUMBO
797 ifp->if_mtu = 9000;
798#endif
799 if ((err = cxgb_makedev(p)) != 0) {
800 printf("makedev failed %d\n", err);
801 return (err);
802 }
803 ifmedia_init(&p->media, IFM_IMASK, cxgb_media_change,
804 cxgb_media_status);
777
778 if (!strcmp(p->port_type->desc, "10GBASE-CX4"))
779 media_flags = IFM_ETHER | IFM_10G_CX4;
780 else if (!strcmp(p->port_type->desc, "10GBASE-SR"))
781 media_flags = IFM_ETHER | IFM_10G_SR;
782 else if (!strcmp(p->port_type->desc, "10GBASE-XR"))
783 media_flags = IFM_ETHER | IFM_10G_LR;
784 else {
805
806 if (!strcmp(p->port_type->desc, "10GBASE-CX4")) {
807 media_flags = IFM_ETHER | IFM_10G_CX4 | IFM_FDX;
808 } else if (!strcmp(p->port_type->desc, "10GBASE-SR")) {
809 media_flags = IFM_ETHER | IFM_10G_SR | IFM_FDX;
810 } else if (!strcmp(p->port_type->desc, "10GBASE-XR")) {
811 media_flags = IFM_ETHER | IFM_10G_LR | IFM_FDX;
812 } else if (!strcmp(p->port_type->desc, "10/100/1000BASE-T")) {
813 ifmedia_add(&p->media, IFM_ETHER | IFM_10_T, 0, NULL);
814 ifmedia_add(&p->media, IFM_ETHER | IFM_10_T | IFM_FDX,
815 0, NULL);
816 ifmedia_add(&p->media, IFM_ETHER | IFM_100_TX,
817 0, NULL);
818 ifmedia_add(&p->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
819 0, NULL);
820 ifmedia_add(&p->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
821 0, NULL);
822 media_flags = 0;
823 } else {
785 printf("unsupported media type %s\n", p->port_type->desc);
786 return (ENXIO);
787 }
824 printf("unsupported media type %s\n", p->port_type->desc);
825 return (ENXIO);
826 }
788
789 ifmedia_add(&p->media, media_flags, 0, NULL);
790 ifmedia_add(&p->media, IFM_ETHER | IFM_AUTO, 0, NULL);
791 ifmedia_set(&p->media, media_flags);
827 if (media_flags) {
828 ifmedia_add(&p->media, media_flags, 0, NULL);
829 ifmedia_set(&p->media, media_flags);
830 } else {
831 ifmedia_add(&p->media, IFM_ETHER | IFM_AUTO, 0, NULL);
832 ifmedia_set(&p->media, IFM_ETHER | IFM_AUTO);
833 }
792
834
835
793 snprintf(buf, sizeof(buf), "cxgb_port_taskq%d", p->port);
794#ifdef TASKQUEUE_CURRENT
795 /* Create a port for handling TX without starvation */
796 p->tq = taskqueue_create(buf, M_NOWAIT,
797 taskqueue_thread_enqueue, &p->tq);
798#else
799 /* Create a port for handling TX without starvation */
800 p->tq = taskqueue_create_fast(buf, M_NOWAIT,
801 taskqueue_thread_enqueue, &p->tq);
802#endif
836 snprintf(buf, sizeof(buf), "cxgb_port_taskq%d", p->port);
837#ifdef TASKQUEUE_CURRENT
838 /* Create a port for handling TX without starvation */
839 p->tq = taskqueue_create(buf, M_NOWAIT,
840 taskqueue_thread_enqueue, &p->tq);
841#else
842 /* Create a port for handling TX without starvation */
843 p->tq = taskqueue_create_fast(buf, M_NOWAIT,
844 taskqueue_thread_enqueue, &p->tq);
845#endif
803
804
846
805 if (p->tq == NULL) {
806 device_printf(dev, "failed to allocate port task queue\n");
807 return (ENOMEM);
808 }
809 taskqueue_start_threads(&p->tq, 1, PI_NET, "%s taskq",
810 device_get_nameunit(dev));
811 TASK_INIT(&p->start_task, 0, cxgb_start_proc, ifp);
812
847 if (p->tq == NULL) {
848 device_printf(dev, "failed to allocate port task queue\n");
849 return (ENOMEM);
850 }
851 taskqueue_start_threads(&p->tq, 1, PI_NET, "%s taskq",
852 device_get_nameunit(dev));
853 TASK_INIT(&p->start_task, 0, cxgb_start_proc, ifp);
854
813
855 t3_sge_init_port(p);
856
814 return (0);
815}
816
817static int
818cxgb_port_detach(device_t dev)
819{
820 struct port_info *p;
821
822 p = device_get_softc(dev);
823
824 PORT_LOCK(p);
857 return (0);
858}
859
860static int
861cxgb_port_detach(device_t dev)
862{
863 struct port_info *p;
864
865 p = device_get_softc(dev);
866
867 PORT_LOCK(p);
825 cxgb_stop_locked(p);
868 if (p->ifp->if_drv_flags & IFF_DRV_RUNNING)
869 cxgb_stop_locked(p);
826 PORT_UNLOCK(p);
827
828 mtx_destroy(&p->lock);
829 if (p->tq != NULL) {
830 taskqueue_drain(p->tq, &p->start_task);
831 taskqueue_free(p->tq);
832 p->tq = NULL;
833 }
834
835 ether_ifdetach(p->ifp);
836 if_free(p->ifp);
837
870 PORT_UNLOCK(p);
871
872 mtx_destroy(&p->lock);
873 if (p->tq != NULL) {
874 taskqueue_drain(p->tq, &p->start_task);
875 taskqueue_free(p->tq);
876 p->tq = NULL;
877 }
878
879 ether_ifdetach(p->ifp);
880 if_free(p->ifp);
881
838 destroy_dev(p->port_cdev);
839
840
882 if (p->port_cdev != NULL)
883 destroy_dev(p->port_cdev);
884
841 return (0);
842}
843
844void
845t3_fatal_err(struct adapter *sc)
846{
847 u_int fw_status[4];
848

--- 153 unchanged lines hidden (view full) ---

1002 struct ifnet *ifp;
1003 struct t3_rx_mode rm;
1004 struct cmac *mac = &p->mac;
1005
1006 ifp = p->ifp;
1007
1008 t3_init_rx_mode(&rm, p);
1009 t3_mac_reset(mac);
885 return (0);
886}
887
888void
889t3_fatal_err(struct adapter *sc)
890{
891 u_int fw_status[4];
892

--- 153 unchanged lines hidden (view full) ---

1046 struct ifnet *ifp;
1047 struct t3_rx_mode rm;
1048 struct cmac *mac = &p->mac;
1049
1050 ifp = p->ifp;
1051
1052 t3_init_rx_mode(&rm, p);
1053 t3_mac_reset(mac);
1010 t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN);
1054 t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN);
1011 t3_mac_set_address(mac, 0, p->hw_addr);
1012 t3_mac_set_rx_mode(mac, &rm);
1013 t3_link_start(&p->phy, mac, &p->link_config);
1014 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
1015}
1016
1017/**
1018 * setup_rss - configure Receive Side Steering (per-queue connection demux)

--- 36 unchanged lines hidden (view full) ---

1055static inline int
1056offload_tx(struct toedev *tdev, struct mbuf *m)
1057{
1058 int ret;
1059
1060 critical_enter();
1061 ret = t3_offload_tx(tdev, m);
1062 critical_exit();
1055 t3_mac_set_address(mac, 0, p->hw_addr);
1056 t3_mac_set_rx_mode(mac, &rm);
1057 t3_link_start(&p->phy, mac, &p->link_config);
1058 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
1059}
1060
1061/**
1062 * setup_rss - configure Receive Side Steering (per-queue connection demux)

--- 36 unchanged lines hidden (view full) ---

1099static inline int
1100offload_tx(struct toedev *tdev, struct mbuf *m)
1101{
1102 int ret;
1103
1104 critical_enter();
1105 ret = t3_offload_tx(tdev, m);
1106 critical_exit();
1063 return ret;
1107 return (ret);
1064}
1065
1066static int
1067write_smt_entry(struct adapter *adapter, int idx)
1068{
1069 struct port_info *pi = &adapter->port[idx];
1070 struct cpl_smt_write_req *req;
1071 struct mbuf *m;

--- 58 unchanged lines hidden (view full) ---

1130 }
1131}
1132
1133static void
1134bind_qsets(adapter_t *sc)
1135{
1136 int i, j;
1137
1108}
1109
1110static int
1111write_smt_entry(struct adapter *adapter, int idx)
1112{
1113 struct port_info *pi = &adapter->port[idx];
1114 struct cpl_smt_write_req *req;
1115 struct mbuf *m;

--- 58 unchanged lines hidden (view full) ---

1174 }
1175}
1176
1177static void
1178bind_qsets(adapter_t *sc)
1179{
1180 int i, j;
1181
1138 if (singleq)
1139 return;
1140
1141 for (i = 0; i < (sc)->params.nports; ++i) {
1142 const struct port_info *pi = adap2pinfo(sc, i);
1143
1144 for (j = 0; j < pi->nqsets; ++j)
1145 send_pktsched_cmd(sc, 1, pi->first_qset + j, -1,
1146 -1, i);
1147 }
1148}

--- 75 unchanged lines hidden (view full) ---

1224
1225/*
1226 * Release resources when all the ports and offloading have been stopped.
1227 */
1228static void
1229cxgb_down(struct adapter *sc)
1230{
1231 int i;
1182 for (i = 0; i < (sc)->params.nports; ++i) {
1183 const struct port_info *pi = adap2pinfo(sc, i);
1184
1185 for (j = 0; j < pi->nqsets; ++j)
1186 send_pktsched_cmd(sc, 1, pi->first_qset + j, -1,
1187 -1, i);
1188 }
1189}

--- 75 unchanged lines hidden (view full) ---

1265
1266/*
1267 * Release resources when all the ports and offloading have been stopped.
1268 */
1269static void
1270cxgb_down(struct adapter *sc)
1271{
1272 int i;
1232
1273
1233 t3_sge_stop(sc);
1274 t3_sge_stop(sc);
1275 ADAPTER_LOCK(sc);
1234 t3_intr_disable(sc);
1276 t3_intr_disable(sc);
1277 ADAPTER_UNLOCK(sc);
1235
1278
1236 for (i = 0; i < SGE_QSETS; i++) {
1237 if (sc->msix_intr_tag[i] != NULL) {
1238 bus_teardown_intr(sc->dev, sc->msix_irq_res[i],
1239 sc->msix_intr_tag[i]);
1240 sc->msix_intr_tag[i] = NULL;
1241 }
1242 if (sc->msix_irq_res[i] != NULL) {
1243 bus_release_resource(sc->dev, SYS_RES_IRQ,
1244 sc->msix_irq_rid[i], sc->msix_irq_res[i]);
1245 sc->msix_irq_res[i] = NULL;
1246 }
1247 }
1248
1279
1249 if (sc->intr_tag != NULL) {
1250 bus_teardown_intr(sc->dev, sc->irq_res, sc->intr_tag);
1251 sc->intr_tag = NULL;
1252 }
1253 if (sc->irq_res != NULL) {
1254 device_printf(sc->dev, "de-allocating interrupt irq_rid=%d irq_res=%p\n",
1255 sc->irq_rid, sc->irq_res);
1256 bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irq_rid,
1257 sc->irq_res);
1258 sc->irq_res = NULL;
1259 }
1280 if (sc->intr_tag != NULL) {
1281 bus_teardown_intr(sc->dev, sc->irq_res, sc->intr_tag);
1282 sc->intr_tag = NULL;
1283 }
1284 if (sc->irq_res != NULL) {
1285 device_printf(sc->dev, "de-allocating interrupt irq_rid=%d irq_res=%p\n",
1286 sc->irq_rid, sc->irq_res);
1287 bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irq_rid,
1288 sc->irq_res);
1289 sc->irq_res = NULL;
1290 }
1291
1292 if (sc->flags & USING_MSIX)
1293 cxgb_teardown_msix(sc);
1260
1261 callout_drain(&sc->sge_timer_ch);
1294
1295 callout_drain(&sc->sge_timer_ch);
1262 taskqueue_drain(sc->tq, &sc->slow_intr_task);
1263 taskqueue_drain(sc->tq, &sc->timer_reclaim_task);
1296 if (sc->tq != NULL)
1297 taskqueue_drain(sc->tq, &sc->slow_intr_task);
1298 for (i = 0; i < sc->params.nports; i++)
1299 if (sc->port[i].tq != NULL)
1300 taskqueue_drain(sc->port[i].tq, &sc->port[i].timer_reclaim_task);
1301
1264}
1265
1266static int
1267offload_open(struct port_info *pi)
1268{
1269 struct adapter *adapter = pi->adapter;
1270 struct toedev *tdev = TOEDEV(pi->ifp);
1271 int adap_up = adapter->open_device_map & PORT_MASK;

--- 38 unchanged lines hidden (view full) ---

1310}
1311
1312static int
1313offload_close(struct toedev *tdev)
1314{
1315 struct adapter *adapter = tdev2adap(tdev);
1316
1317 if (!isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT))
1302}
1303
1304static int
1305offload_open(struct port_info *pi)
1306{
1307 struct adapter *adapter = pi->adapter;
1308 struct toedev *tdev = TOEDEV(pi->ifp);
1309 int adap_up = adapter->open_device_map & PORT_MASK;

--- 38 unchanged lines hidden (view full) ---

1348}
1349
1350static int
1351offload_close(struct toedev *tdev)
1352{
1353 struct adapter *adapter = tdev2adap(tdev);
1354
1355 if (!isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT))
1318 return 0;
1356 return (0);
1319
1320 /* Call back all registered clients */
1321 cxgb_remove_clients(tdev);
1322 tdev->lldev = NULL;
1323 cxgb_set_dummy_ops(tdev);
1324 t3_tp_set_offload_mode(adapter, 0);
1325 clrbit(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT);
1326
1327 ADAPTER_LOCK(adapter);
1328 if (!adapter->open_device_map)
1329 cxgb_down(adapter);
1330 ADAPTER_UNLOCK(adapter);
1331
1332 cxgb_offload_deactivate(adapter);
1357
1358 /* Call back all registered clients */
1359 cxgb_remove_clients(tdev);
1360 tdev->lldev = NULL;
1361 cxgb_set_dummy_ops(tdev);
1362 t3_tp_set_offload_mode(adapter, 0);
1363 clrbit(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT);
1364
1365 ADAPTER_LOCK(adapter);
1366 if (!adapter->open_device_map)
1367 cxgb_down(adapter);
1368 ADAPTER_UNLOCK(adapter);
1369
1370 cxgb_offload_deactivate(adapter);
1333 return 0;
1371 return (0);
1334}
1335
1336static void
1337cxgb_init(void *arg)
1338{
1339 struct port_info *p = arg;
1340
1341 PORT_LOCK(p);

--- 16 unchanged lines hidden (view full) ---

1358 ADAPTER_UNLOCK(p->adapter);
1359 cxgb_stop_locked(p);
1360 return;
1361 }
1362 if (p->adapter->open_device_map == 0)
1363 t3_intr_clear(sc);
1364
1365 setbit(&p->adapter->open_device_map, p->port);
1372}
1373
1374static void
1375cxgb_init(void *arg)
1376{
1377 struct port_info *p = arg;
1378
1379 PORT_LOCK(p);

--- 16 unchanged lines hidden (view full) ---

1396 ADAPTER_UNLOCK(p->adapter);
1397 cxgb_stop_locked(p);
1398 return;
1399 }
1400 if (p->adapter->open_device_map == 0)
1401 t3_intr_clear(sc);
1402
1403 setbit(&p->adapter->open_device_map, p->port);
1366
1367 ADAPTER_UNLOCK(p->adapter);
1404 ADAPTER_UNLOCK(p->adapter);
1405
1368 if (is_offload(sc) && !ofld_disable) {
1369 err = offload_open(p);
1370 if (err)
1371 log(LOG_WARNING,
1372 "Could not initialize offload capabilities\n");
1373 }
1374 cxgb_link_start(p);
1406 if (is_offload(sc) && !ofld_disable) {
1407 err = offload_open(p);
1408 if (err)
1409 log(LOG_WARNING,
1410 "Could not initialize offload capabilities\n");
1411 }
1412 cxgb_link_start(p);
1413 t3_link_changed(sc, p->port);
1414 ifp->if_baudrate = p->link_config.speed * 1000000;
1415
1375 t3_port_intr_enable(sc, p->port);
1376
1377 callout_reset(&sc->cxgb_tick_ch, sc->params.stats_update_period * hz,
1378 cxgb_tick, sc);
1379
1380 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1381 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1382}
1383
1384static void
1385cxgb_set_rxmode(struct port_info *p)
1386{
1387 struct t3_rx_mode rm;
1388 struct cmac *mac = &p->mac;
1389
1390 mtx_assert(&p->lock, MA_OWNED);
1416 t3_port_intr_enable(sc, p->port);
1417
1418 callout_reset(&sc->cxgb_tick_ch, sc->params.stats_update_period * hz,
1419 cxgb_tick, sc);
1420
1421 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1422 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1423}
1424
1425static void
1426cxgb_set_rxmode(struct port_info *p)
1427{
1428 struct t3_rx_mode rm;
1429 struct cmac *mac = &p->mac;
1430
1431 mtx_assert(&p->lock, MA_OWNED);
1391
1432
1392 t3_init_rx_mode(&rm, p);
1393 t3_mac_set_rx_mode(mac, &rm);
1394}
1395
1396static void
1397cxgb_stop_locked(struct port_info *p)
1398{
1399 struct ifnet *ifp;
1400
1401 mtx_assert(&p->lock, MA_OWNED);
1402 mtx_assert(&p->adapter->lock, MA_NOTOWNED);
1433 t3_init_rx_mode(&rm, p);
1434 t3_mac_set_rx_mode(mac, &rm);
1435}
1436
1437static void
1438cxgb_stop_locked(struct port_info *p)
1439{
1440 struct ifnet *ifp;
1441
1442 mtx_assert(&p->lock, MA_OWNED);
1443 mtx_assert(&p->adapter->lock, MA_NOTOWNED);
1403
1444
1404 ifp = p->ifp;
1405
1406 t3_port_intr_disable(p->adapter, p->port);
1445 ifp = p->ifp;
1446
1447 t3_port_intr_disable(p->adapter, p->port);
1407 PORT_LOCK(p);
1408 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1448 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1409 PORT_UNLOCK(p);
1410 p->phy.ops->power_down(&p->phy, 1);
1411 t3_mac_disable(&p->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
1412
1413 ADAPTER_LOCK(p->adapter);
1414 clrbit(&p->adapter->open_device_map, p->port);
1415 /*
1416 * XXX cancel check_task
1417 */
1418 if (p->adapter->open_device_map == 0)
1419 cxgb_down(p->adapter);
1420 ADAPTER_UNLOCK(p->adapter);
1421}
1422
1423static int
1449 p->phy.ops->power_down(&p->phy, 1);
1450 t3_mac_disable(&p->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
1451
1452 ADAPTER_LOCK(p->adapter);
1453 clrbit(&p->adapter->open_device_map, p->port);
1454 /*
1455 * XXX cancel check_task
1456 */
1457 if (p->adapter->open_device_map == 0)
1458 cxgb_down(p->adapter);
1459 ADAPTER_UNLOCK(p->adapter);
1460}
1461
1462static int
1463cxgb_set_mtu(struct port_info *p, int mtu)
1464{
1465 struct ifnet *ifp = p->ifp;
1466 int error = 0;
1467
1468 if ((mtu < ETHERMIN) || (mtu > ETHER_MAX_LEN_JUMBO))
1469 error = EINVAL;
1470 else if (ifp->if_mtu != mtu) {
1471 PORT_LOCK(p);
1472 ifp->if_mtu = mtu;
1473 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1474 callout_stop(&p->adapter->cxgb_tick_ch);
1475 cxgb_stop_locked(p);
1476 cxgb_init_locked(p);
1477 }
1478 PORT_UNLOCK(p);
1479 }
1480 return (error);
1481}
1482
1483static int
1424cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
1425{
1426 struct port_info *p = ifp->if_softc;
1427 struct ifaddr *ifa = (struct ifaddr *)data;
1428 struct ifreq *ifr = (struct ifreq *)data;
1429 int flags, error = 0;
1430 uint32_t mask;
1431
1432 /*
1433 * XXX need to check that we aren't in the middle of an unload
1434 */
1435 switch (command) {
1436 case SIOCSIFMTU:
1484cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
1485{
1486 struct port_info *p = ifp->if_softc;
1487 struct ifaddr *ifa = (struct ifaddr *)data;
1488 struct ifreq *ifr = (struct ifreq *)data;
1489 int flags, error = 0;
1490 uint32_t mask;
1491
1492 /*
1493 * XXX need to check that we aren't in the middle of an unload
1494 */
1495 switch (command) {
1496 case SIOCSIFMTU:
1437 if ((ifr->ifr_mtu < ETHERMIN) ||
1438 (ifr->ifr_mtu > ETHER_MAX_LEN_JUMBO))
1439 error = EINVAL;
1440 else if (ifp->if_mtu != ifr->ifr_mtu) {
1441 PORT_LOCK(p);
1442 ifp->if_mtu = ifr->ifr_mtu;
1443 t3_mac_set_mtu(&p->mac, ifp->if_mtu + ETHER_HDR_LEN);
1444 PORT_UNLOCK(p);
1445 }
1497 error = cxgb_set_mtu(p, ifr->ifr_mtu);
1446 break;
1447 case SIOCSIFADDR:
1448 case SIOCGIFADDR:
1498 break;
1499 case SIOCSIFADDR:
1500 case SIOCGIFADDR:
1501 PORT_LOCK(p);
1449 if (ifa->ifa_addr->sa_family == AF_INET) {
1450 ifp->if_flags |= IFF_UP;
1502 if (ifa->ifa_addr->sa_family == AF_INET) {
1503 ifp->if_flags |= IFF_UP;
1451 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1452 cxgb_init(p);
1453 }
1504 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1505 cxgb_init_locked(p);
1454 arp_ifinit(ifp, ifa);
1455 } else
1456 error = ether_ioctl(ifp, command, data);
1506 arp_ifinit(ifp, ifa);
1507 } else
1508 error = ether_ioctl(ifp, command, data);
1509 PORT_UNLOCK(p);
1457 break;
1458 case SIOCSIFFLAGS:
1510 break;
1511 case SIOCSIFFLAGS:
1512 PORT_LOCK(p);
1459 if (ifp->if_flags & IFF_UP) {
1513 if (ifp->if_flags & IFF_UP) {
1460 PORT_LOCK(p);
1461 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1462 flags = p->if_flags;
1463 if (((ifp->if_flags ^ flags) & IFF_PROMISC) ||
1464 ((ifp->if_flags ^ flags) & IFF_ALLMULTI))
1465 cxgb_set_rxmode(p);
1466
1467 } else
1468 cxgb_init_locked(p);
1469 p->if_flags = ifp->if_flags;
1514 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1515 flags = p->if_flags;
1516 if (((ifp->if_flags ^ flags) & IFF_PROMISC) ||
1517 ((ifp->if_flags ^ flags) & IFF_ALLMULTI))
1518 cxgb_set_rxmode(p);
1519
1520 } else
1521 cxgb_init_locked(p);
1522 p->if_flags = ifp->if_flags;
1470 PORT_UNLOCK(p);
1471 } else {
1523 } else {
1472 callout_drain(&p->adapter->cxgb_tick_ch);
1473 PORT_LOCK(p);
1524 callout_stop(&p->adapter->cxgb_tick_ch);
1474 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1475 cxgb_stop_locked(p);
1476 } else {
1477 adapter_t *sc = p->adapter;
1478 callout_reset(&sc->cxgb_tick_ch,
1479 sc->params.stats_update_period * hz,
1480 cxgb_tick, sc);
1481 }
1525 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1526 cxgb_stop_locked(p);
1527 } else {
1528 adapter_t *sc = p->adapter;
1529 callout_reset(&sc->cxgb_tick_ch,
1530 sc->params.stats_update_period * hz,
1531 cxgb_tick, sc);
1532 }
1482 PORT_UNLOCK(p);
1483 }
1533 }
1484
1485
1534 PORT_UNLOCK(p);
1486 break;
1487 case SIOCSIFMEDIA:
1488 case SIOCGIFMEDIA:
1489 error = ifmedia_ioctl(ifp, ifr, &p->media, command);
1490 break;
1491 case SIOCSIFCAP:
1492 PORT_LOCK(p);
1493 mask = ifr->ifr_reqcap ^ ifp->if_capenable;

--- 28 unchanged lines hidden (view full) ---

1522 }
1523 }
1524 PORT_UNLOCK(p);
1525 break;
1526 default:
1527 error = ether_ioctl(ifp, command, data);
1528 break;
1529 }
1535 break;
1536 case SIOCSIFMEDIA:
1537 case SIOCGIFMEDIA:
1538 error = ifmedia_ioctl(ifp, ifr, &p->media, command);
1539 break;
1540 case SIOCSIFCAP:
1541 PORT_LOCK(p);
1542 mask = ifr->ifr_reqcap ^ ifp->if_capenable;

--- 28 unchanged lines hidden (view full) ---

1571 }
1572 }
1573 PORT_UNLOCK(p);
1574 break;
1575 default:
1576 error = ether_ioctl(ifp, command, data);
1577 break;
1578 }
1530
1531 return (error);
1532}
1533
1534static int
1535cxgb_start_tx(struct ifnet *ifp, uint32_t txmax)
1536{
1537 struct sge_qset *qs;
1538 struct sge_txq *txq;
1539 struct port_info *p = ifp->if_softc;
1540 struct mbuf *m0, *m = NULL;
1541 int err, in_use_init;
1579 return (error);
1580}
1581
1582static int
1583cxgb_start_tx(struct ifnet *ifp, uint32_t txmax)
1584{
1585 struct sge_qset *qs;
1586 struct sge_txq *txq;
1587 struct port_info *p = ifp->if_softc;
1588 struct mbuf *m0, *m = NULL;
1589 int err, in_use_init;
1542
1590
1543 if (!p->link_config.link_ok)
1544 return (ENXIO);
1545
1546 if (IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1547 return (ENOBUFS);
1548
1549 qs = &p->adapter->sge.qs[p->first_qset];
1550 txq = &qs->txq[TXQ_ETH];

--- 42 unchanged lines hidden (view full) ---

1593 if (__predict_false(err)) {
1594 if (err == ENOMEM) {
1595 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1596 IFQ_LOCK(&ifp->if_snd);
1597 IFQ_DRV_PREPEND(&ifp->if_snd, m);
1598 IFQ_UNLOCK(&ifp->if_snd);
1599 }
1600 }
1591 if (!p->link_config.link_ok)
1592 return (ENXIO);
1593
1594 if (IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1595 return (ENOBUFS);
1596
1597 qs = &p->adapter->sge.qs[p->first_qset];
1598 txq = &qs->txq[TXQ_ETH];

--- 42 unchanged lines hidden (view full) ---

1641 if (__predict_false(err)) {
1642 if (err == ENOMEM) {
1643 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1644 IFQ_LOCK(&ifp->if_snd);
1645 IFQ_DRV_PREPEND(&ifp->if_snd, m);
1646 IFQ_UNLOCK(&ifp->if_snd);
1647 }
1648 }
1601 if (err == 0 && m == NULL) {
1602 return (ENOBUFS);
1603 }
1604 if ((err == 0) && (txq->size <= txq->in_use + TX_MAX_DESC) &&
1649 if (err == 0 && m == NULL)
1650 err = ENOBUFS;
1651 else if ((err == 0) && (txq->size <= txq->in_use + TX_MAX_DESC) &&
1605 (ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) {
1606 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1652 (ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) {
1653 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1607 return (ENOSPC);
1654 err = ENOSPC;
1608 }
1609 return (err);
1610}
1611
1612static void
1613cxgb_start_proc(void *arg, int ncount)
1614{
1615 struct ifnet *ifp = arg;
1616 struct port_info *pi = ifp->if_softc;
1617 struct sge_qset *qs;
1618 struct sge_txq *txq;
1655 }
1656 return (err);
1657}
1658
1659static void
1660cxgb_start_proc(void *arg, int ncount)
1661{
1662 struct ifnet *ifp = arg;
1663 struct port_info *pi = ifp->if_softc;
1664 struct sge_qset *qs;
1665 struct sge_txq *txq;
1619 int error = 0;
1666 int error;
1620
1621 qs = &pi->adapter->sge.qs[pi->first_qset];
1622 txq = &qs->txq[TXQ_ETH];
1623
1667
1668 qs = &pi->adapter->sge.qs[pi->first_qset];
1669 txq = &qs->txq[TXQ_ETH];
1670
1624 while (error == 0) {
1671 do {
1625 if (desc_reclaimable(txq) > TX_CLEAN_MAX_DESC)
1626 taskqueue_enqueue(pi->adapter->tq,
1672 if (desc_reclaimable(txq) > TX_CLEAN_MAX_DESC)
1673 taskqueue_enqueue(pi->adapter->tq,
1627 &pi->adapter->timer_reclaim_task);
1674 &pi->timer_reclaim_task);
1628
1629 error = cxgb_start_tx(ifp, TX_START_MAX_DESC);
1675
1676 error = cxgb_start_tx(ifp, TX_START_MAX_DESC);
1630 }
1677 } while (error == 0);
1631}
1632
1633static void
1634cxgb_start(struct ifnet *ifp)
1635{
1636 struct port_info *pi = ifp->if_softc;
1637 struct sge_qset *qs;
1638 struct sge_txq *txq;
1639 int err;
1640
1641 qs = &pi->adapter->sge.qs[pi->first_qset];
1642 txq = &qs->txq[TXQ_ETH];
1643
1644 if (desc_reclaimable(txq) > TX_CLEAN_MAX_DESC)
1645 taskqueue_enqueue(pi->adapter->tq,
1678}
1679
1680static void
1681cxgb_start(struct ifnet *ifp)
1682{
1683 struct port_info *pi = ifp->if_softc;
1684 struct sge_qset *qs;
1685 struct sge_txq *txq;
1686 int err;
1687
1688 qs = &pi->adapter->sge.qs[pi->first_qset];
1689 txq = &qs->txq[TXQ_ETH];
1690
1691 if (desc_reclaimable(txq) > TX_CLEAN_MAX_DESC)
1692 taskqueue_enqueue(pi->adapter->tq,
1646 &pi->adapter->timer_reclaim_task);
1693 &pi->timer_reclaim_task);
1647
1648 err = cxgb_start_tx(ifp, TX_START_MAX_DESC);
1649
1650 if (err == 0)
1651 taskqueue_enqueue(pi->tq, &pi->start_task);
1652}
1653
1654

--- 12 unchanged lines hidden (view full) ---

1667 ifmr->ifm_status = IFM_AVALID;
1668 ifmr->ifm_active = IFM_ETHER;
1669
1670 if (!p->link_config.link_ok)
1671 return;
1672
1673 ifmr->ifm_status |= IFM_ACTIVE;
1674
1694
1695 err = cxgb_start_tx(ifp, TX_START_MAX_DESC);
1696
1697 if (err == 0)
1698 taskqueue_enqueue(pi->tq, &pi->start_task);
1699}
1700
1701

--- 12 unchanged lines hidden (view full) ---

1714 ifmr->ifm_status = IFM_AVALID;
1715 ifmr->ifm_active = IFM_ETHER;
1716
1717 if (!p->link_config.link_ok)
1718 return;
1719
1720 ifmr->ifm_status |= IFM_ACTIVE;
1721
1722 switch (p->link_config.speed) {
1723 case 10:
1724 ifmr->ifm_active |= IFM_10_T;
1725 break;
1726 case 100:
1727 ifmr->ifm_active |= IFM_100_TX;
1728 break;
1729 case 1000:
1730 ifmr->ifm_active |= IFM_1000_T;
1731 break;
1732 }
1733
1675 if (p->link_config.duplex)
1676 ifmr->ifm_active |= IFM_FDX;
1677 else
1678 ifmr->ifm_active |= IFM_HDX;
1679}
1680
1681static void
1682cxgb_async_intr(void *data)

--- 30 unchanged lines hidden (view full) ---

1713static void
1714check_link_status(adapter_t *sc)
1715{
1716 int i;
1717
1718 for (i = 0; i < (sc)->params.nports; ++i) {
1719 struct port_info *p = &sc->port[i];
1720
1734 if (p->link_config.duplex)
1735 ifmr->ifm_active |= IFM_FDX;
1736 else
1737 ifmr->ifm_active |= IFM_HDX;
1738}
1739
1740static void
1741cxgb_async_intr(void *data)

--- 30 unchanged lines hidden (view full) ---

1772static void
1773check_link_status(adapter_t *sc)
1774{
1775 int i;
1776
1777 for (i = 0; i < (sc)->params.nports; ++i) {
1778 struct port_info *p = &sc->port[i];
1779
1721 if (!(p->port_type->caps & SUPPORTED_IRQ))
1780 if (!(p->port_type->caps & SUPPORTED_IRQ))
1722 t3_link_changed(sc, i);
1781 t3_link_changed(sc, i);
1782 p->ifp->if_baudrate = p->link_config.speed * 1000000;
1723 }
1724}
1725
1726static void
1727check_t3b2_mac(struct adapter *adapter)
1728{
1729 int i;
1730

--- 9 unchanged lines hidden (view full) ---

1740 PORT_LOCK(p);
1741 if ((ifp->if_drv_flags & IFF_DRV_RUNNING))
1742 status = t3b2_mac_watchdog_task(&p->mac);
1743 if (status == 1)
1744 p->mac.stats.num_toggled++;
1745 else if (status == 2) {
1746 struct cmac *mac = &p->mac;
1747
1783 }
1784}
1785
1786static void
1787check_t3b2_mac(struct adapter *adapter)
1788{
1789 int i;
1790

--- 9 unchanged lines hidden (view full) ---

1800 PORT_LOCK(p);
1801 if ((ifp->if_drv_flags & IFF_DRV_RUNNING))
1802 status = t3b2_mac_watchdog_task(&p->mac);
1803 if (status == 1)
1804 p->mac.stats.num_toggled++;
1805 else if (status == 2) {
1806 struct cmac *mac = &p->mac;
1807
1748 t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN);
1808 t3_mac_set_mtu(mac, ifp->if_mtu + ETHER_HDR_LEN
1809 + ETHER_VLAN_ENCAP_LEN);
1749 t3_mac_set_address(mac, 0, p->hw_addr);
1750 cxgb_set_rxmode(p);
1751 t3_link_start(&p->phy, mac, &p->link_config);
1752 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
1753 t3_port_intr_enable(adapter, p->port);
1754 p->mac.stats.num_resets++;
1755 }
1756 PORT_UNLOCK(p);

--- 11 unchanged lines hidden (view full) ---

1768 callout_reset(&sc->cxgb_tick_ch, sc->params.stats_update_period * hz,
1769 cxgb_tick, sc);
1770
1771 /*
1772 * adapter lock can currently only be acquire after the
1773 * port lock
1774 */
1775 ADAPTER_UNLOCK(sc);
1810 t3_mac_set_address(mac, 0, p->hw_addr);
1811 cxgb_set_rxmode(p);
1812 t3_link_start(&p->phy, mac, &p->link_config);
1813 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
1814 t3_port_intr_enable(adapter, p->port);
1815 p->mac.stats.num_resets++;
1816 }
1817 PORT_UNLOCK(p);

--- 11 unchanged lines hidden (view full) ---

1829 callout_reset(&sc->cxgb_tick_ch, sc->params.stats_update_period * hz,
1830 cxgb_tick, sc);
1831
1832 /*
1833 * adapter lock can currently only be acquire after the
1834 * port lock
1835 */
1836 ADAPTER_UNLOCK(sc);
1837
1776 if (p->rev == T3_REV_B2)
1777 check_t3b2_mac(sc);
1838 if (p->rev == T3_REV_B2)
1839 check_t3b2_mac(sc);
1778
1779}
1780
1781static int
1782in_range(int val, int lo, int hi)
1783{
1784 return val < 0 || (val <= hi && val >= lo);
1785}
1786
1787static int
1840}
1841
1842static int
1843in_range(int val, int lo, int hi)
1844{
1845 return val < 0 || (val <= hi && val >= lo);
1846}
1847
1848static int
1849cxgb_extension_open(struct cdev *dev, int flags, int fmp, d_thread_t *td)
1850{
1851 return (0);
1852}
1853
1854static int
1855cxgb_extension_close(struct cdev *dev, int flags, int fmt, d_thread_t *td)
1856{
1857 return (0);
1858}
1859
1860static int
1788cxgb_extension_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data,
1789 int fflag, struct thread *td)
1790{
1791 int mmd, error = 0;
1792 struct port_info *pi = dev->si_drv1;
1793 adapter_t *sc = pi->adapter;
1794
1795#ifdef PRIV_SUPPORTED

--- 436 unchanged lines hidden --- 		1861cxgb_extension_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data,
1862 int fflag, struct thread *td)
1863{
1864 int mmd, error = 0;
1865 struct port_info *pi = dev->si_drv1;
1866 adapter_t *sc = pi->adapter;
1867
1868#ifdef PRIV_SUPPORTED

--- 436 unchanged lines hidden ---