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cxgb_ael1002.c (185620) cxgb_ael1002.c (186282)
1/**************************************************************************
2
3Copyright (c) 2007-2008, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

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23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
1/**************************************************************************
2
3Copyright (c) 2007-2008, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8

--- 14 unchanged lines hidden (view full) ---

23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_ael1002.c 185620 2008-12-04 20:32:53Z gnn $");
31__FBSDID("$FreeBSD: head/sys/dev/cxgb/common/cxgb_ael1002.c 186282 2008-12-18 14:21:35Z gnn $");
32
33#include <cxgb_include.h>
34
35#undef msleep
36#define msleep t3_os_sleep
37
38enum {
39 PMD_RSD = 10, /* PMA/PMD receive signal detect register */

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66
67struct reg_val {
68 unsigned short mmd_addr;
69 unsigned short reg_addr;
70 unsigned short clear_bits;
71 unsigned short set_bits;
72};
73
32
33#include <cxgb_include.h>
34
35#undef msleep
36#define msleep t3_os_sleep
37
38enum {
39 PMD_RSD = 10, /* PMA/PMD receive signal detect register */

--- 26 unchanged lines hidden (view full) ---

66
67struct reg_val {
68 unsigned short mmd_addr;
69 unsigned short reg_addr;
70 unsigned short clear_bits;
71 unsigned short set_bits;
72};
73
74static int ael2005_i2c_rd(struct cphy *phy, int dev_addr, int word_addr);
75
76static int get_module_type (struct cphy *phy, int hint)
77{
78 int v;
79
80 v = hint ? hint : ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 0);
81 if (v < 0)
82 return v;
83
84 if (v == 0x3) {
85 /* SFP: see SFF-8472 for below */
86 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 3);
87 if (v < 0)
88 return v;
89
90 if (v == 0x1)
91 return phy_modtype_twinax;
92 if (v == 0x10)
93 return phy_modtype_sr;
94 if (v == 0x20)
95 return phy_modtype_lr;
96 if (v == 0x40)
97 return phy_modtype_lrm;
98
99 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 6);
100 if (v < 0)
101 return v;
102 if (v != 4)
103 return phy_modtype_unknown;
104
105 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 10);
106 if (v < 0)
107 return v;
108
109 if (v & 0x80) {
110 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 0x12);
111 if (v < 0)
112 return v;
113 return v > 10 ? phy_modtype_twinax_long :
114 phy_modtype_twinax;
115 }
116 } else if (v == 0x6) {
117 /* XFP: See INF-8077i for details. */
118
119 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 127);
120 if (v < 0)
121 return v;
122
123 if (v != 1) {
124 /* XXX: set page select to table 1 yourself */
125 return phy_modtype_unknown;
126 }
127
128 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 131);
129 if (v < 0)
130 return v;
131 if (v == 0x10)
132 return phy_modtype_lrm;
133 if (v == 0x40)
134 return phy_modtype_lr;
135 if (v == 0x80)
136 return phy_modtype_sr;
137 }
138
139 return phy_modtype_unknown;
140}
141
74static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
75{
76 int err;
77
78 for (err = 0; rv->mmd_addr && !err; rv++) {
79 if (rv->clear_bits == 0xffff)
80 err = mdio_write(phy, rv->mmd_addr, rv->reg_addr,
81 rv->set_bits);

--- 20 unchanged lines hidden (view full) ---

102
103 err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);
104 if (!err)
105 err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
106 BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
107 return err;
108}
109
142static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
143{
144 int err;
145
146 for (err = 0; rv->mmd_addr && !err; rv++) {
147 if (rv->clear_bits == 0xffff)
148 err = mdio_write(phy, rv->mmd_addr, rv->reg_addr,
149 rv->set_bits);

--- 20 unchanged lines hidden (view full) ---

170
171 err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);
172 if (!err)
173 err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
174 BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
175 return err;
176}
177
178static int ael1002_get_module_type(struct cphy *phy, int delay_ms)
179{
180 int v;
181
182 if (delay_ms)
183 msleep(delay_ms);
184
185 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 0);
186
187 return v == -ETIMEDOUT ? phy_modtype_none : get_module_type(phy, v);
188}
189
110static int ael1002_reset(struct cphy *phy, int wait)
111{
112 int err;
113
114 if ((err = ael1002_power_down(phy, 0)) ||
115 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||
116 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||
117 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||
118 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||
119 (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN,
120 0, 1 << 5)))
121 return err;
190static int ael1002_reset(struct cphy *phy, int wait)
191{
192 int err;
193
194 if ((err = ael1002_power_down(phy, 0)) ||
195 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||
196 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||
197 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||
198 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||
199 (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN,
200 0, 1 << 5)))
201 return err;
202
203 err = ael1002_get_module_type(phy, 300);
204 if (err >= 0)
205 phy->modtype = err;
206
122 return 0;
123}
124
125static int ael1002_intr_noop(struct cphy *phy)
126{
127 return 0;
128}
129

--- 47 unchanged lines hidden (view full) ---

177 .get_link_status = get_link_status_r,
178 .power_down = ael1002_power_down,
179};
180#endif
181
182int t3_ael1002_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
183 const struct mdio_ops *mdio_ops)
184{
207 return 0;
208}
209
210static int ael1002_intr_noop(struct cphy *phy)
211{
212 return 0;
213}
214

--- 47 unchanged lines hidden (view full) ---

262 .get_link_status = get_link_status_r,
263 .power_down = ael1002_power_down,
264};
265#endif
266
267int t3_ael1002_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
268 const struct mdio_ops *mdio_ops)
269{
270 int err;
271
185 cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops,
186 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
187 "10GBASE-R");
188 ael100x_txon(phy);
272 cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops,
273 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
274 "10GBASE-R");
275 ael100x_txon(phy);
276
277 err = ael1002_get_module_type(phy, 0);
278 if (err >= 0)
279 phy->modtype = err;
280
189 return 0;
190}
191
192static int ael1006_reset(struct cphy *phy, int wait)
193{
194 u32 gpio_out;
195 t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
196 /* Hack to reset the phy correctly */

--- 781 unchanged lines hidden (view full) ---

978 return data >> 8;
979 }
980 }
981 CH_WARN(phy->adapter, "PHY %u I2C read of addr %u timed out\n",
982 phy->addr, word_addr);
983 return -ETIMEDOUT;
984}
985
281 return 0;
282}
283
284static int ael1006_reset(struct cphy *phy, int wait)
285{
286 u32 gpio_out;
287 t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
288 /* Hack to reset the phy correctly */

--- 781 unchanged lines hidden (view full) ---

1070 return data >> 8;
1071 }
1072 }
1073 CH_WARN(phy->adapter, "PHY %u I2C read of addr %u timed out\n",
1074 phy->addr, word_addr);
1075 return -ETIMEDOUT;
1076}
1077
986static int get_module_type(struct cphy *phy, int delay_ms)
1078static int ael2005_get_module_type(struct cphy *phy, int delay_ms)
987{
988 int v;
989 unsigned int stat;
990
991 v = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, &stat);
992 if (v)
993 return v;
994
995 if (stat & (1 << 8)) /* module absent */
996 return phy_modtype_none;
997
998 if (delay_ms)
999 msleep(delay_ms);
1000
1079{
1080 int v;
1081 unsigned int stat;
1082
1083 v = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, &stat);
1084 if (v)
1085 return v;
1086
1087 if (stat & (1 << 8)) /* module absent */
1088 return phy_modtype_none;
1089
1090 if (delay_ms)
1091 msleep(delay_ms);
1092
1001 /* see SFF-8472 for below */
1002 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 3);
1003 if (v < 0)
1004 return v;
1093 return get_module_type(phy, 0);
1005
1094
1006 if (v == 0x10)
1007 return phy_modtype_sr;
1008 if (v == 0x20)
1009 return phy_modtype_lr;
1010 if (v == 0x40)
1011 return phy_modtype_lrm;
1012
1013 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 6);
1014 if (v < 0)
1015 return v;
1016 if (v != 4)
1017 goto unknown;
1018
1019 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 10);
1020 if (v < 0)
1021 return v;
1022
1023 if (v & 0x80) {
1024 v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 0x12);
1025 if (v < 0)
1026 return v;
1027 return v > 10 ? phy_modtype_twinax_long : phy_modtype_twinax;
1028 }
1029unknown:
1030 return phy_modtype_unknown;
1031}
1032
1033static int ael2005_intr_enable(struct cphy *phy)
1034{
1035 int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x200);
1036 return err ? err : t3_phy_lasi_intr_enable(phy);
1037}
1038

--- 40 unchanged lines hidden (view full) ---

1079 msleep(125);
1080 phy->priv = edc_none;
1081 err = set_phy_regs(phy, regs0);
1082 if (err)
1083 return err;
1084
1085 msleep(50);
1086
1095}
1096
1097static int ael2005_intr_enable(struct cphy *phy)
1098{
1099 int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x200);
1100 return err ? err : t3_phy_lasi_intr_enable(phy);
1101}
1102

--- 40 unchanged lines hidden (view full) ---

1143 msleep(125);
1144 phy->priv = edc_none;
1145 err = set_phy_regs(phy, regs0);
1146 if (err)
1147 return err;
1148
1149 msleep(50);
1150
1087 err = get_module_type(phy, 0);
1151 err = ael2005_get_module_type(phy, 0);
1088 if (err < 0)
1089 return err;
1090 phy->modtype = (u8)err;
1091
1092 if (err == phy_modtype_twinax || err == phy_modtype_twinax_long)
1093 err = ael2005_setup_twinax_edc(phy, err);
1094 else
1095 err = ael2005_setup_sr_edc(phy);

--- 21 unchanged lines hidden (view full) ---

1117
1118 if (stat & AEL2005_MODDET_IRQ) {
1119 ret = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL,
1120 0xd00);
1121 if (ret)
1122 return ret;
1123
1124 /* modules have max 300 ms init time after hot plug */
1152 if (err < 0)
1153 return err;
1154 phy->modtype = (u8)err;
1155
1156 if (err == phy_modtype_twinax || err == phy_modtype_twinax_long)
1157 err = ael2005_setup_twinax_edc(phy, err);
1158 else
1159 err = ael2005_setup_sr_edc(phy);

--- 21 unchanged lines hidden (view full) ---

1181
1182 if (stat & AEL2005_MODDET_IRQ) {
1183 ret = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL,
1184 0xd00);
1185 if (ret)
1186 return ret;
1187
1188 /* modules have max 300 ms init time after hot plug */
1125 ret = get_module_type(phy, 300);
1189 ret = ael2005_get_module_type(phy, 300);
1126 if (ret < 0)
1127 return ret;
1128
1129 phy->modtype = (u8)ret;
1130 if (ret == phy_modtype_none)
1131 edc_needed = phy->priv; /* on unplug retain EDC */
1132 else if (ret == phy_modtype_twinax ||
1133 ret == phy_modtype_twinax_long)

--- 37 unchanged lines hidden (view full) ---

1171 .get_link_status = get_link_status_r,
1172 .power_down = ael1002_power_down,
1173};
1174#endif
1175
1176int t3_ael2005_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
1177 const struct mdio_ops *mdio_ops)
1178{
1190 if (ret < 0)
1191 return ret;
1192
1193 phy->modtype = (u8)ret;
1194 if (ret == phy_modtype_none)
1195 edc_needed = phy->priv; /* on unplug retain EDC */
1196 else if (ret == phy_modtype_twinax ||
1197 ret == phy_modtype_twinax_long)

--- 37 unchanged lines hidden (view full) ---

1235 .get_link_status = get_link_status_r,
1236 .power_down = ael1002_power_down,
1237};
1238#endif
1239
1240int t3_ael2005_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
1241 const struct mdio_ops *mdio_ops)
1242{
1243 int err;
1179 cphy_init(phy, adapter, phy_addr, &ael2005_ops, mdio_ops,
1180 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE |
1181 SUPPORTED_IRQ, "10GBASE-R");
1182 msleep(125);
1244 cphy_init(phy, adapter, phy_addr, &ael2005_ops, mdio_ops,
1245 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE |
1246 SUPPORTED_IRQ, "10GBASE-R");
1247 msleep(125);
1248
1249 err = ael2005_get_module_type(phy, 0);
1250 if (err >= 0)
1251 phy->modtype = err;
1252
1183 return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL_OPT_SETTINGS, 0,
1184 1 << 5);
1185}
1186
1187/*
1188 * Get link status for a 10GBASE-X device.
1189 */
1190static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed,

--- 135 unchanged lines hidden --- 		1253 return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL_OPT_SETTINGS, 0,
1254 1 << 5);
1255}
1256
1257/*
1258 * Get link status for a 10GBASE-X device.
1259 */
1260static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed,

--- 135 unchanged lines hidden ---