| if_athvar.h (224720) | if_athvar.h (225444) |
|---|---|
| 1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * | 1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * |
| 29 * $FreeBSD: head/sys/dev/ath/if_athvar.h 224720 2011-08-08 19:03:26Z adrian $ | 29 * $FreeBSD: head/sys/dev/ath/if_athvar.h 225444 2011-09-08 01:23:05Z adrian $ |
| 30 */ 31 32/* 33 * Defintions for the Atheros Wireless LAN controller driver. 34 */ 35#ifndef _DEV_ATH_ATHVAR_H 36#define _DEV_ATH_ATHVAR_H 37 --- 212 unchanged lines hidden (view full) --- 250 sc_swbmiss : 1,/* sta mode using sw bmiss */ 251 sc_stagbeacons:1,/* use staggered beacons */ 252 sc_wmetkipmic:1,/* can do WME+TKIP MIC */ 253 sc_resume_up: 1,/* on resume, start all vaps */ 254 sc_tdma : 1,/* TDMA in use */ 255 sc_setcca : 1,/* set/clr CCA with TDMA */ 256 sc_resetcal : 1,/* reset cal state next trip */ 257 sc_rxslink : 1,/* do self-linked final descriptor */ | 30 */ 31 32/* 33 * Defintions for the Atheros Wireless LAN controller driver. 34 */ 35#ifndef _DEV_ATH_ATHVAR_H 36#define _DEV_ATH_ATHVAR_H 37 --- 212 unchanged lines hidden (view full) --- 250 sc_swbmiss : 1,/* sta mode using sw bmiss */ 251 sc_stagbeacons:1,/* use staggered beacons */ 252 sc_wmetkipmic:1,/* can do WME+TKIP MIC */ 253 sc_resume_up: 1,/* on resume, start all vaps */ 254 sc_tdma : 1,/* TDMA in use */ 255 sc_setcca : 1,/* set/clr CCA with TDMA */ 256 sc_resetcal : 1,/* reset cal state next trip */ 257 sc_rxslink : 1,/* do self-linked final descriptor */ |
| 258 sc_kickpcu : 1;/* kick PCU RX on next RX proc */ | 258 sc_kickpcu : 1,/* kick PCU RX on next RX proc */ 259 sc_rxtsf32 : 1;/* RX dec TSF is 32 bits */ |
| 259 uint32_t sc_eerd; /* regdomain from EEPROM */ 260 uint32_t sc_eecc; /* country code from EEPROM */ 261 /* rate tables */ 262 const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX]; 263 const HAL_RATE_TABLE *sc_currates; /* current rate table */ 264 enum ieee80211_phymode sc_curmode; /* current phy mode */ 265 HAL_OPMODE sc_opmode; /* current operating mode */ 266 u_int16_t sc_curtxpow; /* current tx power limit */ --- 210 unchanged lines hidden (view full) --- 477#define ath_hal_beaconinit(_ah, _nextb, _bperiod) \ 478 ((*(_ah)->ah_beaconInit)((_ah), (_nextb), (_bperiod))) 479#define ath_hal_beaconreset(_ah) \ 480 ((*(_ah)->ah_resetStationBeaconTimers)((_ah))) 481#define ath_hal_beaconsettimers(_ah, _bt) \ 482 ((*(_ah)->ah_setBeaconTimers)((_ah), (_bt))) 483#define ath_hal_beacontimers(_ah, _bs) \ 484 ((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs))) | 260 uint32_t sc_eerd; /* regdomain from EEPROM */ 261 uint32_t sc_eecc; /* country code from EEPROM */ 262 /* rate tables */ 263 const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX]; 264 const HAL_RATE_TABLE *sc_currates; /* current rate table */ 265 enum ieee80211_phymode sc_curmode; /* current phy mode */ 266 HAL_OPMODE sc_opmode; /* current operating mode */ 267 u_int16_t sc_curtxpow; /* current tx power limit */ --- 210 unchanged lines hidden (view full) --- 478#define ath_hal_beaconinit(_ah, _nextb, _bperiod) \ 479 ((*(_ah)->ah_beaconInit)((_ah), (_nextb), (_bperiod))) 480#define ath_hal_beaconreset(_ah) \ 481 ((*(_ah)->ah_resetStationBeaconTimers)((_ah))) 482#define ath_hal_beaconsettimers(_ah, _bt) \ 483 ((*(_ah)->ah_setBeaconTimers)((_ah), (_bt))) 484#define ath_hal_beacontimers(_ah, _bs) \ 485 ((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs))) |
| 486#define ath_hal_getnexttbtt(_ah) \ 487 ((*(_ah)->ah_getNextTBTT)((_ah))) |
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| 485#define ath_hal_setassocid(_ah, _bss, _associd) \ 486 ((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd))) 487#define ath_hal_phydisable(_ah) \ 488 ((*(_ah)->ah_phyDisable)((_ah))) 489#define ath_hal_setopmode(_ah) \ 490 ((*(_ah)->ah_setPCUConfig)((_ah))) 491#define ath_hal_stoptxdma(_ah, _qnum) \ 492 ((*(_ah)->ah_stopTxDma)((_ah), (_qnum))) --- 159 unchanged lines hidden (view full) --- 652#define ath_hal_gettxchainmask(_ah, _ptxchainmask) \ 653 (ath_hal_getcapability(_ah, HAL_CAP_TX_CHAINMASK, 0, _ptxchainmask)) 654#define ath_hal_split4ktrans(_ah) \ 655 (ath_hal_getcapability(_ah, HAL_CAP_SPLIT_4KB_TRANS, 0, NULL) == HAL_OK) 656#define ath_hal_self_linked_final_rxdesc(_ah) \ 657 (ath_hal_getcapability(_ah, HAL_CAP_RXDESC_SELFLINK, 0, NULL) == HAL_OK) 658#define ath_hal_gtxto_supported(_ah) \ 659 (ath_hal_getcapability(_ah, HAL_CAP_GTXTO, 0, NULL) == HAL_OK) | 488#define ath_hal_setassocid(_ah, _bss, _associd) \ 489 ((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd))) 490#define ath_hal_phydisable(_ah) \ 491 ((*(_ah)->ah_phyDisable)((_ah))) 492#define ath_hal_setopmode(_ah) \ 493 ((*(_ah)->ah_setPCUConfig)((_ah))) 494#define ath_hal_stoptxdma(_ah, _qnum) \ 495 ((*(_ah)->ah_stopTxDma)((_ah), (_qnum))) --- 159 unchanged lines hidden (view full) --- 655#define ath_hal_gettxchainmask(_ah, _ptxchainmask) \ 656 (ath_hal_getcapability(_ah, HAL_CAP_TX_CHAINMASK, 0, _ptxchainmask)) 657#define ath_hal_split4ktrans(_ah) \ 658 (ath_hal_getcapability(_ah, HAL_CAP_SPLIT_4KB_TRANS, 0, NULL) == HAL_OK) 659#define ath_hal_self_linked_final_rxdesc(_ah) \ 660 (ath_hal_getcapability(_ah, HAL_CAP_RXDESC_SELFLINK, 0, NULL) == HAL_OK) 661#define ath_hal_gtxto_supported(_ah) \ 662 (ath_hal_getcapability(_ah, HAL_CAP_GTXTO, 0, NULL) == HAL_OK) |
| 663#define ath_hal_has_long_rxdesc_tsf(_ah) \ 664 (ath_hal_getcapability(_ah, HAL_CAP_LONG_RXDESC_TSF, 0, NULL) == HAL_OK) |
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| 660 661#define ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \ 662 ((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq))) 663#define ath_hal_rxprocdesc(_ah, _ds, _dspa, _dsnext, _rs) \ 664 ((*(_ah)->ah_procRxDesc)((_ah), (_ds), (_dspa), (_dsnext), 0, (_rs))) 665#define ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \ 666 _txr0, _txtr0, _keyix, _ant, _flags, \ 667 _rtsrate, _rtsdura) \ --- 63 unchanged lines hidden --- | 665 666#define ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \ 667 ((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq))) 668#define ath_hal_rxprocdesc(_ah, _ds, _dspa, _dsnext, _rs) \ 669 ((*(_ah)->ah_procRxDesc)((_ah), (_ds), (_dspa), (_dsnext), 0, (_rs))) 670#define ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \ 671 _txr0, _txtr0, _keyix, _ant, _flags, \ 672 _rtsrate, _rtsdura) \ --- 63 unchanged lines hidden --- |