| if_athvar.h (222277) | if_athvar.h (222585) |
|---|---|
| 1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * | 1/*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * |
| 29 * $FreeBSD: head/sys/dev/ath/if_athvar.h 222277 2011-05-25 07:34:49Z adrian $ | 29 * $FreeBSD: head/sys/dev/ath/if_athvar.h 222585 2011-06-01 20:09:49Z adrian $ |
| 30 */ 31 32/* 33 * Defintions for the Atheros Wireless LAN controller driver. 34 */ 35#ifndef _DEV_ATH_ATHVAR_H 36#define _DEV_ATH_ATHVAR_H 37 --- 314 unchanged lines hidden (view full) --- 352 u_int32_t sc_tdmabintval; /* TDMA beacon interval (TU) */ 353 u_int32_t sc_tdmaguard; /* TDMA guard time (usec) */ 354 u_int sc_tdmaslotlen; /* TDMA slot length (usec) */ 355 u_int32_t sc_avgtsfdeltap;/* TDMA slot adjust (+) */ 356 u_int32_t sc_avgtsfdeltam;/* TDMA slot adjust (-) */ 357 uint16_t *sc_eepromdata; /* Local eeprom data, if AR9100 */ 358 int sc_txchainmask; /* currently configured TX chainmask */ 359 int sc_rxchainmask; /* currently configured RX chainmask */ | 30 */ 31 32/* 33 * Defintions for the Atheros Wireless LAN controller driver. 34 */ 35#ifndef _DEV_ATH_ATHVAR_H 36#define _DEV_ATH_ATHVAR_H 37 --- 314 unchanged lines hidden (view full) --- 352 u_int32_t sc_tdmabintval; /* TDMA beacon interval (TU) */ 353 u_int32_t sc_tdmaguard; /* TDMA guard time (usec) */ 354 u_int sc_tdmaslotlen; /* TDMA slot length (usec) */ 355 u_int32_t sc_avgtsfdeltap;/* TDMA slot adjust (+) */ 356 u_int32_t sc_avgtsfdeltam;/* TDMA slot adjust (-) */ 357 uint16_t *sc_eepromdata; /* Local eeprom data, if AR9100 */ 358 int sc_txchainmask; /* currently configured TX chainmask */ 359 int sc_rxchainmask; /* currently configured RX chainmask */ |
| 360 361 /* DFS related state */ 362 void *sc_dfs; /* Used by an optional DFS module */ 363 struct task sc_dfstask; /* DFS processing task */ |
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| 360}; 361 362#define ATH_LOCK_INIT(_sc) \ 363 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \ 364 NULL, MTX_DEF | MTX_RECURSE) 365#define ATH_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) 366#define ATH_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 367#define ATH_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) --- 321 unchanged lines hidden (view full) --- 689#define ath_hal_set11nratescenario(_ah, _ds, _dur, _rt, _series, _ns, _flags) \ 690 ((*(_ah)->ah_set11nRateScenario)((_ah), (_ds), (_dur), (_rt), \ 691 (_series), (_ns), (_flags))) 692#define ath_hal_set11naggrmiddle(_ah, _ds, _num) \ 693 ((*(_ah)->ah_set11nAggrMiddle((_ah), (_ds), (_num)))) 694#define ath_hal_set11nburstduration(_ah, _ds, _dur) \ 695 ((*(_ah)->ah_set11nBurstDuration)((_ah), (_ds), (_dur))) 696 | 364}; 365 366#define ATH_LOCK_INIT(_sc) \ 367 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \ 368 NULL, MTX_DEF | MTX_RECURSE) 369#define ATH_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx) 370#define ATH_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 371#define ATH_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) --- 321 unchanged lines hidden (view full) --- 693#define ath_hal_set11nratescenario(_ah, _ds, _dur, _rt, _series, _ns, _flags) \ 694 ((*(_ah)->ah_set11nRateScenario)((_ah), (_ds), (_dur), (_rt), \ 695 (_series), (_ns), (_flags))) 696#define ath_hal_set11naggrmiddle(_ah, _ds, _num) \ 697 ((*(_ah)->ah_set11nAggrMiddle((_ah), (_ds), (_num)))) 698#define ath_hal_set11nburstduration(_ah, _ds, _dur) \ 699 ((*(_ah)->ah_set11nBurstDuration)((_ah), (_ds), (_dur))) 700 |
| 701/* 702 * This is badly-named; you need to set the correct parameters 703 * to begin to receive useful radar events; and even then 704 * it doesn't "enable" DFS. See the ath_dfs/null/ module for 705 * more information. 706 */ 707#define ath_hal_enabledfs(_ah, _param) \ 708 ((*(_ah)->ah_enableDfs)((_ah), (_param))) 709#define ath_hal_getdfsthresh(_ah, _param) \ 710 ((*(_ah)->ah_getDfsThresh)((_ah), (_param))) 711 |
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| 697#define ath_hal_gpioCfgOutput(_ah, _gpio, _type) \ 698 ((*(_ah)->ah_gpioCfgOutput)((_ah), (_gpio), (_type))) 699#define ath_hal_gpioset(_ah, _gpio, _b) \ 700 ((*(_ah)->ah_gpioSet)((_ah), (_gpio), (_b))) 701#define ath_hal_gpioget(_ah, _gpio) \ 702 ((*(_ah)->ah_gpioGet)((_ah), (_gpio))) 703#define ath_hal_gpiosetintr(_ah, _gpio, _b) \ 704 ((*(_ah)->ah_gpioSetIntr)((_ah), (_gpio), (_b))) 705 706#define ath_hal_radar_wait(_ah, _chan) \ 707 ((*(_ah)->ah_radarWait)((_ah), (_chan))) 708 709#endif /* _DEV_ATH_ATHVAR_H */ | 712#define ath_hal_gpioCfgOutput(_ah, _gpio, _type) \ 713 ((*(_ah)->ah_gpioCfgOutput)((_ah), (_gpio), (_type))) 714#define ath_hal_gpioset(_ah, _gpio, _b) \ 715 ((*(_ah)->ah_gpioSet)((_ah), (_gpio), (_b))) 716#define ath_hal_gpioget(_ah, _gpio) \ 717 ((*(_ah)->ah_gpioGet)((_ah), (_gpio))) 718#define ath_hal_gpiosetintr(_ah, _gpio, _b) \ 719 ((*(_ah)->ah_gpioSetIntr)((_ah), (_gpio), (_b))) 720 721#define ath_hal_radar_wait(_ah, _chan) \ 722 ((*(_ah)->ah_radarWait)((_ah), (_chan))) 723 724#endif /* _DEV_ATH_ATHVAR_H */ |