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if_ath.c (165571) if_ath.c (166013)
1/*-
2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 21 unchanged lines hidden (view full) ---

30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
35 */
36
37#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 21 unchanged lines hidden (view full) ---

30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
35 */
36
37#include <sys/cdefs.h>
38__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 165571 2006-12-27 19:07:09Z sam $");
38__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 166013 2007-01-15 01:15:57Z sam $");
39
40/*
41 * Driver for the Atheros Wireless LAN controller.
42 *
43 * This software is derived from work of Atsushi Onoe; his contribution
44 * is greatly appreciated.
45 */
46

--- 312 unchanged lines hidden (view full) ---

359 /*
360 * Setup rate tables for all potential media types.
361 */
362 ath_rate_setup(sc, IEEE80211_MODE_11A);
363 ath_rate_setup(sc, IEEE80211_MODE_11B);
364 ath_rate_setup(sc, IEEE80211_MODE_11G);
365 ath_rate_setup(sc, IEEE80211_MODE_TURBO_A);
366 ath_rate_setup(sc, IEEE80211_MODE_TURBO_G);
39
40/*
41 * Driver for the Atheros Wireless LAN controller.
42 *
43 * This software is derived from work of Atsushi Onoe; his contribution
44 * is greatly appreciated.
45 */
46

--- 312 unchanged lines hidden (view full) ---

359 /*
360 * Setup rate tables for all potential media types.
361 */
362 ath_rate_setup(sc, IEEE80211_MODE_11A);
363 ath_rate_setup(sc, IEEE80211_MODE_11B);
364 ath_rate_setup(sc, IEEE80211_MODE_11G);
365 ath_rate_setup(sc, IEEE80211_MODE_TURBO_A);
366 ath_rate_setup(sc, IEEE80211_MODE_TURBO_G);
367 ath_rate_setup(sc, IEEE80211_MODE_11A_HALF);
368 ath_rate_setup(sc, IEEE80211_MODE_11A_QUARTER);
367 ath_rate_setup(sc, IEEE80211_MODE_HALF);
368 ath_rate_setup(sc, IEEE80211_MODE_QUARTER);
369
370 /* NB: setup here so ath_rate_update is happy */
371 ath_setcurmode(sc, IEEE80211_MODE_11A);
372
373 /*
374 * Allocate tx+rx descriptors and populate the lists.
375 */
376 error = ath_desc_alloc(sc);

--- 503 unchanged lines hidden (view full) ---

880 NET_LOCK_GIANT();
881 ieee80211_beacon_miss(ic);
882 NET_UNLOCK_GIANT();
883 } else
884 sc->sc_stats.ast_bmiss_phantom++;
885 }
886}
887
369
370 /* NB: setup here so ath_rate_update is happy */
371 ath_setcurmode(sc, IEEE80211_MODE_11A);
372
373 /*
374 * Allocate tx+rx descriptors and populate the lists.
375 */
376 error = ath_desc_alloc(sc);

--- 503 unchanged lines hidden (view full) ---

880 NET_LOCK_GIANT();
881 ieee80211_beacon_miss(ic);
882 NET_UNLOCK_GIANT();
883 } else
884 sc->sc_stats.ast_bmiss_phantom++;
885 }
886}
887
888static u_int
889ath_chan2flags(struct ieee80211com *ic, struct ieee80211_channel *chan)
888/*
889 * Convert net80211 channel to a HAL channel with the flags
890 * constrained to reflect the current operating mode and
891 * the frequency possibly mapped for GSM channels.
892 */
893static void
894ath_mapchan(struct ieee80211com *ic, HAL_CHANNEL *hc,
895 const struct ieee80211_channel *chan)
890{
891#define N(a) (sizeof(a) / sizeof(a[0]))
892 static const u_int modeflags[] = {
893 0, /* IEEE80211_MODE_AUTO */
894 CHANNEL_A, /* IEEE80211_MODE_11A */
895 CHANNEL_B, /* IEEE80211_MODE_11B */
896 CHANNEL_PUREG, /* IEEE80211_MODE_11G */
897 0, /* IEEE80211_MODE_FH */
898 CHANNEL_ST, /* IEEE80211_MODE_TURBO_A */
899 CHANNEL_108G /* IEEE80211_MODE_TURBO_G */
900 };
901 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan);
902
903 KASSERT(mode < N(modeflags), ("unexpected phy mode %u", mode));
904 KASSERT(modeflags[mode] != 0, ("mode %u undefined", mode));
896{
897#define N(a) (sizeof(a) / sizeof(a[0]))
898 static const u_int modeflags[] = {
899 0, /* IEEE80211_MODE_AUTO */
900 CHANNEL_A, /* IEEE80211_MODE_11A */
901 CHANNEL_B, /* IEEE80211_MODE_11B */
902 CHANNEL_PUREG, /* IEEE80211_MODE_11G */
903 0, /* IEEE80211_MODE_FH */
904 CHANNEL_ST, /* IEEE80211_MODE_TURBO_A */
905 CHANNEL_108G /* IEEE80211_MODE_TURBO_G */
906 };
907 enum ieee80211_phymode mode = ieee80211_chan2mode(ic, chan);
908
909 KASSERT(mode < N(modeflags), ("unexpected phy mode %u", mode));
910 KASSERT(modeflags[mode] != 0, ("mode %u undefined", mode));
911 hc->channelFlags = modeflags[mode];
905 if (IEEE80211_IS_CHAN_HALF(chan))
912 if (IEEE80211_IS_CHAN_HALF(chan))
906 return modeflags[mode] | CHANNEL_HALF;
913 hc->channelFlags |= CHANNEL_HALF;
907 if (IEEE80211_IS_CHAN_QUARTER(chan))
914 if (IEEE80211_IS_CHAN_QUARTER(chan))
908 return modeflags[mode] | CHANNEL_QUARTER;
909 return modeflags[mode];
915 hc->channelFlags |= CHANNEL_QUARTER;
916
917 hc->channel = IEEE80211_IS_CHAN_GSM(chan) ?
918 2422 + (922 - chan->ic_freq) : chan->ic_freq;
910#undef N
911}
912
913static void
914ath_init(void *arg)
915{
916 struct ath_softc *sc = (struct ath_softc *) arg;
917 struct ieee80211com *ic = &sc->sc_ic;

--- 13 unchanged lines hidden (view full) ---

931
932 /*
933 * The basic interface to setting the hardware in a good
934 * state is ``reset''. On return the hardware is known to
935 * be powered up and with interrupts disabled. This must
936 * be followed by initialization of the appropriate bits
937 * and then setup of the interrupt mask.
938 */
919#undef N
920}
921
922static void
923ath_init(void *arg)
924{
925 struct ath_softc *sc = (struct ath_softc *) arg;
926 struct ieee80211com *ic = &sc->sc_ic;

--- 13 unchanged lines hidden (view full) ---

940
941 /*
942 * The basic interface to setting the hardware in a good
943 * state is ``reset''. On return the hardware is known to
944 * be powered up and with interrupts disabled. This must
945 * be followed by initialization of the appropriate bits
946 * and then setup of the interrupt mask.
947 */
939 sc->sc_curchan.channel = ic->ic_curchan->ic_freq;
940 sc->sc_curchan.channelFlags = ath_chan2flags(ic, ic->ic_curchan);
948 ath_mapchan(ic, &sc->sc_curchan, ic->ic_curchan);
941 if (!ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, AH_FALSE, &status)) {
942 if_printf(ifp, "unable to reset hardware; hal status %u\n",
943 status);
944 goto done;
945 }
946
947 /*
948 * This is needed only to setup initial state

--- 141 unchanged lines hidden (view full) ---

1090 * to reset or reload hardware state.
1091 */
1092static int
1093ath_reset(struct ifnet *ifp)
1094{
1095 struct ath_softc *sc = ifp->if_softc;
1096 struct ieee80211com *ic = &sc->sc_ic;
1097 struct ath_hal *ah = sc->sc_ah;
949 if (!ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, AH_FALSE, &status)) {
950 if_printf(ifp, "unable to reset hardware; hal status %u\n",
951 status);
952 goto done;
953 }
954
955 /*
956 * This is needed only to setup initial state

--- 141 unchanged lines hidden (view full) ---

1098 * to reset or reload hardware state.
1099 */
1100static int
1101ath_reset(struct ifnet *ifp)
1102{
1103 struct ath_softc *sc = ifp->if_softc;
1104 struct ieee80211com *ic = &sc->sc_ic;
1105 struct ath_hal *ah = sc->sc_ah;
1098 struct ieee80211_channel *c;
1099 HAL_STATUS status;
1100
1101 /*
1102 * Convert to a HAL channel description with the flags
1103 * constrained to reflect the current operating mode.
1104 */
1106 HAL_STATUS status;
1107
1108 /*
1109 * Convert to a HAL channel description with the flags
1110 * constrained to reflect the current operating mode.
1111 */
1105 c = ic->ic_curchan;
1106 sc->sc_curchan.channel = c->ic_freq;
1107 sc->sc_curchan.channelFlags = ath_chan2flags(ic, c);
1112 ath_mapchan(ic, &sc->sc_curchan, ic->ic_curchan);
1108
1109 ath_hal_intrset(ah, 0); /* disable interrupts */
1110 ath_draintxq(sc); /* stop xmit side */
1111 ath_stoprecv(sc); /* stop recv side */
1112 /* NB: indicate channel change so we do a full reset */
1113 if (!ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, AH_TRUE, &status))
1114 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1115 __func__, status);
1116 ath_update_txpow(sc); /* update tx power state */
1117 sc->sc_diversity = ath_hal_getdiversity(ah);
1118 sc->sc_calinterval = 1;
1119 sc->sc_caltries = 0;
1120 /*
1121 * We may be doing a reset in response to an ioctl
1122 * that changes the channel so update any state that
1123 * might change as a result.
1124 */
1113
1114 ath_hal_intrset(ah, 0); /* disable interrupts */
1115 ath_draintxq(sc); /* stop xmit side */
1116 ath_stoprecv(sc); /* stop recv side */
1117 /* NB: indicate channel change so we do a full reset */
1118 if (!ath_hal_reset(ah, sc->sc_opmode, &sc->sc_curchan, AH_TRUE, &status))
1119 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1120 __func__, status);
1121 ath_update_txpow(sc); /* update tx power state */
1122 sc->sc_diversity = ath_hal_getdiversity(ah);
1123 sc->sc_calinterval = 1;
1124 sc->sc_caltries = 0;
1125 /*
1126 * We may be doing a reset in response to an ioctl
1127 * that changes the channel so update any state that
1128 * might change as a result.
1129 */
1125 ath_chan_change(sc, c);
1130 ath_chan_change(sc, ic->ic_curchan);
1126 if (ath_startrecv(sc) != 0) /* restart recv */
1127 if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1128 if (ic->ic_state == IEEE80211_S_RUN)
1129 ath_beacon_config(sc); /* restart beacons */
1130 ath_hal_intrset(ah, sc->sc_imask);
1131
1132 ath_start(ifp); /* restart xmit */
1133 return 0;

--- 720 unchanged lines hidden (view full) ---

1854 */
1855static void
1856ath_setslottime(struct ath_softc *sc)
1857{
1858 struct ieee80211com *ic = &sc->sc_ic;
1859 struct ath_hal *ah = sc->sc_ah;
1860 u_int usec;
1861
1131 if (ath_startrecv(sc) != 0) /* restart recv */
1132 if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1133 if (ic->ic_state == IEEE80211_S_RUN)
1134 ath_beacon_config(sc); /* restart beacons */
1135 ath_hal_intrset(ah, sc->sc_imask);
1136
1137 ath_start(ifp); /* restart xmit */
1138 return 0;

--- 720 unchanged lines hidden (view full) ---

1859 */
1860static void
1861ath_setslottime(struct ath_softc *sc)
1862{
1863 struct ieee80211com *ic = &sc->sc_ic;
1864 struct ath_hal *ah = sc->sc_ah;
1865 u_int usec;
1866
1862 if (IEEE80211_IS_CHAN_A(ic->ic_curchan)) {
1863 if (IEEE80211_IS_CHAN_HALF(ic->ic_curchan))
1864 usec = 13;
1865 else if (IEEE80211_IS_CHAN_QUARTER(ic->ic_curchan))
1866 usec = 21;
1867 else
1867 if (IEEE80211_IS_CHAN_HALF(ic->ic_curchan))
1868 usec = 13;
1869 else if (IEEE80211_IS_CHAN_QUARTER(ic->ic_curchan))
1870 usec = 21;
1871 else if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
1872 /* honor short/long slot time only in 11g */
1873 /* XXX shouldn't honor on pure g or turbo g channel */
1874 if (ic->ic_flags & IEEE80211_F_SHSLOT)
1868 usec = HAL_SLOT_TIME_9;
1875 usec = HAL_SLOT_TIME_9;
1869 } else if (ic->ic_flags & IEEE80211_F_SHSLOT)
1876 else
1877 usec = HAL_SLOT_TIME_20;
1878 } else
1870 usec = HAL_SLOT_TIME_9;
1879 usec = HAL_SLOT_TIME_9;
1871 else
1872 usec = HAL_SLOT_TIME_20;
1873
1874 DPRINTF(sc, ATH_DEBUG_RESET,
1875 "%s: chan %u MHz flags 0x%x %s slot, %u usec\n",
1876 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1877 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", usec);
1878
1879 ath_hal_setslottime(ah, usec);
1880 sc->sc_updateslot = OK;

--- 2432 unchanged lines hidden (view full) ---

4313 struct ieee80211com *ic = &sc->sc_ic;
4314 enum ieee80211_phymode mode;
4315 u_int16_t flags;
4316
4317 /*
4318 * Change channels and update the h/w rate map
4319 * if we're switching; e.g. 11a to 11b/g.
4320 */
1880
1881 DPRINTF(sc, ATH_DEBUG_RESET,
1882 "%s: chan %u MHz flags 0x%x %s slot, %u usec\n",
1883 __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags,
1884 ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", usec);
1885
1886 ath_hal_setslottime(ah, usec);
1887 sc->sc_updateslot = OK;

--- 2432 unchanged lines hidden (view full) ---

4320 struct ieee80211com *ic = &sc->sc_ic;
4321 enum ieee80211_phymode mode;
4322 u_int16_t flags;
4323
4324 /*
4325 * Change channels and update the h/w rate map
4326 * if we're switching; e.g. 11a to 11b/g.
4327 */
4321 mode = ieee80211_chan2mode(ic, chan);
4322 if (mode == IEEE80211_MODE_11A) {
4323 if (IEEE80211_IS_CHAN_HALF(chan))
4324 mode = IEEE80211_MODE_11A_HALF;
4325 else if (IEEE80211_IS_CHAN_QUARTER(chan))
4326 mode = IEEE80211_MODE_11A_QUARTER;
4327 }
4328 if (IEEE80211_IS_CHAN_HALF(chan))
4329 mode = IEEE80211_MODE_HALF;
4330 else if (IEEE80211_IS_CHAN_QUARTER(chan))
4331 mode = IEEE80211_MODE_QUARTER;
4332 else
4333 mode = ieee80211_chan2mode(ic, chan);
4328 if (mode != sc->sc_curmode)
4329 ath_setcurmode(sc, mode);
4330 /*
4331 * Update BPF state. NB: ethereal et. al. don't handle
4332 * merged flags well so pick a unique mode for their use.
4333 */
4334 if (IEEE80211_IS_CHAN_A(chan))
4335 flags = IEEE80211_CHAN_A;
4336 /* XXX 11g schizophrenia */
4337 else if (IEEE80211_IS_CHAN_ANYG(chan))
4338 flags = IEEE80211_CHAN_G;
4339 else
4340 flags = IEEE80211_CHAN_B;
4341 if (IEEE80211_IS_CHAN_T(chan))
4342 flags |= IEEE80211_CHAN_TURBO;
4334 if (mode != sc->sc_curmode)
4335 ath_setcurmode(sc, mode);
4336 /*
4337 * Update BPF state. NB: ethereal et. al. don't handle
4338 * merged flags well so pick a unique mode for their use.
4339 */
4340 if (IEEE80211_IS_CHAN_A(chan))
4341 flags = IEEE80211_CHAN_A;
4342 /* XXX 11g schizophrenia */
4343 else if (IEEE80211_IS_CHAN_ANYG(chan))
4344 flags = IEEE80211_CHAN_G;
4345 else
4346 flags = IEEE80211_CHAN_B;
4347 if (IEEE80211_IS_CHAN_T(chan))
4348 flags |= IEEE80211_CHAN_TURBO;
4349 if (IEEE80211_IS_CHAN_HALF(chan))
4350 flags |= IEEE80211_CHAN_HALF;
4351 if (IEEE80211_IS_CHAN_QUARTER(chan))
4352 flags |= IEEE80211_CHAN_QUARTER;
4343 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
4344 htole16(chan->ic_freq);
4345 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
4346 htole16(flags);
4347}
4348
4349/*
4350 * Poll for a channel clear indication; this is required

--- 44 unchanged lines hidden (view full) ---

4395 struct ieee80211com *ic = &sc->sc_ic;
4396 HAL_CHANNEL hchan;
4397
4398 /*
4399 * Convert to a HAL channel description with
4400 * the flags constrained to reflect the current
4401 * operating mode.
4402 */
4353 sc->sc_tx_th.wt_chan_freq = sc->sc_rx_th.wr_chan_freq =
4354 htole16(chan->ic_freq);
4355 sc->sc_tx_th.wt_chan_flags = sc->sc_rx_th.wr_chan_flags =
4356 htole16(flags);
4357}
4358
4359/*
4360 * Poll for a channel clear indication; this is required

--- 44 unchanged lines hidden (view full) ---

4405 struct ieee80211com *ic = &sc->sc_ic;
4406 HAL_CHANNEL hchan;
4407
4408 /*
4409 * Convert to a HAL channel description with
4410 * the flags constrained to reflect the current
4411 * operating mode.
4412 */
4403 hchan.channel = chan->ic_freq;
4404 hchan.channelFlags = ath_chan2flags(ic, chan);
4413 ath_mapchan(ic, &hchan, chan);
4405
4406 DPRINTF(sc, ATH_DEBUG_RESET,
4407 "%s: %u (%u MHz, hal flags 0x%x) -> %u (%u MHz, hal flags 0x%x)\n",
4408 __func__,
4409 ath_hal_mhz2ieee(ah, sc->sc_curchan.channel,
4410 sc->sc_curchan.channelFlags),
4411 sc->sc_curchan.channel, sc->sc_curchan.channelFlags,
4412 ath_hal_mhz2ieee(ah, hchan.channel, hchan.channelFlags),

--- 411 unchanged lines hidden (view full) ---

4824 if (ix < 0) {
4825 /* XXX can't handle stuff <2400 right now */
4826 if (bootverbose)
4827 if_printf(ifp, "hal channel %d (%u/%x) "
4828 "cannot be handled; ignored\n",
4829 ix, c->channel, c->channelFlags);
4830 continue;
4831 }
4414
4415 DPRINTF(sc, ATH_DEBUG_RESET,
4416 "%s: %u (%u MHz, hal flags 0x%x) -> %u (%u MHz, hal flags 0x%x)\n",
4417 __func__,
4418 ath_hal_mhz2ieee(ah, sc->sc_curchan.channel,
4419 sc->sc_curchan.channelFlags),
4420 sc->sc_curchan.channel, sc->sc_curchan.channelFlags,
4421 ath_hal_mhz2ieee(ah, hchan.channel, hchan.channelFlags),

--- 411 unchanged lines hidden (view full) ---

4833 if (ix < 0) {
4834 /* XXX can't handle stuff <2400 right now */
4835 if (bootverbose)
4836 if_printf(ifp, "hal channel %d (%u/%x) "
4837 "cannot be handled; ignored\n",
4838 ix, c->channel, c->channelFlags);
4839 continue;
4840 }
4841 if (bootverbose)
4842 if_printf(ifp, "hal channel %u/%x -> %u\n",
4843 c->channel, c->channelFlags, ix);
4832 /*
4833 * Calculate net80211 flags; most are compatible
4834 * but some need massaging. Note the static turbo
4835 * conversion can be removed once net80211 is updated
4836 * to understand static vs. dynamic turbo.
4837 */
4838 flags = c->channelFlags & COMPAT;
4839 if (c->channelFlags & CHANNEL_STURBO)
4840 flags |= IEEE80211_CHAN_TURBO;
4844 /*
4845 * Calculate net80211 flags; most are compatible
4846 * but some need massaging. Note the static turbo
4847 * conversion can be removed once net80211 is updated
4848 * to understand static vs. dynamic turbo.
4849 */
4850 flags = c->channelFlags & COMPAT;
4851 if (c->channelFlags & CHANNEL_STURBO)
4852 flags |= IEEE80211_CHAN_TURBO;
4853 if (ath_hal_isgsmsku(ah)) {
4854 /* remap to true frequencies */
4855 c->channel = 922 + (2422 - c->channel);
4856 flags |= IEEE80211_CHAN_GSM;
4857 ix = ieee80211_mhz2ieee(c->channel, flags);
4858 }
4841 if (ic->ic_channels[ix].ic_freq == 0) {
4842 ic->ic_channels[ix].ic_freq = c->channel;
4843 ic->ic_channels[ix].ic_flags = flags;
4844 } else {
4845 /* channels overlap; e.g. 11g and 11b */
4846 ic->ic_channels[ix].ic_flags |= flags;
4847 }
4848 }

--- 89 unchanged lines hidden (view full) ---

4938{
4939 struct ath_hal *ah = sc->sc_ah;
4940 const HAL_RATE_TABLE *rt;
4941
4942 switch (mode) {
4943 case IEEE80211_MODE_11A:
4944 rt = ath_hal_getratetable(ah, HAL_MODE_11A);
4945 break;
4859 if (ic->ic_channels[ix].ic_freq == 0) {
4860 ic->ic_channels[ix].ic_freq = c->channel;
4861 ic->ic_channels[ix].ic_flags = flags;
4862 } else {
4863 /* channels overlap; e.g. 11g and 11b */
4864 ic->ic_channels[ix].ic_flags |= flags;
4865 }
4866 }

--- 89 unchanged lines hidden (view full) ---

4956{
4957 struct ath_hal *ah = sc->sc_ah;
4958 const HAL_RATE_TABLE *rt;
4959
4960 switch (mode) {
4961 case IEEE80211_MODE_11A:
4962 rt = ath_hal_getratetable(ah, HAL_MODE_11A);
4963 break;
4946 case IEEE80211_MODE_11A_HALF:
4964 case IEEE80211_MODE_HALF:
4947 rt = ath_hal_getratetable(ah, HAL_MODE_11A_HALF_RATE);
4948 break;
4965 rt = ath_hal_getratetable(ah, HAL_MODE_11A_HALF_RATE);
4966 break;
4949 case IEEE80211_MODE_11A_QUARTER:
4967 case IEEE80211_MODE_QUARTER:
4950 rt = ath_hal_getratetable(ah, HAL_MODE_11A_QUARTER_RATE);
4951 break;
4952 case IEEE80211_MODE_11B:
4953 rt = ath_hal_getratetable(ah, HAL_MODE_11B);
4954 break;
4955 case IEEE80211_MODE_11G:
4956 rt = ath_hal_getratetable(ah, HAL_MODE_11G);
4957 break;

--- 32 unchanged lines hidden (view full) ---

4990 { 22, 100, 25 },
4991 { 18, 133, 34 },
4992 { 12, 160, 40 },
4993 { 10, 200, 50 },
4994 { 6, 240, 58 },
4995 { 4, 267, 66 },
4996 { 2, 400, 100 },
4997 { 0, 500, 130 },
4968 rt = ath_hal_getratetable(ah, HAL_MODE_11A_QUARTER_RATE);
4969 break;
4970 case IEEE80211_MODE_11B:
4971 rt = ath_hal_getratetable(ah, HAL_MODE_11B);
4972 break;
4973 case IEEE80211_MODE_11G:
4974 rt = ath_hal_getratetable(ah, HAL_MODE_11G);
4975 break;

--- 32 unchanged lines hidden (view full) ---

5008 { 22, 100, 25 },
5009 { 18, 133, 34 },
5010 { 12, 160, 40 },
5011 { 10, 200, 50 },
5012 { 6, 240, 58 },
5013 { 4, 267, 66 },
5014 { 2, 400, 100 },
5015 { 0, 500, 130 },
5016 /* XXX half/quarter rates */
4998 };
4999 const HAL_RATE_TABLE *rt;
5000 int i, j;
5001
5002 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
5003 rt = sc->sc_rates[mode];
5004 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
5005 for (i = 0; i < rt->rateCount; i++)

--- 889 unchanged lines hidden --- 		5017 };
5018 const HAL_RATE_TABLE *rt;
5019 int i, j;
5020
5021 memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
5022 rt = sc->sc_rates[mode];
5023 KASSERT(rt != NULL, ("no h/w rate set for phy mode %u", mode));
5024 for (i = 0; i < rt->rateCount; i++)

--- 889 unchanged lines hidden ---