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ah_eeprom_v4k.h (208711) ah_eeprom_v4k.h (217809)
1/*
2 * Copyright (c) 2009 Rui Paulo <rpaulo@FreeBSD.org>
3 * Copyright (c) 2008 Sam Leffler, Errno Consulting
4 * Copyright (c) 2008 Atheros Communications, Inc.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
1/*
2 * Copyright (c) 2009 Rui Paulo <rpaulo@FreeBSD.org>
3 * Copyright (c) 2008 Sam Leffler, Errno Consulting
4 * Copyright (c) 2008 Atheros Communications, Inc.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 *
18 * $FreeBSD: head/sys/dev/ath/ath_hal/ah_eeprom_v4k.h 208711 2010-06-01 15:33:10Z rpaulo $
18 * $FreeBSD: head/sys/dev/ath/ath_hal/ah_eeprom_v4k.h 217809 2011-01-25 05:35:09Z adrian $
19 */
20#ifndef _AH_EEPROM_V4K_H_
21#define _AH_EEPROM_V4K_H_
22
23#include "ah_eeprom.h"
24#include "ah_eeprom_v14.h"
25
26#define AR9285_RDEXT_DEFAULT 0x1F

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83 uint8_t txEndToRxOn; // 1
84 uint8_t txFrameToXpaOn; // 1
85 uint8_t thresh62; // 1
86 uint8_t noiseFloorThreshCh[AR5416_4K_MAX_CHAINS]; // 1
87 uint8_t xpdGain; // 1
88 uint8_t xpd; // 1
89 int8_t iqCalICh[AR5416_4K_MAX_CHAINS]; // 1
90 int8_t iqCalQCh[AR5416_4K_MAX_CHAINS]; // 1
19 */
20#ifndef _AH_EEPROM_V4K_H_
21#define _AH_EEPROM_V4K_H_
22
23#include "ah_eeprom.h"
24#include "ah_eeprom_v14.h"
25
26#define AR9285_RDEXT_DEFAULT 0x1F

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83 uint8_t txEndToRxOn; // 1
84 uint8_t txFrameToXpaOn; // 1
85 uint8_t thresh62; // 1
86 uint8_t noiseFloorThreshCh[AR5416_4K_MAX_CHAINS]; // 1
87 uint8_t xpdGain; // 1
88 uint8_t xpd; // 1
89 int8_t iqCalICh[AR5416_4K_MAX_CHAINS]; // 1
90 int8_t iqCalQCh[AR5416_4K_MAX_CHAINS]; // 1
91
91 uint8_t pdGainOverlap; // 1
92 uint8_t pdGainOverlap; // 1
92 uint8_t ob; // 1
93 uint8_t db; // 1
94 uint8_t xpaBiasLvl; // 1
95#if 0
96 uint8_t pwrDecreaseFor2Chain; // 1
97 uint8_t pwrDecreaseFor3Chain; // 1 -> 48 B
93
94#ifdef __BIG_ENDIAN_BITFIELD
95 uint8_t ob_1:4, ob_0:4;
96 uint8_t db1_1:4, db1_0:4;
97#else
98 uint8_t ob_0:4, ob_1:4;
99 uint8_t db1_0:4, db1_1:4;
98#endif
100#endif
101
102 uint8_t xpaBiasLvl; // 1
99 uint8_t txFrameToDataStart; // 1
100 uint8_t txFrameToPaOn; // 1
101 uint8_t ht40PowerIncForPdadc; // 1
102 uint8_t bswAtten[AR5416_4K_MAX_CHAINS]; // 1
103 uint8_t bswMargin[AR5416_4K_MAX_CHAINS]; // 1
104 uint8_t swSettleHt40; // 1
105 uint8_t xatten2Db[AR5416_4K_MAX_CHAINS]; // 1
106 uint8_t xatten2Margin[AR5416_4K_MAX_CHAINS]; // 1
103 uint8_t txFrameToDataStart; // 1
104 uint8_t txFrameToPaOn; // 1
105 uint8_t ht40PowerIncForPdadc; // 1
106 uint8_t bswAtten[AR5416_4K_MAX_CHAINS]; // 1
107 uint8_t bswMargin[AR5416_4K_MAX_CHAINS]; // 1
108 uint8_t swSettleHt40; // 1
109 uint8_t xatten2Db[AR5416_4K_MAX_CHAINS]; // 1
110 uint8_t xatten2Margin[AR5416_4K_MAX_CHAINS]; // 1
107 uint8_t ob_ch1; // 1 -> ob and db become chain specific from AR9280
108 uint8_t db_ch1; // 1
109 uint8_t flagBits; // 1
110#define AR5416_EEP_FLAG_USEANT1 0x01 /* +1 configured antenna */
111#define AR5416_EEP_FLAG_FORCEXPAON 0x02 /* force XPA bit for 5G */
112#define AR5416_EEP_FLAG_LOCALBIAS 0x04 /* enable local bias */
113#define AR5416_EEP_FLAG_FEMBANDSELECT 0x08 /* FEM band select used */
114#define AR5416_EEP_FLAG_XLNABUFIN 0x10
115#define AR5416_EEP_FLAG_XLNAISEL 0x60
116#define AR5416_EEP_FLAG_XLNAISEL_S 5
117#define AR5416_EEP_FLAG_XLNABUFMODE 0x80
118 uint8_t miscBits; // [0..1]: bb_tx_dac_scale_cck
119 uint16_t xpaBiasLvlFreq[3]; // 6
120 uint8_t futureModal[2]; // 2
121
111
112#ifdef __BIG_ENDIAN_BITFIELD
113 uint8_t db2_1:4, db2_0:4; // 1
114#else
115 uint8_t db2_0:4, db2_1:4; // 1
116#endif
117
118 uint8_t version; // 1
119
120#ifdef __BIG_ENDIAN_BITFIELD
121 uint8_t ob_3:4, ob_2:4;
122 uint8_t antdiv_ctl1:4, ob_4:4;
123 uint8_t db1_3:4, db1_2:4;
124 uint8_t antdiv_ctl2:4, db1_4:4;
125 uint8_t db2_2:4, db2_3:4;
126 uint8_t reserved:4, db2_4:4;
127#else
128 uint8_t ob_2:4, ob_3:4;
129 uint8_t ob_4:4, antdiv_ctl1:4;
130 uint8_t db1_2:4, db1_3:4;
131 uint8_t db1_4:4, antdiv_ctl2:4;
132 uint8_t db2_2:4, db2_3:4;
133 uint8_t db2_4:4, reserved:4;
134#endif
135 uint8_t futureModal[4];
136
122 SPUR_CHAN spurChans[AR5416_EEPROM_MODAL_SPURS]; // 20 B
137 SPUR_CHAN spurChans[AR5416_EEPROM_MODAL_SPURS]; // 20 B
123} __packed MODAL_EEP4K_HEADER; // == 68 B
138} __packed MODAL_EEP4K_HEADER; // == ? B
124
125typedef struct CalCtlData4k {
126 CAL_CTL_EDGES ctlEdges[AR5416_4K_MAX_CHAINS][AR5416_4K_NUM_BAND_EDGES];
127} __packed CAL_CTL_DATA_4K;
128
129typedef struct calDataPerFreq4k {
130 uint8_t pwrPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
131 uint8_t vpdPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];

--- 26 unchanged lines hidden --- 		139
140typedef struct CalCtlData4k {
141 CAL_CTL_EDGES ctlEdges[AR5416_4K_MAX_CHAINS][AR5416_4K_NUM_BAND_EDGES];
142} __packed CAL_CTL_DATA_4K;
143
144typedef struct calDataPerFreq4k {
145 uint8_t pwrPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
146 uint8_t vpdPdg[AR5416_4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];

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