ah.h (235972) | ah.h (237611) |
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1/* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * | 1/* 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * |
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ah.h 235972 2012-05-25 05:01:27Z adrian $ | 17 * $FreeBSD: head/sys/dev/ath/ath_hal/ah.h 237611 2012-06-26 22:16:53Z adrian $ |
18 */ 19 20#ifndef _ATH_AH_H_ 21#define _ATH_AH_H_ 22/* 23 * Atheros Hardware Access Layer 24 * 25 * Clients of the HAL call ath_hal_attach to obtain a reference to an ath_hal --- 390 unchanged lines hidden (view full) --- 416 | HAL_INT_RXKCM 417 | HAL_INT_SWBA 418 | HAL_INT_BMISS 419 | HAL_INT_BNR 420 | HAL_INT_GPIO, 421} HAL_INT; 422 423typedef enum { | 18 */ 19 20#ifndef _ATH_AH_H_ 21#define _ATH_AH_H_ 22/* 23 * Atheros Hardware Access Layer 24 * 25 * Clients of the HAL call ath_hal_attach to obtain a reference to an ath_hal --- 390 unchanged lines hidden (view full) --- 416 | HAL_INT_RXKCM 417 | HAL_INT_SWBA 418 | HAL_INT_BMISS 419 | HAL_INT_BNR 420 | HAL_INT_GPIO, 421} HAL_INT; 422 423typedef enum { |
424 HAL_GPIO_MUX_OUTPUT = 0, 425 HAL_GPIO_MUX_PCIE_ATTENTION_LED = 1, 426 HAL_GPIO_MUX_PCIE_POWER_LED = 2, 427 HAL_GPIO_MUX_TX_FRAME = 3, 428 HAL_GPIO_MUX_RX_CLEAR_EXTERNAL = 4, 429 HAL_GPIO_MUX_MAC_NETWORK_LED = 5, 430 HAL_GPIO_MUX_MAC_POWER_LED = 6 | 424 HAL_GPIO_OUTPUT_MUX_AS_OUTPUT = 0, 425 HAL_GPIO_OUTPUT_MUX_PCIE_ATTENTION_LED = 1, 426 HAL_GPIO_OUTPUT_MUX_PCIE_POWER_LED = 2, 427 HAL_GPIO_OUTPUT_MUX_MAC_NETWORK_LED = 3, 428 HAL_GPIO_OUTPUT_MUX_MAC_POWER_LED = 4, 429 HAL_GPIO_OUTPUT_MUX_AS_WLAN_ACTIVE = 5, 430 HAL_GPIO_OUTPUT_MUX_AS_TX_FRAME = 6 |
431} HAL_GPIO_MUX_TYPE; 432 433typedef enum { 434 HAL_GPIO_INTR_LOW = 0, 435 HAL_GPIO_INTR_HIGH = 1, 436 HAL_GPIO_INTR_DISABLE = 2 437} HAL_GPIO_INTR_TYPE; 438 --- 333 unchanged lines hidden (view full) --- 772 uint64_t re_full_ts; /* 64-bit full timestamp from interrupt time */ 773 uint32_t re_ts; /* Original 15 bit recv timestamp */ 774 uint8_t re_rssi; /* rssi of radar event */ 775 uint8_t re_dur; /* duration of radar pulse */ 776 uint32_t re_flags; /* Flags (see above) */ 777}; 778typedef struct hal_dfs_event HAL_DFS_EVENT; 779 | 431} HAL_GPIO_MUX_TYPE; 432 433typedef enum { 434 HAL_GPIO_INTR_LOW = 0, 435 HAL_GPIO_INTR_HIGH = 1, 436 HAL_GPIO_INTR_DISABLE = 2 437} HAL_GPIO_INTR_TYPE; 438 --- 333 unchanged lines hidden (view full) --- 772 uint64_t re_full_ts; /* 64-bit full timestamp from interrupt time */ 773 uint32_t re_ts; /* Original 15 bit recv timestamp */ 774 uint8_t re_rssi; /* rssi of radar event */ 775 uint8_t re_dur; /* duration of radar pulse */ 776 uint32_t re_flags; /* Flags (see above) */ 777}; 778typedef struct hal_dfs_event HAL_DFS_EVENT; 779 |
780/* 781 * BT Co-existence definitions 782 */ 783typedef enum { 784 HAL_BT_MODULE_CSR_BC4 = 0, /* CSR BlueCore v4 */ 785 HAL_BT_MODULE_JANUS = 1, /* Kite + Valkyrie combo */ 786 HAL_BT_MODULE_HELIUS = 2, /* Kiwi + Valkyrie combo */ 787 HAL_MAX_BT_MODULES 788} HAL_BT_MODULE; 789 790typedef struct { 791 HAL_BT_MODULE bt_module; 792 u_int8_t bt_coex_config; 793 u_int8_t bt_gpio_bt_active; 794 u_int8_t bt_gpio_bt_priority; 795 u_int8_t bt_gpio_wlan_active; 796 u_int8_t bt_active_polarity; 797 HAL_BOOL bt_single_ant; 798 u_int8_t bt_dutyCycle; 799 u_int8_t bt_isolation; 800 u_int8_t bt_period; 801} HAL_BT_COEX_INFO; 802 803typedef enum { 804 HAL_BT_COEX_MODE_LEGACY = 0, /* legacy rx_clear mode */ 805 HAL_BT_COEX_MODE_UNSLOTTED = 1, /* untimed/unslotted mode */ 806 HAL_BT_COEX_MODE_SLOTTED = 2, /* slotted mode */ 807 HAL_BT_COEX_MODE_DISALBED = 3, /* coexistence disabled */ 808} HAL_BT_COEX_MODE; 809 810typedef enum { 811 HAL_BT_COEX_CFG_NONE, /* No bt coex enabled */ 812 HAL_BT_COEX_CFG_2WIRE_2CH, /* 2-wire with 2 chains */ 813 HAL_BT_COEX_CFG_2WIRE_CH1, /* 2-wire with ch1 */ 814 HAL_BT_COEX_CFG_2WIRE_CH0, /* 2-wire with ch0 */ 815 HAL_BT_COEX_CFG_3WIRE, /* 3-wire */ 816 HAL_BT_COEX_CFG_MCI /* MCI */ 817} HAL_BT_COEX_CFG; 818 819typedef enum { 820 HAL_BT_COEX_SET_ACK_PWR = 0, /* Change ACK power setting */ 821 HAL_BT_COEX_LOWER_TX_PWR, /* Change transmit power */ 822 HAL_BT_COEX_ANTENNA_DIVERSITY, /* Enable RX diversity for Kite */ 823} HAL_BT_COEX_SET_PARAMETER; 824 825#define HAL_BT_COEX_FLAG_LOW_ACK_PWR 0x00000001 826#define HAL_BT_COEX_FLAG_LOWER_TX_PWR 0x00000002 827/* Check Rx Diversity is allowed */ 828#define HAL_BT_COEX_FLAG_ANT_DIV_ALLOW 0x00000004 829/* Check Diversity is on or off */ 830#define HAL_BT_COEX_FLAG_ANT_DIV_ENABLE 0x00000008 831 832#define HAL_BT_COEX_ANTDIV_CONTROL1_ENABLE 0x0b 833/* main: LNA1, alt: LNA2 */ 834#define HAL_BT_COEX_ANTDIV_CONTROL2_ENABLE 0x09 835#define HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_A 0x04 836#define HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_A 0x09 837#define HAL_BT_COEX_ANTDIV_CONTROL1_FIXED_B 0x02 838#define HAL_BT_COEX_ANTDIV_CONTROL2_FIXED_B 0x06 839 840#define HAL_BT_COEX_ISOLATION_FOR_NO_COEX 30 841 842#define HAL_BT_COEX_ANT_DIV_SWITCH_COM 0x66666666 843 844#define HAL_BT_COEX_HELIUS_CHAINMASK 0x02 845 846#define HAL_BT_COEX_LOW_ACK_POWER 0x0 847#define HAL_BT_COEX_HIGH_ACK_POWER 0x3f3f3f 848 849typedef enum { 850 HAL_BT_COEX_NO_STOMP = 0, 851 HAL_BT_COEX_STOMP_ALL, 852 HAL_BT_COEX_STOMP_LOW, 853 HAL_BT_COEX_STOMP_NONE, 854 HAL_BT_COEX_STOMP_ALL_FORCE, 855 HAL_BT_COEX_STOMP_LOW_FORCE, 856} HAL_BT_COEX_STOMP_TYPE; 857 858typedef struct { 859 /* extend rx_clear after tx/rx to protect the burst (in usec). */ 860 u_int8_t bt_time_extend; 861 862 /* 863 * extend rx_clear as long as txsm is 864 * transmitting or waiting for ack. 865 */ 866 HAL_BOOL bt_txstate_extend; 867 868 /* 869 * extend rx_clear so that when tx_frame 870 * is asserted, rx_clear will drop. 871 */ 872 HAL_BOOL bt_txframe_extend; 873 874 /* 875 * coexistence mode 876 */ 877 HAL_BT_COEX_MODE bt_mode; 878 879 /* 880 * treat BT high priority traffic as 881 * a quiet collision 882 */ 883 HAL_BOOL bt_quiet_collision; 884 885 /* 886 * invert rx_clear as WLAN_ACTIVE 887 */ 888 HAL_BOOL bt_rxclear_polarity; 889 890 /* 891 * slotted mode only. indicate the time in usec 892 * from the rising edge of BT_ACTIVE to the time 893 * BT_PRIORITY can be sampled to indicate priority. 894 */ 895 u_int8_t bt_priority_time; 896 897 /* 898 * slotted mode only. indicate the time in usec 899 * from the rising edge of BT_ACTIVE to the time 900 * BT_PRIORITY can be sampled to indicate tx/rx and 901 * BT_FREQ is sampled. 902 */ 903 u_int8_t bt_first_slot_time; 904 905 /* 906 * slotted mode only. rx_clear and bt_ant decision 907 * will be held the entire time that BT_ACTIVE is asserted, 908 * otherwise the decision is made before every slot boundry. 909 */ 910 HAL_BOOL bt_hold_rxclear; 911} HAL_BT_COEX_CONFIG; 912 |
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780typedef struct 781{ 782 int ah_debug; /* only used if AH_DEBUG is defined */ 783 int ah_ar5416_biasadj; /* enable AR2133 radio specific bias fiddling */ 784 785 /* NB: these are deprecated; they exist for now for compatibility */ 786 int ah_dma_beacon_response_time;/* in TU's */ 787 int ah_sw_beacon_response_time; /* in TU's */ --- 398 unchanged lines hidden --- | 913typedef struct 914{ 915 int ah_debug; /* only used if AH_DEBUG is defined */ 916 int ah_ar5416_biasadj; /* enable AR2133 radio specific bias fiddling */ 917 918 /* NB: these are deprecated; they exist for now for compatibility */ 919 int ah_dma_beacon_response_time;/* in TU's */ 920 int ah_sw_beacon_response_time; /* in TU's */ --- 398 unchanged lines hidden --- |