| ata-highpoint.c (194893) | ata-highpoint.c (200171) |
|---|---|
| 1/*- 2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-highpoint.c 194893 2009-06-24 19:49:18Z mav $"); | 28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-highpoint.c 200171 2009-12-06 00:10:13Z mav $"); |
| 29 30#include "opt_ata.h" 31#include <sys/param.h> 32#include <sys/module.h> 33#include <sys/systm.h> 34#include <sys/kernel.h> 35#include <sys/ata.h> 36#include <sys/bus.h> --- 12 unchanged lines hidden (view full) --- 49#include <dev/pci/pcireg.h> 50#include <dev/ata/ata-all.h> 51#include <dev/ata/ata-pci.h> 52#include <ata_if.h> 53 54/* local prototypes */ 55static int ata_highpoint_chipinit(device_t dev); 56static int ata_highpoint_ch_attach(device_t dev); | 29 30#include "opt_ata.h" 31#include <sys/param.h> 32#include <sys/module.h> 33#include <sys/systm.h> 34#include <sys/kernel.h> 35#include <sys/ata.h> 36#include <sys/bus.h> --- 12 unchanged lines hidden (view full) --- 49#include <dev/pci/pcireg.h> 50#include <dev/ata/ata-all.h> 51#include <dev/ata/ata-pci.h> 52#include <ata_if.h> 53 54/* local prototypes */ 55static int ata_highpoint_chipinit(device_t dev); 56static int ata_highpoint_ch_attach(device_t dev); |
| 57static void ata_highpoint_setmode(device_t dev, int mode); | 57static int ata_highpoint_setmode(device_t dev, int target, int mode); |
| 58static int ata_highpoint_check_80pin(device_t dev, int mode); 59 60/* misc defines */ 61#define HPT_366 0 62#define HPT_370 1 63#define HPT_372 2 64#define HPT_374 3 65#define HPT_OLD 1 --- 72 unchanged lines hidden (view full) --- 138 ctlr->ch_detach = ata_pci_ch_detach; 139 ctlr->setmode = ata_highpoint_setmode; 140 return 0; 141} 142 143static int 144ata_highpoint_ch_attach(device_t dev) 145{ | 58static int ata_highpoint_check_80pin(device_t dev, int mode); 59 60/* misc defines */ 61#define HPT_366 0 62#define HPT_370 1 63#define HPT_372 2 64#define HPT_374 3 65#define HPT_OLD 1 --- 72 unchanged lines hidden (view full) --- 138 ctlr->ch_detach = ata_pci_ch_detach; 139 ctlr->setmode = ata_highpoint_setmode; 140 return 0; 141} 142 143static int 144ata_highpoint_ch_attach(device_t dev) 145{ |
| 146 struct ata_channel *ch = device_get_softc(dev); | 146 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 147 struct ata_channel *ch = device_get_softc(dev); |
| 147 | 148 |
| 148 /* setup the usual register normal pci style */ 149 if (ata_pci_ch_attach(dev)) 150 return ENXIO; 151 152 ch->flags |= ATA_ALWAYS_DMASTAT; 153 return 0; | 149 /* setup the usual register normal pci style */ 150 if (ata_pci_ch_attach(dev)) 151 return (ENXIO); 152 ch->flags |= ATA_ALWAYS_DMASTAT; 153 ch->flags |= ATA_CHECKS_CABLE; 154 if (ctlr->chip->cfg1 == HPT_366) 155 ch->flags |= ATA_NO_ATAPI_DMA; 156 return (0); |
| 154} 155 | 157} 158 |
| 156static void 157ata_highpoint_setmode(device_t dev, int mode) | 159static int 160ata_highpoint_setmode(device_t dev, int target, int mode) |
| 158{ | 161{ |
| 159 device_t gparent = GRANDPARENT(dev); 160 struct ata_pci_controller *ctlr = device_get_softc(gparent); 161 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 162 struct ata_device *atadev = device_get_softc(dev); 163 int devno = (ch->unit << 1) + atadev->unit; 164 int error; 165 u_int32_t timings33[][4] = { | 162 device_t parent = device_get_parent(dev); 163 struct ata_pci_controller *ctlr = device_get_softc(parent); 164 struct ata_channel *ch = device_get_softc(dev); 165 int devno = (ch->unit << 1) + target; 166 u_int32_t timings33[][4] = { |
| 166 /* HPT366 HPT370 HPT372 HPT374 mode */ 167 { 0x40d0a7aa, 0x06914e57, 0x0d029d5e, 0x0ac1f48a }, /* PIO 0 */ 168 { 0x40d0a7a3, 0x06914e43, 0x0d029d26, 0x0ac1f465 }, /* PIO 1 */ 169 { 0x40d0a753, 0x06514e33, 0x0c829ca6, 0x0a81f454 }, /* PIO 2 */ 170 { 0x40c8a742, 0x06514e22, 0x0c829c84, 0x0a81f443 }, /* PIO 3 */ 171 { 0x40c8a731, 0x06514e21, 0x0c829c62, 0x0a81f442 }, /* PIO 4 */ 172 { 0x20c8a797, 0x26514e97, 0x2c82922e, 0x228082ea }, /* MWDMA 0 */ 173 { 0x20c8a732, 0x26514e33, 0x2c829266, 0x22808254 }, /* MWDMA 1 */ 174 { 0x20c8a731, 0x26514e21, 0x2c829262, 0x22808242 }, /* MWDMA 2 */ 175 { 0x10c8a731, 0x16514e31, 0x1c829c62, 0x121882ea }, /* UDMA 0 */ 176 { 0x10cba731, 0x164d4e31, 0x1c9a9c62, 0x12148254 }, /* UDMA 1 */ 177 { 0x10caa731, 0x16494e31, 0x1c929c62, 0x120c8242 }, /* UDMA 2 */ 178 { 0x10cfa731, 0x166d4e31, 0x1c8e9c62, 0x128c8242 }, /* UDMA 3 */ 179 { 0x10c9a731, 0x16454e31, 0x1c8a9c62, 0x12ac8242 }, /* UDMA 4 */ 180 { 0, 0x16454e31, 0x1c8a9c62, 0x12848242 }, /* UDMA 5 */ 181 { 0, 0, 0x1c869c62, 0x12808242 } /* UDMA 6 */ | 167 /* HPT366 HPT370 HPT372 HPT374 mode */ 168 { 0x40d0a7aa, 0x06914e57, 0x0d029d5e, 0x0ac1f48a }, /* PIO 0 */ 169 { 0x40d0a7a3, 0x06914e43, 0x0d029d26, 0x0ac1f465 }, /* PIO 1 */ 170 { 0x40d0a753, 0x06514e33, 0x0c829ca6, 0x0a81f454 }, /* PIO 2 */ 171 { 0x40c8a742, 0x06514e22, 0x0c829c84, 0x0a81f443 }, /* PIO 3 */ 172 { 0x40c8a731, 0x06514e21, 0x0c829c62, 0x0a81f442 }, /* PIO 4 */ 173 { 0x20c8a797, 0x26514e97, 0x2c82922e, 0x228082ea }, /* MWDMA 0 */ 174 { 0x20c8a732, 0x26514e33, 0x2c829266, 0x22808254 }, /* MWDMA 1 */ 175 { 0x20c8a731, 0x26514e21, 0x2c829262, 0x22808242 }, /* MWDMA 2 */ 176 { 0x10c8a731, 0x16514e31, 0x1c829c62, 0x121882ea }, /* UDMA 0 */ 177 { 0x10cba731, 0x164d4e31, 0x1c9a9c62, 0x12148254 }, /* UDMA 1 */ 178 { 0x10caa731, 0x16494e31, 0x1c929c62, 0x120c8242 }, /* UDMA 2 */ 179 { 0x10cfa731, 0x166d4e31, 0x1c8e9c62, 0x128c8242 }, /* UDMA 3 */ 180 { 0x10c9a731, 0x16454e31, 0x1c8a9c62, 0x12ac8242 }, /* UDMA 4 */ 181 { 0, 0x16454e31, 0x1c8a9c62, 0x12848242 }, /* UDMA 5 */ 182 { 0, 0, 0x1c869c62, 0x12808242 } /* UDMA 6 */ |
| 182 }; | 183 }; |
| 183 | 184 |
| 184 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); 185 186 if (ctlr->chip->cfg1 == HPT_366 && ata_atapi(dev)) 187 mode = ata_limit_mode(dev, mode, ATA_PIO_MAX); 188 189 mode = ata_highpoint_check_80pin(dev, mode); 190 191 /* 192 * most if not all HPT chips cant really handle that the device is 193 * running at ATA_UDMA6/ATA133 speed, so we cheat at set the device to 194 * a max of ATA_UDMA5/ATA100 to guard against suboptimal performance 195 */ 196 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, 197 ata_limit_mode(dev, mode, ATA_UDMA5)); 198 if (bootverbose) 199 device_printf(dev, "%ssetting %s on HighPoint chip\n", 200 (error) ? "FAILURE " : "", ata_mode2str(mode)); 201 if (!error) 202 pci_write_config(gparent, 0x40 + (devno << 2), | 185 mode = min(mode, ctlr->chip->max_dma); 186 mode = ata_highpoint_check_80pin(dev, mode); 187 /* 188 * most if not all HPT chips cant really handle that the device is 189 * running at ATA_UDMA6/ATA133 speed, so we cheat at set the device to 190 * a max of ATA_UDMA5/ATA100 to guard against suboptimal performance 191 */ 192 mode = min(mode, ATA_UDMA5); 193 pci_write_config(parent, 0x40 + (devno << 2), |
| 203 timings33[ata_mode2idx(mode)][ctlr->chip->cfg1], 4); | 194 timings33[ata_mode2idx(mode)][ctlr->chip->cfg1], 4); |
| 204 atadev->mode = mode; | 195 return (mode); |
| 205} 206 207static int 208ata_highpoint_check_80pin(device_t dev, int mode) 209{ | 196} 197 198static int 199ata_highpoint_check_80pin(device_t dev, int mode) 200{ |
| 210 device_t gparent = GRANDPARENT(dev); 211 struct ata_pci_controller *ctlr = device_get_softc(gparent); 212 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); | 201 device_t parent = device_get_parent(dev); 202 struct ata_pci_controller *ctlr = device_get_softc(parent); 203 struct ata_channel *ch = device_get_softc(dev); |
| 213 u_int8_t reg, val, res; 214 | 204 u_int8_t reg, val, res; 205 |
| 215 if (ctlr->chip->cfg1 == HPT_374 && pci_get_function(gparent) == 1) { | 206 if (ctlr->chip->cfg1 == HPT_374 && pci_get_function(parent) == 1) { |
| 216 reg = ch->unit ? 0x57 : 0x53; | 207 reg = ch->unit ? 0x57 : 0x53; |
| 217 val = pci_read_config(gparent, reg, 1); 218 pci_write_config(gparent, reg, val | 0x80, 1); | 208 val = pci_read_config(parent, reg, 1); 209 pci_write_config(parent, reg, val | 0x80, 1); |
| 219 } 220 else { 221 reg = 0x5b; | 210 } 211 else { 212 reg = 0x5b; |
| 222 val = pci_read_config(gparent, reg, 1); 223 pci_write_config(gparent, reg, val & 0xfe, 1); | 213 val = pci_read_config(parent, reg, 1); 214 pci_write_config(parent, reg, val & 0xfe, 1); |
| 224 } | 215 } |
| 225 res = pci_read_config(gparent, 0x5a, 1) & (ch->unit ? 0x1:0x2); 226 pci_write_config(gparent, reg, val, 1); | 216 res = pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x1:0x2); 217 pci_write_config(parent, reg, val, 1); |
| 227 228 if (mode > ATA_UDMA2 && res) { 229 ata_print_cable(dev, "controller"); 230 mode = ATA_UDMA2; 231 } 232 return mode; 233} 234 235ATA_DECLARE_DRIVER(ata_highpoint); | 218 219 if (mode > ATA_UDMA2 && res) { 220 ata_print_cable(dev, "controller"); 221 mode = ATA_UDMA2; 222 } 223 return mode; 224} 225 226ATA_DECLARE_DRIVER(ata_highpoint); |