| ata-ati.c (197783) | ata-ati.c (200171) |
|---|---|
| 1/*- 2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 1998 - 2008 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-ati.c 197783 2009-10-05 16:26:54Z jkim $"); | 28__FBSDID("$FreeBSD: head/sys/dev/ata/chipsets/ata-ati.c 200171 2009-12-06 00:10:13Z mav $"); |
| 29 30#include "opt_ata.h" 31#include <sys/param.h> 32#include <sys/module.h> 33#include <sys/systm.h> 34#include <sys/kernel.h> 35#include <sys/ata.h> 36#include <sys/bus.h> --- 11 unchanged lines hidden (view full) --- 48#include <dev/pci/pcivar.h> 49#include <dev/pci/pcireg.h> 50#include <dev/ata/ata-all.h> 51#include <dev/ata/ata-pci.h> 52#include <ata_if.h> 53 54/* local prototypes */ 55static int ata_ati_chipinit(device_t dev); | 29 30#include "opt_ata.h" 31#include <sys/param.h> 32#include <sys/module.h> 33#include <sys/systm.h> 34#include <sys/kernel.h> 35#include <sys/ata.h> 36#include <sys/bus.h> --- 11 unchanged lines hidden (view full) --- 48#include <dev/pci/pcivar.h> 49#include <dev/pci/pcireg.h> 50#include <dev/ata/ata-all.h> 51#include <dev/ata/ata-pci.h> 52#include <ata_if.h> 53 54/* local prototypes */ 55static int ata_ati_chipinit(device_t dev); |
| 56static void ata_ati_setmode(device_t dev, int mode); | 56static int ata_ati_setmode(device_t dev, int target, int mode); |
| 57 58/* misc defines */ 59#define ATI_PATA 0x01 60#define ATI_SATA 0x02 61#define ATI_AHCI 0x04 62#define SII_MEMIO 1 63#define SII_BUG 0x04 64 --- 90 unchanged lines hidden (view full) --- 155 } 156 break; 157 } 158 159 ctlr->setmode = ata_ati_setmode; 160 return 0; 161} 162 | 57 58/* misc defines */ 59#define ATI_PATA 0x01 60#define ATI_SATA 0x02 61#define ATI_AHCI 0x04 62#define SII_MEMIO 1 63#define SII_BUG 0x04 64 --- 90 unchanged lines hidden (view full) --- 155 } 156 break; 157 } 158 159 ctlr->setmode = ata_ati_setmode; 160 return 0; 161} 162 |
| 163static void 164ata_ati_setmode(device_t dev, int mode) | 163static int 164ata_ati_setmode(device_t dev, int target, int mode) |
| 165{ | 165{ |
| 166 device_t gparent = GRANDPARENT(dev); 167 struct ata_pci_controller *ctlr = device_get_softc(gparent); 168 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 169 struct ata_device *atadev = device_get_softc(dev); 170 int devno = (ch->unit << 1) + atadev->unit; 171 int offset = (devno ^ 0x01) << 3; 172 int error; 173 u_int8_t piotimings[] = { 0x5d, 0x47, 0x34, 0x22, 0x20, 0x34, 0x22, 0x20, 174 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }; 175 u_int8_t dmatimings[] = { 0x77, 0x21, 0x20 }; | 166 device_t parent = device_get_parent(dev); 167 struct ata_pci_controller *ctlr = device_get_softc(parent); 168 struct ata_channel *ch = device_get_softc(dev); 169 int devno = (ch->unit << 1) + target; 170 int offset = (devno ^ 0x01) << 3; 171 int piomode; 172 u_int8_t piotimings[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; 173 u_int8_t dmatimings[] = { 0x77, 0x21, 0x20 }; |
| 176 | 174 |
| 177 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); 178 179 mode = ata_check_80pin(dev, mode); 180 181 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); 182 183 if (bootverbose) 184 device_printf(dev, "%ssetting %s on %s chip\n", 185 (error) ? "FAILURE " : "", 186 ata_mode2str(mode), ctlr->chip->text); 187 if (!error) { | 175 mode = min(mode, ctlr->chip->max_dma); |
| 188 if (mode >= ATA_UDMA0) { | 176 if (mode >= ATA_UDMA0) { |
| 189 pci_write_config(gparent, 0x56, 190 (pci_read_config(gparent, 0x56, 2) & | 177 /* Set UDMA mode, enable UDMA, set WDMA2/PIO4 */ 178 pci_write_config(parent, 0x56, 179 (pci_read_config(parent, 0x56, 2) & |
| 191 ~(0xf << (devno << 2))) | 192 ((mode & ATA_MODE_MASK) << (devno << 2)), 2); | 180 ~(0xf << (devno << 2))) | 181 ((mode & ATA_MODE_MASK) << (devno << 2)), 2); |
| 193 pci_write_config(gparent, 0x54, 194 pci_read_config(gparent, 0x54, 1) | | 182 pci_write_config(parent, 0x54, 183 pci_read_config(parent, 0x54, 1) | |
| 195 (0x01 << devno), 1); | 184 (0x01 << devno), 1); |
| 196 pci_write_config(gparent, 0x44, 197 (pci_read_config(gparent, 0x44, 4) & | 185 pci_write_config(parent, 0x44, 186 (pci_read_config(parent, 0x44, 4) & |
| 198 ~(0xff << offset)) | 199 (dmatimings[2] << offset), 4); | 187 ~(0xff << offset)) | 188 (dmatimings[2] << offset), 4); |
| 200 } 201 else if (mode >= ATA_WDMA0) { 202 pci_write_config(gparent, 0x54, 203 pci_read_config(gparent, 0x54, 1) & | 189 piomode = ATA_PIO4; 190 } else if (mode >= ATA_WDMA0) { 191 /* Disable UDMA, set WDMA mode and timings, calculate PIO. */ 192 pci_write_config(parent, 0x54, 193 pci_read_config(parent, 0x54, 1) & |
| 204 ~(0x01 << devno), 1); | 194 ~(0x01 << devno), 1); |
| 205 pci_write_config(gparent, 0x44, 206 (pci_read_config(gparent, 0x44, 4) & | 195 pci_write_config(parent, 0x44, 196 (pci_read_config(parent, 0x44, 4) & |
| 207 ~(0xff << offset)) | 208 (dmatimings[mode & ATA_MODE_MASK] << offset), 4); | 197 ~(0xff << offset)) | 198 (dmatimings[mode & ATA_MODE_MASK] << offset), 4); |
| 209 } 210 else 211 pci_write_config(gparent, 0x54, 212 pci_read_config(gparent, 0x54, 1) & | 199 piomode = (mode == ATA_WDMA0) ? ATA_PIO0 : 200 (mode == ATA_WDMA1) ? ATA_PIO3 : ATA_PIO4; 201 } else { 202 /* Disable UDMA, set requested PIO. */ 203 pci_write_config(parent, 0x54, 204 pci_read_config(parent, 0x54, 1) & |
| 213 ~(0x01 << devno), 1); | 205 ~(0x01 << devno), 1); |
| 214 215 pci_write_config(gparent, 0x4a, 216 (pci_read_config(gparent, 0x4a, 2) & | 206 piomode = mode; 207 } 208 /* Set PIO mode and timings, calculated above. */ 209 pci_write_config(parent, 0x4a, 210 (pci_read_config(parent, 0x4a, 2) & |
| 217 ~(0xf << (devno << 2))) | | 211 ~(0xf << (devno << 2))) | |
| 218 (((mode - ATA_PIO0) & ATA_MODE_MASK) << (devno<<2)),2); 219 pci_write_config(gparent, 0x40, 220 (pci_read_config(gparent, 0x40, 4) & | 212 ((piomode - ATA_PIO0) << (devno<<2)),2); 213 pci_write_config(parent, 0x40, 214 (pci_read_config(parent, 0x40, 4) & |
| 221 ~(0xff << offset)) | | 215 ~(0xff << offset)) | |
| 222 (piotimings[ata_mode2idx(mode)] << offset), 4); 223 atadev->mode = mode; 224 } | 216 (piotimings[ata_mode2idx(piomode)] << offset), 4); 217 return (mode); |
| 225} 226 227ATA_DECLARE_DRIVER(ata_ati); 228MODULE_DEPEND(ata_ati, ata_ahci, 1, 1, 1); 229MODULE_DEPEND(ata_ati, ata_sii, 1, 1, 1); | 218} 219 220ATA_DECLARE_DRIVER(ata_ati); 221MODULE_DEPEND(ata_ati, ata_ahci, 1, 1, 1); 222MODULE_DEPEND(ata_ati, ata_sii, 1, 1, 1); |