1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
| 1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
|
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 53029 1999-11-08 21:36:00Z sos $
| 28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 53681 1999-11-24 21:40:05Z sos $
|
29 */
30
31#include "pci.h"
32#include "apm.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/buf.h>
36#include <sys/malloc.h>
37#include <sys/bus.h>
38#include <vm/vm.h>
39#include <vm/pmap.h>
40#if NPCI > 0
41#include <pci/pcivar.h>
42#endif
43#if NAPM > 0
44#include <machine/apm_bios.h>
45#endif
46#include <dev/ata/ata-all.h>
47
48/* prototypes */
49static void hpt366_timing(struct ata_softc *, int32_t, int32_t);
50
51/* misc defines */
52#define MIN(a,b) ((a)>(b)?(b):(a))
53#ifdef __alpha__
54#undef vtophys
55#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
56#endif
57
58#if NPCI > 0
59
60int32_t
61ata_dmainit(struct ata_softc *scp, int32_t device,
62 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
63{
64 int32_t type, devno, error;
65 void *dmatab;
66
67 if (!scp->bmaddr)
68 return -1;
69#ifdef ATA_DMADEBUG
70 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
71 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
72#endif
73
74 /* if simplex controller, only allow DMA on primary channel */
75 if (scp->unit == 1) {
76 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
77 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
78 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
79 printf("ata%d: simplex device, DMA on primary channel only\n",
80 scp->lun);
81 return -1;
82 }
83 }
84
85 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
86 return -1;
87
88 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
89 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {
90 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
91 free(dmatab, M_DEVBUF);
92 return -1;
93 }
94 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab;
95
96 switch (type = pci_get_devid(scp->dev)) {
97
98 case 0x71118086: /* Intel PIIX4 */
99 if (udmamode >= 2) {
100 int32_t mask48, new48;
101
102 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
103 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
104 if (bootverbose)
105 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n",
106 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
107 (error) ? "failed" : "success");
| 29 */
30
31#include "pci.h"
32#include "apm.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/buf.h>
36#include <sys/malloc.h>
37#include <sys/bus.h>
38#include <vm/vm.h>
39#include <vm/pmap.h>
40#if NPCI > 0
41#include <pci/pcivar.h>
42#endif
43#if NAPM > 0
44#include <machine/apm_bios.h>
45#endif
46#include <dev/ata/ata-all.h>
47
48/* prototypes */
49static void hpt366_timing(struct ata_softc *, int32_t, int32_t);
50
51/* misc defines */
52#define MIN(a,b) ((a)>(b)?(b):(a))
53#ifdef __alpha__
54#undef vtophys
55#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
56#endif
57
58#if NPCI > 0
59
60int32_t
61ata_dmainit(struct ata_softc *scp, int32_t device,
62 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
63{
64 int32_t type, devno, error;
65 void *dmatab;
66
67 if (!scp->bmaddr)
68 return -1;
69#ifdef ATA_DMADEBUG
70 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
71 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
72#endif
73
74 /* if simplex controller, only allow DMA on primary channel */
75 if (scp->unit == 1) {
76 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
77 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
78 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
79 printf("ata%d: simplex device, DMA on primary channel only\n",
80 scp->lun);
81 return -1;
82 }
83 }
84
85 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
86 return -1;
87
88 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
89 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {
90 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
91 free(dmatab, M_DEVBUF);
92 return -1;
93 }
94 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab;
95
96 switch (type = pci_get_devid(scp->dev)) {
97
98 case 0x71118086: /* Intel PIIX4 */
99 if (udmamode >= 2) {
100 int32_t mask48, new48;
101
102 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
103 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
104 if (bootverbose)
105 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n",
106 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
107 (error) ? "failed" : "success");
|
108 if (error)
109 break;
110 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
111 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
112 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
113 pci_write_config(scp->dev, 0x48,
114 (pci_read_config(scp->dev, 0x48, 4) &
115 ~mask48) | new48, 4);
116 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
117 return 0;
| 108 if (!error) {
109 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
110 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
111 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
112 pci_write_config(scp->dev, 0x48,
113 (pci_read_config(scp->dev, 0x48, 4) &
114 ~mask48) | new48, 4);
115 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
116 return 0;
117 }
|
118 }
119 /* FALLTHROUGH */
120
121 case 0x70108086: /* Intel PIIX3 */
122 if (wdmamode >= 2 && apiomode >= 4) {
123 int32_t mask40, new40, mask44, new44;
124
125 /* if SITRE not set doit for both channels */
126 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){
127 new40 = pci_read_config(scp->dev, 0x40, 4);
128 new44 = pci_read_config(scp->dev, 0x44, 4);
129 if (!(new40 & 0x00004000)) {
130 new44 &= ~0x0000000f;
131 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
132 }
133 if (!(new40 & 0x40000000)) {
134 new44 &= ~0x000000f0;
135 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
136 }
137 new40 |= 0x40004000;
138 pci_write_config(scp->dev, 0x40, new40, 4);
139 pci_write_config(scp->dev, 0x44, new44, 4);
140 }
141 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
142 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
143 if (bootverbose)
144 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n",
145 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
146 (error) ? "failed" : "success");
| 118 }
119 /* FALLTHROUGH */
120
121 case 0x70108086: /* Intel PIIX3 */
122 if (wdmamode >= 2 && apiomode >= 4) {
123 int32_t mask40, new40, mask44, new44;
124
125 /* if SITRE not set doit for both channels */
126 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){
127 new40 = pci_read_config(scp->dev, 0x40, 4);
128 new44 = pci_read_config(scp->dev, 0x44, 4);
129 if (!(new40 & 0x00004000)) {
130 new44 &= ~0x0000000f;
131 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
132 }
133 if (!(new40 & 0x40000000)) {
134 new44 &= ~0x000000f0;
135 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
136 }
137 new40 |= 0x40004000;
138 pci_write_config(scp->dev, 0x40, new40, 4);
139 pci_write_config(scp->dev, 0x44, new44, 4);
140 }
141 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
142 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
143 if (bootverbose)
144 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n",
145 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
146 (error) ? "failed" : "success");
|
147 if (error)
148 break;
149 if (device == ATA_MASTER) {
150 mask40 = 0x0000330f;
151 new40 = 0x00002307;
152 mask44 = 0;
153 new44 = 0;
154 } else {
155 mask40 = 0x000000f0;
156 new40 = 0x00000070;
157 mask44 = 0x0000000f;
158 new44 = 0x0000000b;
| 147 if (!error) {
148 if (device == ATA_MASTER) {
149 mask40 = 0x0000330f;
150 new40 = 0x00002307;
151 mask44 = 0;
152 new44 = 0;
153 }
154 else {
155 mask40 = 0x000000f0;
156 new40 = 0x00000070;
157 mask44 = 0x0000000f;
158 new44 = 0x0000000b;
159 }
160 if (scp->unit) {
161 mask40 <<= 16;
162 new40 <<= 16;
163 mask44 <<= 4;
164 new44 <<= 4;
165 }
166 pci_write_config(scp->dev, 0x40,
167 (pci_read_config(scp->dev, 0x40, 4) & ~mask40)|
168 new40, 4);
169 pci_write_config(scp->dev, 0x44,
170 (pci_read_config(scp->dev, 0x44, 4) & ~mask44)|
171 new44, 4);
172 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
173 return 0;
|
159 }
| 174 }
|
160 if (scp->unit) {
161 mask40 <<= 16;
162 new40 <<= 16;
163 mask44 <<= 4;
164 new44 <<= 4;
165 }
166 pci_write_config(scp->dev, 0x40,
167 (pci_read_config(scp->dev, 0x40, 4) & ~mask40) |
168 new40, 4);
169 pci_write_config(scp->dev, 0x44,
170 (pci_read_config(scp->dev, 0x44, 4) & ~mask44) |
171 new44, 4);
172 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
173 return 0;
| |
174 }
| 175 }
|
| 176 /* we could set PIO mode timings, but we assume the BIOS did that */
|
175 break;
176
177 case 0x12308086: /* Intel PIIX */
178 /* probably not worth the trouble */
179 break;
180
181 case 0x522910b9: /* AcerLabs Aladdin IV/V */
182 /* the Aladdin doesn't support ATAPI DMA on both master & slave */
183 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) {
184 printf("ata%d: Aladdin: two atapi devices on this channel, "
185 "DMA disabled\n", scp->lun);
186 break;
187 }
| 177 break;
178
179 case 0x12308086: /* Intel PIIX */
180 /* probably not worth the trouble */
181 break;
182
183 case 0x522910b9: /* AcerLabs Aladdin IV/V */
184 /* the Aladdin doesn't support ATAPI DMA on both master & slave */
185 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) {
186 printf("ata%d: Aladdin: two atapi devices on this channel, "
187 "DMA disabled\n", scp->lun);
188 break;
189 }
|
188 if (udmamode >=2) {
| 190 if (udmamode >= 2) {
|
189 int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
190
191 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
192 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
193 if (bootverbose)
194 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n",
195 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
196 (error) ? "failed" : "success");
| 191 int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
192
193 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
194 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
195 if (bootverbose)
196 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n",
197 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
198 (error) ? "failed" : "success");
|
197 if (error)
198 break;
199 word54 |= 0x5555;
200 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2)));
201 pci_write_config(scp->dev, 0x54, word54, 4);
202 pci_write_config(scp->dev, 0x53,
203 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
204 scp->flags |= ATA_ATAPI_DMA_RO;
205 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
206 return 0;
207
| 199 if (!error) {
200 word54 |= 0x5555;
201 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2)));
202 pci_write_config(scp->dev, 0x54, word54, 4);
203 pci_write_config(scp->dev, 0x53,
204 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
205 scp->flags |= ATA_ATAPI_DMA_RO;
206 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
207 return 0;
208 }
|
208 }
| 209 }
|
209 else if (wdmamode >= 2 && apiomode >= 4) {
| 210 if (wdmamode >= 2 && apiomode >= 4) {
|
210 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
211 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
212 if (bootverbose)
213 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n",
214 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
215 (error) ? "failed" : "success");
| 211 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
212 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
213 if (bootverbose)
214 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n",
215 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
216 (error) ? "failed" : "success");
|
216 if (error)
217 break;
218 pci_write_config(scp->dev, 0x53,
219 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
220 scp->flags |= ATA_ATAPI_DMA_RO;
221 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
222 return 0;
| 217 if (!error) {
218 pci_write_config(scp->dev, 0x53,
219 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1);
220 scp->flags |= ATA_ATAPI_DMA_RO;
221 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
222 return 0;
223 }
|
223 }
| 224 }
|
| 225 /* we could set PIO mode timings, but we assume the BIOS did that */
|
224 break;
225
| 226 break;
227
|
| 228 case 0x05711106: /* VIA Apollo 82c586 / 82c686 */
229 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
230 if (udmamode >= 2 && pci_read_config(scp->dev, 0x0d, 1) >= 0x20) {
231 int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1);
232
233 /* enable UDMA transfer modes setting by SETFEATURES cmd */
234 pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1);
235
236 if (udmamode >= 4) {
237 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
238 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
239 if (bootverbose)
240 printf("ata%d: %s: %s setting up UDMA4 mode on VIA chip\n",
241 scp->lun, (device == ATA_MASTER) ? "master":"slave",
242 (error) ? "failed" : "success");
243 if (!error) {
244 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
245 return 0;
246 }
247 }
248 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
249 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
250 if (bootverbose)
251 printf("ata%d: %s: %s setting up UDMA2 mode on VIA chip\n",
252 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
253 (error) ? "failed" : "success");
254 if (!error) {
255 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
256 return 0;
257 }
258 pci_write_config(scp->dev, 0x53 - devno, byte, 1);
259 }
260 if (wdmamode >= 2 && apiomode >= 4) {
261 int8_t byte;
262
263 /* set prefetch, postwrite */
264 byte = pci_read_config(scp->dev, 0x41, 1);
265 pci_write_config(scp->dev, 0x41, byte | 0xf0, 1);
266
267 /* set fifo configuration half'n'half */
268 byte = pci_read_config(scp->dev, 0x43, 1);
269 pci_write_config(scp->dev, 0x43, (byte & 0x90) | 0x2a, 1);
270
271 /* set status register read retry */
272 byte = pci_read_config(scp->dev, 0x44, 1);
273 pci_write_config(scp->dev, 0x44, byte | 0x08, 1);
274
275 /* set DMA read & end-of-sector fifo flush */
276 byte = pci_read_config(scp->dev, 0x46, 1);
277 pci_write_config(scp->dev, 0x46, (byte & 0x0c) | 0xf0, 1);
278
279 /* set WDMA2 mode timing */
280 pci_write_config(scp->dev, 0x4b - devno, 0x31 , 1);
281
282 /* set sector size */
283 pci_write_config(scp->dev, scp->unit ? 0x68 : 0x60, DEV_BSIZE, 2);
284
285 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
286 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
287 if (bootverbose)
288 printf("ata%d: %s: %s setting up WDMA2 mode on VIA chip\n",
289 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
290 (error) ? "failed" : "success");
291 if (!error) {
292 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
293 return 0;
294 }
295 }
296 /* we could set PIO mode timings, but we assume the BIOS did that */
297 break;
298
|
226 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */
227 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */
228 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
229 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
230 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
231 break;
232
233 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
234 if (udmamode >=4 && type == 0x4d38105a &&
235 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
236 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
237 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
238 if (bootverbose)
239 printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n",
240 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
241 (error) ? "failed" : "success");
| 299 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */
300 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */
301 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
302 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
303 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
304 break;
305
306 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
307 if (udmamode >=4 && type == 0x4d38105a &&
308 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) {
309 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
310 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
311 if (bootverbose)
312 printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n",
313 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
314 (error) ? "failed" : "success");
|
242 if (error)
243 break;
244 outb(scp->bmaddr + 0x11, inl(scp->bmaddr + 0x11) | scp->unit ? 8:2);
245 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
246 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
247 return 0;
| 315 if (!error) {
316 outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2);
317 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
318 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
319 return 0;
320 }
|
248 }
| 321 }
|
249 if (udmamode >=2) {
| 322 if (udmamode >= 2) {
|
250 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
251 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
252 if (bootverbose)
253 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n",
254 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
255 (error) ? "failed" : "success");
| 323 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
324 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
325 if (bootverbose)
326 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n",
327 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
328 (error) ? "failed" : "success");
|
256 if (error)
257 break;
258 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
259 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
260 return 0;
| 329 if (!error) {
330 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
331 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
332 return 0;
333 }
|
261 }
| 334 }
|
262 else if (wdmamode >= 2 && apiomode >= 4) {
| 335 if (wdmamode >= 2 && apiomode >= 4) {
|
263 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
264 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
265 if (bootverbose)
266 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n",
267 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
268 (error) ? "failed" : "success");
| 336 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
337 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
338 if (bootverbose)
339 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n",
340 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
341 (error) ? "failed" : "success");
|
269 if (error)
270 break;
271 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4);
272 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
273 return 0;
| 342 if (!error) {
343 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4);
344 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
345 return 0;
346 }
|
274 }
| 347 }
|
275 else {
276 if (bootverbose)
277 printf("ata%d: %s: setting PIO mode on Promise chip\n",
278 scp->lun, (device == ATA_MASTER) ? "master" : "slave");
279 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4);
280 }
| 348 if (bootverbose)
349 printf("ata%d: %s: setting PIO mode on Promise chip\n",
350 scp->lun, (device == ATA_MASTER) ? "master" : "slave");
351 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4);
|
281 break;
282
283 case 0x00041103: /* HighPoint HPT366 IDE controller */
| 352 break;
353
354 case 0x00041103: /* HighPoint HPT366 IDE controller */
|
284 /* punt on ATAPI devices for now */
| 355 /* no ATAPI devices for now */
|
285 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
286 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
287 break;
288
289 devno = (device == ATA_MASTER) ? 0 : 1;
290 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
291 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
292 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
293 if (bootverbose)
294 printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n",
295 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
296 (error) ? "failed" : "success");
| 356 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
357 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
358 break;
359
360 devno = (device == ATA_MASTER) ? 0 : 1;
361 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
362 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
363 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
364 if (bootverbose)
365 printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n",
366 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
367 (error) ? "failed" : "success");
|
297 if (error)
298 break;
299 hpt366_timing(scp, device, ATA_MODE_UDMA4);
300 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
301 return 0;
| 368 if (!error) {
369 hpt366_timing(scp, device, ATA_MODE_UDMA4);
370 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
371 return 0;
372 }
|
302 }
303 if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
304 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
305 ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY);
306 if (bootverbose)
307 printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n",
308 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
309 (error) ? "failed" : "success");
| 373 }
374 if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
375 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
376 ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY);
377 if (bootverbose)
378 printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n",
379 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
380 (error) ? "failed" : "success");
|
310 if (error)
311 break;
312 hpt366_timing(scp, device, ATA_MODE_UDMA3);
313 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3;
314 return 0;
| 381 if (!error) {
382 hpt366_timing(scp, device, ATA_MODE_UDMA3);
383 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3;
384 return 0;
385 }
|
315 }
| 386 }
|
316 if (udmamode >=2) {
| 387 if (udmamode >= 2) {
|
317 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
318 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
319 if (bootverbose)
320 printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n",
321 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
322 (error) ? "failed" : "success");
| 388 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
389 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
390 if (bootverbose)
391 printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n",
392 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
393 (error) ? "failed" : "success");
|
323 if (error)
324 break;
325 hpt366_timing(scp, device, ATA_MODE_UDMA2);
326 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
327 return 0;
| 394 if (!error) {
395 hpt366_timing(scp, device, ATA_MODE_UDMA2);
396 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
397 return 0;
398 }
|
328 }
| 399 }
|
329 else if (wdmamode >= 2 && apiomode >= 4) {
| 400 if (wdmamode >= 2 && apiomode >= 4) {
|
330 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
331 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
332 if (bootverbose)
333 printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n",
334 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
335 (error) ? "failed" : "success");
| 401 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
402 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
403 if (bootverbose)
404 printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n",
405 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
406 (error) ? "failed" : "success");
|
336 if (error)
337 break;
338 hpt366_timing(scp, device, ATA_MODE_WDMA2);
339 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
340 return 0;
| 407 if (!error) {
408 hpt366_timing(scp, device, ATA_MODE_WDMA2);
409 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
410 return 0;
411 }
|
341 }
| 412 }
|
342 else {
343 if (bootverbose)
344 printf("ata%d: %s: setting PIO mode on HPT366 chip\n",
345 scp->lun, (device == ATA_MASTER) ? "master" : "slave");
346 hpt366_timing(scp, device, ATA_MODE_PIO);
347 }
| 413 if (bootverbose)
414 printf("ata%d: %s: setting PIO mode on HPT366 chip\n",
415 scp->lun, (device == ATA_MASTER) ? "master" : "slave");
416 hpt366_timing(scp, device, ATA_MODE_PIO);
|
348 break;
349
350 default: /* unknown controller chip */
351 /* better not try generic DMA on ATAPI devices it almost never works */
352 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
353 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
354 break;
355
356 /* well, we have no support for this, but try anyways */
357 if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) &&
358 (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
359 ((device == ATA_MASTER) ?
360 ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) {
361 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
362 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
363 if (bootverbose)
364 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n",
365 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
366 (error) ? "failed" : "success");
| 417 break;
418
419 default: /* unknown controller chip */
420 /* better not try generic DMA on ATAPI devices it almost never works */
421 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
422 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
423 break;
424
425 /* well, we have no support for this, but try anyways */
426 if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) &&
427 (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
428 ((device == ATA_MASTER) ?
429 ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) {
430 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
431 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
432 if (bootverbose)
433 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n",
434 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
435 (error) ? "failed" : "success");
|
367 if (error)
368 break;
369 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
370 return 0;
| 436 if (!error) {
437 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
438 return 0;
439 }
|
371 }
372 }
373 free(dmatab, M_DEVBUF);
374 return -1;
375}
376
377int32_t
378ata_dmasetup(struct ata_softc *scp, int32_t device,
379 int8_t *data, int32_t count, int32_t flags)
380{
381 struct ata_dmaentry *dmatab;
382 u_int32_t dma_count, dma_base;
383 int32_t i = 0;
384
385#ifdef ATA_DMADEBUG
386 printf("ata%d: dmasetup\n", scp->lun);
387#endif
388 if (((uintptr_t)data & 1) || (count & 1))
389 return -1;
390
391 if (!count) {
392#ifdef ATA_DMADEBUG
393 printf("ata%d: zero length DMA transfer attempt on %s\n",
394 scp->lun, ((device == ATA_MASTER) ? "master" : "slave"));
395#endif
396 return -1;
397 }
398
399 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1];
400 dma_base = vtophys(data);
401 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK)));
402 data += dma_count;
403 count -= dma_count;
404
405 while (count) {
406 dmatab[i].base = dma_base;
407 dmatab[i].count = (dma_count & 0xffff);
408 i++;
409 if (i >= ATA_DMA_ENTRIES) {
410 printf("ata%d: too many segments in DMA table for %s\n",
411 scp->lun, (device ? "slave" : "master"));
412 return -1;
413 }
414 dma_base = vtophys(data);
415 dma_count = MIN(count, PAGE_SIZE);
416 data += MIN(count, PAGE_SIZE);
417 count -= MIN(count, PAGE_SIZE);
418 }
419#ifdef ATA_DMADEBUG
420 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count);
421#endif
422 dmatab[i].base = dma_base;
423 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
424
425 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
426#ifdef ATA_DMADEBUG
427 printf("dmatab=%08x %08x\n",
428 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
429#endif
430 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
431 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
432 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
433 return 0;
434}
435
436void
437ata_dmastart(struct ata_softc *scp)
438{
439#ifdef ATA_DMADEBUG
440 printf("ata%d: dmastart\n", scp->lun);
441#endif
442 scp->flags |= ATA_DMA_ACTIVE;
443 outb(scp->bmaddr + ATA_BMCMD_PORT,
444 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
445}
446
447int32_t
448ata_dmadone(struct ata_softc *scp)
449{
450#ifdef ATA_DMADEBUG
451 printf("ata%d: dmadone\n", scp->lun);
452#endif
453 outb(scp->bmaddr + ATA_BMCMD_PORT,
454 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
455 scp->flags &= ~ATA_DMA_ACTIVE;
456 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
457}
458
459int32_t
460ata_dmastatus(struct ata_softc *scp)
461{
462#ifdef ATA_DMADEBUG
463 printf("ata%d: dmastatus\n", scp->lun);
464#endif
465 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
466}
467
468static void
469hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode)
470{
471 u_int32_t timing;
472
473 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){
474 case 0x85: /* 25Mhz */
475 switch (mode) {
476 case ATA_MODE_PIO: timing = 0xc0ca8521; break;
477 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break;
478 case ATA_MODE_UDMA2:
479 case ATA_MODE_UDMA3: timing = 0x90cf8521; break;
480 case ATA_MODE_UDMA4: timing = 0x90c98521; break;
481 default: timing = 0x01208585;
482 }
483 break;
484 default:
485 case 0xa7: /* 33MHz */
486 switch (mode) {
487 case ATA_MODE_PIO: timing = 0xc0c8a731; break;
488 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break;
489 case ATA_MODE_UDMA2: timing = 0x90caa731; break;
490 case ATA_MODE_UDMA3: timing = 0x90cfa731; break;
491 case ATA_MODE_UDMA4: timing = 0x90c9a731; break;
492 default: timing = 0x0120a7a7;
493 }
494 break;
495 case 0xd9: /* 40Mhz */
496 switch (mode) {
497 case ATA_MODE_PIO: timing = 0xc008d963; break;
498 case ATA_MODE_WDMA2: timing = 0xa008d943; break;
499 case ATA_MODE_UDMA2: timing = 0x900bd943; break;
500 case ATA_MODE_UDMA3: timing = 0x900ad943; break;
501 case ATA_MODE_UDMA4: timing = 0x900fd943; break;
502 default: timing = 0x0120d9d9;
503 }
504 }
505 pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4);
506}
507
508#else /* NPCI > 0 */
509
510int32_t
511ata_dmainit(struct ata_softc *scp, int32_t device,
512 int32_t piomode, int32_t wdmamode, int32_t udmamode)
513{
514 return -1;
515}
516
517int32_t
518ata_dmasetup(struct ata_softc *scp, int32_t device,
519 int8_t *data, int32_t count, int32_t flags)
520{
521 return -1;
522}
523
524void
525ata_dmastart(struct ata_softc *scp)
526{
527}
528
529int32_t
530ata_dmadone(struct ata_softc *scp)
531{
532 return -1;
533}
534
535int32_t
536ata_dmastatus(struct ata_softc *scp)
537{
538 return -1;
539}
540
541#endif /* NPCI > 0 */
| 440 }
441 }
442 free(dmatab, M_DEVBUF);
443 return -1;
444}
445
446int32_t
447ata_dmasetup(struct ata_softc *scp, int32_t device,
448 int8_t *data, int32_t count, int32_t flags)
449{
450 struct ata_dmaentry *dmatab;
451 u_int32_t dma_count, dma_base;
452 int32_t i = 0;
453
454#ifdef ATA_DMADEBUG
455 printf("ata%d: dmasetup\n", scp->lun);
456#endif
457 if (((uintptr_t)data & 1) || (count & 1))
458 return -1;
459
460 if (!count) {
461#ifdef ATA_DMADEBUG
462 printf("ata%d: zero length DMA transfer attempt on %s\n",
463 scp->lun, ((device == ATA_MASTER) ? "master" : "slave"));
464#endif
465 return -1;
466 }
467
468 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1];
469 dma_base = vtophys(data);
470 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK)));
471 data += dma_count;
472 count -= dma_count;
473
474 while (count) {
475 dmatab[i].base = dma_base;
476 dmatab[i].count = (dma_count & 0xffff);
477 i++;
478 if (i >= ATA_DMA_ENTRIES) {
479 printf("ata%d: too many segments in DMA table for %s\n",
480 scp->lun, (device ? "slave" : "master"));
481 return -1;
482 }
483 dma_base = vtophys(data);
484 dma_count = MIN(count, PAGE_SIZE);
485 data += MIN(count, PAGE_SIZE);
486 count -= MIN(count, PAGE_SIZE);
487 }
488#ifdef ATA_DMADEBUG
489 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count);
490#endif
491 dmatab[i].base = dma_base;
492 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
493
494 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
495#ifdef ATA_DMADEBUG
496 printf("dmatab=%08x %08x\n",
497 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
498#endif
499 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
500 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
501 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
502 return 0;
503}
504
505void
506ata_dmastart(struct ata_softc *scp)
507{
508#ifdef ATA_DMADEBUG
509 printf("ata%d: dmastart\n", scp->lun);
510#endif
511 scp->flags |= ATA_DMA_ACTIVE;
512 outb(scp->bmaddr + ATA_BMCMD_PORT,
513 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
514}
515
516int32_t
517ata_dmadone(struct ata_softc *scp)
518{
519#ifdef ATA_DMADEBUG
520 printf("ata%d: dmadone\n", scp->lun);
521#endif
522 outb(scp->bmaddr + ATA_BMCMD_PORT,
523 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
524 scp->flags &= ~ATA_DMA_ACTIVE;
525 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
526}
527
528int32_t
529ata_dmastatus(struct ata_softc *scp)
530{
531#ifdef ATA_DMADEBUG
532 printf("ata%d: dmastatus\n", scp->lun);
533#endif
534 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
535}
536
537static void
538hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode)
539{
540 u_int32_t timing;
541
542 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){
543 case 0x85: /* 25Mhz */
544 switch (mode) {
545 case ATA_MODE_PIO: timing = 0xc0ca8521; break;
546 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break;
547 case ATA_MODE_UDMA2:
548 case ATA_MODE_UDMA3: timing = 0x90cf8521; break;
549 case ATA_MODE_UDMA4: timing = 0x90c98521; break;
550 default: timing = 0x01208585;
551 }
552 break;
553 default:
554 case 0xa7: /* 33MHz */
555 switch (mode) {
556 case ATA_MODE_PIO: timing = 0xc0c8a731; break;
557 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break;
558 case ATA_MODE_UDMA2: timing = 0x90caa731; break;
559 case ATA_MODE_UDMA3: timing = 0x90cfa731; break;
560 case ATA_MODE_UDMA4: timing = 0x90c9a731; break;
561 default: timing = 0x0120a7a7;
562 }
563 break;
564 case 0xd9: /* 40Mhz */
565 switch (mode) {
566 case ATA_MODE_PIO: timing = 0xc008d963; break;
567 case ATA_MODE_WDMA2: timing = 0xa008d943; break;
568 case ATA_MODE_UDMA2: timing = 0x900bd943; break;
569 case ATA_MODE_UDMA3: timing = 0x900ad943; break;
570 case ATA_MODE_UDMA4: timing = 0x900fd943; break;
571 default: timing = 0x0120d9d9;
572 }
573 }
574 pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4);
575}
576
577#else /* NPCI > 0 */
578
579int32_t
580ata_dmainit(struct ata_softc *scp, int32_t device,
581 int32_t piomode, int32_t wdmamode, int32_t udmamode)
582{
583 return -1;
584}
585
586int32_t
587ata_dmasetup(struct ata_softc *scp, int32_t device,
588 int8_t *data, int32_t count, int32_t flags)
589{
590 return -1;
591}
592
593void
594ata_dmastart(struct ata_softc *scp)
595{
596}
597
598int32_t
599ata_dmadone(struct ata_softc *scp)
600{
601 return -1;
602}
603
604int32_t
605ata_dmastatus(struct ata_softc *scp)
606{
607 return -1;
608}
609
610#endif /* NPCI > 0 */
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