1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
| 1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
|
28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 51548 1999-09-22 12:04:51Z sos $
| 28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 52067 1999-10-09 19:57:13Z sos $
|
29 */
30
31#include "pci.h"
32#include "apm.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/buf.h>
37#include <sys/malloc.h>
38#include <sys/bus.h>
39#include <vm/vm.h>
40#include <vm/pmap.h>
41#if NPCI > 0
42#include <pci/pcivar.h>
43#include <pci/pcireg.h>
44#endif
45#if NAPM > 0
46#include <machine/apm_bios.h>
47#endif
48#include <dev/ata/ata-all.h>
49
| 29 */
30
31#include "pci.h"
32#include "apm.h"
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/buf.h>
37#include <sys/malloc.h>
38#include <sys/bus.h>
39#include <vm/vm.h>
40#include <vm/pmap.h>
41#if NPCI > 0
42#include <pci/pcivar.h>
43#include <pci/pcireg.h>
44#endif
45#if NAPM > 0
46#include <machine/apm_bios.h>
47#endif
48#include <dev/ata/ata-all.h>
49
|
| 50/* prototypes */
51static void hpt366_timing(struct ata_softc *, int32_t, int32_t);
52
53/* misc defines */
54#define MIN(a,b) ((a)>(b)?(b):(a))
|
50#ifdef __alpha__
51#undef vtophys
52#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
53#endif
54
| 55#ifdef __alpha__
56#undef vtophys
57#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
58#endif
59
|
55/* misc defines */
56#define MIN(a,b) ((a)>(b)?(b):(a))
57
| |
58#if NPCI > 0
59
60int32_t
61ata_dmainit(struct ata_softc *scp, int32_t device,
62 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
63{
64 int32_t type, devno, error;
65 void *dmatab;
66
67 if (!scp->bmaddr)
68 return -1;
69#ifdef ATA_DMADEBUG
70 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
71 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
72#endif
73
| 60#if NPCI > 0
61
62int32_t
63ata_dmainit(struct ata_softc *scp, int32_t device,
64 int32_t apiomode, int32_t wdmamode, int32_t udmamode)
65{
66 int32_t type, devno, error;
67 void *dmatab;
68
69 if (!scp->bmaddr)
70 return -1;
71#ifdef ATA_DMADEBUG
72 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
73 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
74#endif
75
|
| 76 /* if simplex controller, only allow DMA on primary channel */
77 if (scp->unit == 1) {
78 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) &
79 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE));
80 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) {
81 printf("ata%d: simplex device, DMA on primary channel only\n",
82 scp->lun);
83 return -1;
84 }
85 }
86
|
74 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
75 return -1;
76
77 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
78 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {
79 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
80 free(dmatab, M_DEVBUF);
81 return -1;
82 }
83 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab;
84
85 switch (type = pci_get_devid(scp->dev)) {
86
87 case 0x71118086: /* Intel PIIX4 */
88 if (udmamode >= 2) {
89 int32_t mask48, new48;
90
91 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
92 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
93 if (bootverbose)
94 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n",
95 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
96 (error) ? "failed" : "success");
97 if (error)
98 break;
99 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
100 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
101 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
102 pci_write_config(scp->dev, 0x48,
103 (pci_read_config(scp->dev, 0x48, 4) &
| 87 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
88 return -1;
89
90 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^
91 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) {
92 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
93 free(dmatab, M_DEVBUF);
94 return -1;
95 }
96 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab;
97
98 switch (type = pci_get_devid(scp->dev)) {
99
100 case 0x71118086: /* Intel PIIX4 */
101 if (udmamode >= 2) {
102 int32_t mask48, new48;
103
104 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
105 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
106 if (bootverbose)
107 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n",
108 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
109 (error) ? "failed" : "success");
110 if (error)
111 break;
112 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
113 mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
114 new48 = (1 << devno) + (2 << (16 + (devno << 2)));
115 pci_write_config(scp->dev, 0x48,
116 (pci_read_config(scp->dev, 0x48, 4) &
|
104 ~mask48) | new48, 4);
105 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA33;
| 117 ~mask48) | new48, 4);
118 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
106 return 0;
107 }
108 /* FALLTHROUGH */
109
110 case 0x70108086: /* Intel PIIX3 */
111 if (wdmamode >= 2 && apiomode >= 4) {
112 int32_t mask40, new40, mask44, new44;
113
114 /* if SITRE not set doit for both channels */
115 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){
116 new40 = pci_read_config(scp->dev, 0x40, 4);
117 new44 = pci_read_config(scp->dev, 0x44, 4);
118 if (!(new40 & 0x00004000)) {
119 new44 &= ~0x0000000f;
120 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
121 }
122 if (!(new40 & 0x40000000)) {
123 new44 &= ~0x000000f0;
124 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
125 }
126 new40 |= 0x40004000;
127 pci_write_config(scp->dev, 0x40, new40, 4);
128 pci_write_config(scp->dev, 0x44, new44, 4);
129 }
130 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
131 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
132 if (bootverbose)
133 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n",
134 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
135 (error) ? "failed" : "success");
136 if (error)
137 break;
138 if (device == ATA_MASTER) {
139 mask40 = 0x0000330f;
140 new40 = 0x00002307;
141 mask44 = 0;
142 new44 = 0;
143 } else {
144 mask40 = 0x000000f0;
145 new40 = 0x00000070;
146 mask44 = 0x0000000f;
147 new44 = 0x0000000b;
148 }
149 if (scp->unit) {
150 mask40 <<= 16;
151 new40 <<= 16;
152 mask44 <<= 4;
153 new44 <<= 4;
154 }
155 pci_write_config(scp->dev, 0x40,
156 (pci_read_config(scp->dev, 0x40, 4) & ~mask40) |
157 new40, 4);
158 pci_write_config(scp->dev, 0x44,
159 (pci_read_config(scp->dev, 0x44, 4) & ~mask44) |
160 new44, 4);
| 119 return 0;
120 }
121 /* FALLTHROUGH */
122
123 case 0x70108086: /* Intel PIIX3 */
124 if (wdmamode >= 2 && apiomode >= 4) {
125 int32_t mask40, new40, mask44, new44;
126
127 /* if SITRE not set doit for both channels */
128 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){
129 new40 = pci_read_config(scp->dev, 0x40, 4);
130 new44 = pci_read_config(scp->dev, 0x44, 4);
131 if (!(new40 & 0x00004000)) {
132 new44 &= ~0x0000000f;
133 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
134 }
135 if (!(new40 & 0x40000000)) {
136 new44 &= ~0x000000f0;
137 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
138 }
139 new40 |= 0x40004000;
140 pci_write_config(scp->dev, 0x40, new40, 4);
141 pci_write_config(scp->dev, 0x44, new44, 4);
142 }
143 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
144 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
145 if (bootverbose)
146 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n",
147 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
148 (error) ? "failed" : "success");
149 if (error)
150 break;
151 if (device == ATA_MASTER) {
152 mask40 = 0x0000330f;
153 new40 = 0x00002307;
154 mask44 = 0;
155 new44 = 0;
156 } else {
157 mask40 = 0x000000f0;
158 new40 = 0x00000070;
159 mask44 = 0x0000000f;
160 new44 = 0x0000000b;
161 }
162 if (scp->unit) {
163 mask40 <<= 16;
164 new40 <<= 16;
165 mask44 <<= 4;
166 new44 <<= 4;
167 }
168 pci_write_config(scp->dev, 0x40,
169 (pci_read_config(scp->dev, 0x40, 4) & ~mask40) |
170 new40, 4);
171 pci_write_config(scp->dev, 0x44,
172 (pci_read_config(scp->dev, 0x44, 4) & ~mask44) |
173 new44, 4);
|
161 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_DMA;
| 174 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
162 return 0;
163 }
164 break;
165
166 case 0x12308086: /* Intel PIIX */
167 /* probably not worth the trouble */
168 break;
169
| 175 return 0;
176 }
177 break;
178
179 case 0x12308086: /* Intel PIIX */
180 /* probably not worth the trouble */
181 break;
182
|
170 case 0x4d33105a: /* Promise Ultra/33 / FastTrack controllers */
171 case 0x4d38105a: /* Promise Ultra/66 controllers */
172 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
| 183 case 0x522910b9: /* AcerLabs Aladdin IV/V */
184 /* the Aladdin has to be setup specially for ATAPI devices */
|
173 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
| 185 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
|
174 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
175 break;
| 186 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) {
187 int8_t word53 = pci_read_config(scp->dev, 0x53, 1);
|
176
| 188
|
177 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
178 if (udmamode >=4 && type == 0x4d38105a) {
| 189 /* set atapi fifo, this should always work */
190 pci_write_config(scp->dev, 0x53, (word53 & ~0x01) | 0x02, 1);
191
192 /* if both master & slave are atapi devices dont allow DMA */
193 if (scp->devices & ATA_ATAPI_MASTER &&
194 scp->devices & ATA_ATAPI_SLAVE) {
195 printf("ata%d: Aladdin: two atapi devices on this channel, "
196 "DMA disabled\n", scp->lun);
197 break;
198 }
199 /* if needed set atapi fifo & dma */
200 if ((udmamode >=2) || (wdmamode >= 2 && apiomode >= 4)) {
201 pci_write_config(scp->dev, 0x53, word53 | 0x03, 1);
202 scp->flags |= ATA_ATAPI_DMA_RO;
203 if (device == ATA_MASTER)
204 outb(scp->bmaddr + ATA_BMSTAT_PORT,
205 inb(scp->bmaddr + ATA_BMSTAT_PORT) |
206 ATA_BMSTAT_DMA_MASTER);
207 else
208 outb(scp->bmaddr + ATA_BMSTAT_PORT,
209 inb(scp->bmaddr + ATA_BMSTAT_PORT) |
210 ATA_BMSTAT_DMA_SLAVE);
211 }
212 }
213 if (udmamode >=2) {
214 int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
215
|
179 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
| 216 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
180 ATA_UDMA4, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
| 217 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
|
181 if (bootverbose)
| 218 if (bootverbose)
|
182 printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n",
| 219 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n",
|
183 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
184 (error) ? "failed" : "success");
185 if (error)
186 break;
| 220 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
221 (error) ? "failed" : "success");
222 if (error)
223 break;
|
187 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004117f3, 4);
188 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA66;
| 224 word54 |= 0x5555;
225 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2)));
226 pci_write_config(scp->dev, 0x54, word54, 4);
227 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
189 return 0;
| 228 return 0;
|
| 229
|
190 }
| 230 }
|
191
| 231 else if (wdmamode >= 2 && apiomode >= 4) {
232 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
233 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
234 if (bootverbose)
235 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n",
236 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
237 (error) ? "failed" : "success");
238 if (error)
239 break;
240 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
241 return 0;
242 }
243 break;
244
245 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */
246 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */
247 /* the Promise can only do DMA on ATA disks not on ATAPI devices */
248 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
249 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
250 break;
251
252 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1);
|
192 if (udmamode >=2) {
193 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
194 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
195 if (bootverbose)
196 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n",
197 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
198 (error) ? "failed" : "success");
199 if (error)
200 break;
201 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
| 253 if (udmamode >=2) {
254 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
255 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
256 if (bootverbose)
257 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n",
258 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
259 (error) ? "failed" : "success");
260 if (error)
261 break;
262 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4);
|
202 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA33;
| 263 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
203 return 0;
204 }
205 else if (wdmamode >= 2 && apiomode >= 4) {
206 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
207 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
208 if (bootverbose)
209 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n",
210 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
211 (error) ? "failed" : "success");
212 if (error)
213 break;
214 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4);
| 264 return 0;
265 }
266 else if (wdmamode >= 2 && apiomode >= 4) {
267 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
268 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
269 if (bootverbose)
270 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n",
271 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
272 (error) ? "failed" : "success");
273 if (error)
274 break;
275 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4);
|
215 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_DMA;
| 276 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
216 return 0;
217 }
218 else {
219 if (bootverbose)
220 printf("ata%d: %s: setting PIO mode on Promise chip\n",
221 scp->lun, (device == ATA_MASTER) ? "master" : "slave");
222 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4);
223 }
224 break;
225
| 277 return 0;
278 }
279 else {
280 if (bootverbose)
281 printf("ata%d: %s: setting PIO mode on Promise chip\n",
282 scp->lun, (device == ATA_MASTER) ? "master" : "slave");
283 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4);
284 }
285 break;
286
|
226 case 0x522910b9: /* AcerLabs Aladdin IV/V */
227 /* the Aladdin has to be setup specially for ATAPI devices */
| 287 case 0x00041103: /* HighPoint HPT366 IDE controller */
288 /* punt on ATAPI devices for now */
|
228 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
| 289 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
|
229 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) {
230 int8_t word53 = pci_read_config(scp->dev, 0x53, 1);
| 290 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
291 break;
|
231
| 292
|
232 /* if needed set atapi fifo & dma */
233 if ((udmamode >=2) || (wdmamode >= 2 && apiomode >= 4)) {
234 pci_write_config(scp->dev, 0x53, word53 | 0x03, 1);
235 scp->flags |= ATA_ATAPI_DMA_RO;
236 if (device == ATA_MASTER)
237 outb(scp->bmaddr + ATA_BMSTAT_PORT,
238 inb(scp->bmaddr + ATA_BMSTAT_PORT) |
239 ATA_BMSTAT_DMA_MASTER);
240 else
241 outb(scp->bmaddr + ATA_BMSTAT_PORT,
242 inb(scp->bmaddr + ATA_BMSTAT_PORT) |
243 ATA_BMSTAT_DMA_SLAVE);
244 }
245 else {
246 pci_write_config(scp->dev, 0x53, (word53 & ~0x01) | 0x02, 1);
247 }
| 293 devno = (device == ATA_MASTER) ? 0 : 1;
294 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) {
295 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
296 ATA_UDMA4, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
297 if (bootverbose)
298 printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n",
299 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
300 (error) ? "failed" : "success");
301 if (error)
302 break;
303 hpt366_timing(scp, device, ATA_MODE_UDMA4);
304 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4;
305 return 0;
|
248 }
| 306 }
|
249 if (udmamode >=2) {
250 int32_t word54 = pci_read_config(scp->dev, 0x54, 4);
251
| 307 else if (udmamode >=3) {
|
252 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
| 308 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
| 309 ATA_UDMA3, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
310 if (bootverbose)
311 printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n",
312 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
313 (error) ? "failed" : "success");
314 if (error)
315 break;
316 hpt366_timing(scp, device, ATA_MODE_UDMA3);
317 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3;
318 return 0;
319 }
320 else if (udmamode >=2) {
321 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
|
253 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
254 if (bootverbose)
| 322 ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
323 if (bootverbose)
|
255 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n",
| 324 printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n",
|
256 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
257 (error) ? "failed" : "success");
258 if (error)
259 break;
| 325 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
326 (error) ? "failed" : "success");
327 if (error)
328 break;
|
260 word54 |= 0x5555;
261 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2)));
262 pci_write_config(scp->dev, 0x54, word54, 4);
263 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA33;
| 329 hpt366_timing(scp, device, ATA_MODE_UDMA2);
330 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2;
|
264 return 0;
| 331 return 0;
|
265
| |
266 }
267 else if (wdmamode >= 2 && apiomode >= 4) {
268 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
269 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
270 if (bootverbose)
| 332 }
333 else if (wdmamode >= 2 && apiomode >= 4) {
334 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
335 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
336 if (bootverbose)
|
271 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n",
| 337 printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n",
|
272 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
273 (error) ? "failed" : "success");
274 if (error)
275 break;
| 338 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
339 (error) ? "failed" : "success");
340 if (error)
341 break;
|
276 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_DMA;
| 342 hpt366_timing(scp, device, ATA_MODE_WDMA2);
343 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
277 return 0;
278 }
| 344 return 0;
345 }
|
| 346 else {
347 if (bootverbose)
348 printf("ata%d: %s: setting PIO mode on HPT366 chip\n",
349 scp->lun, (device == ATA_MASTER) ? "master" : "slave");
350 hpt366_timing(scp, device, ATA_MODE_PIO);
351 }
|
279 break;
280
281 default: /* unknown controller chip */
282 /* better not try generic DMA on ATAPI devices it almost never works */
283 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
284 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
285 break;
286
287 /* well, we have no support for this, but try anyways */
288 if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) &&
289 (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
290 ((device == ATA_MASTER) ?
291 ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) {
292 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
293 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
294 if (bootverbose)
295 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n",
296 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
297 (error) ? "failed" : "success");
298 if (error)
299 break;
| 352 break;
353
354 default: /* unknown controller chip */
355 /* better not try generic DMA on ATAPI devices it almost never works */
356 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) ||
357 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE))
358 break;
359
360 /* well, we have no support for this, but try anyways */
361 if (((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) &&
362 (inb(scp->bmaddr + ATA_BMSTAT_PORT) &
363 ((device == ATA_MASTER) ?
364 ATA_BMSTAT_DMA_SLAVE : ATA_BMSTAT_DMA_MASTER))) {
365 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
366 ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_IGNORE_INTR);
367 if (bootverbose)
368 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n",
369 scp->lun, (device == ATA_MASTER) ? "master" : "slave",
370 (error) ? "failed" : "success");
371 if (error)
372 break;
|
300 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_DMA;
| 373 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2;
|
301 return 0;
302 }
303 }
304 free(dmatab, M_DEVBUF);
305 return -1;
306}
307
308int32_t
309ata_dmasetup(struct ata_softc *scp, int32_t device,
310 int8_t *data, int32_t count, int32_t flags)
311{
312 struct ata_dmaentry *dmatab;
313 u_int32_t dma_count, dma_base;
314 int32_t i = 0;
315
316#ifdef ATA_DMADEBUG
317 printf("ata%d: dmasetup\n", scp->lun);
318#endif
319 if (((uintptr_t)data & 1) || (count & 1))
320 return -1;
321
322 if (!count) {
323#ifdef ATA_DMADEBUG
324 printf("ata%d: zero length DMA transfer attempt on %s\n",
325 scp->lun, ((device == ATA_MASTER) ? "master" : "slave"));
326#endif
327 return -1;
328 }
329
330 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1];
331 dma_base = vtophys(data);
332 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK)));
333 data += dma_count;
334 count -= dma_count;
335
336 while (count) {
337 dmatab[i].base = dma_base;
338 dmatab[i].count = (dma_count & 0xffff);
339 i++;
340 if (i >= ATA_DMA_ENTRIES) {
341 printf("ata%d: too many segments in DMA table for %s\n",
342 scp->lun, (device ? "slave" : "master"));
343 return -1;
344 }
345 dma_base = vtophys(data);
346 dma_count = MIN(count, PAGE_SIZE);
347 data += MIN(count, PAGE_SIZE);
348 count -= MIN(count, PAGE_SIZE);
349 }
350#ifdef ATA_DMADEBUG
351 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count);
352#endif
353 dmatab[i].base = dma_base;
354 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
355
356 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
357#ifdef ATA_DMADEBUG
358 printf("dmatab=%08x %08x\n",
359 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
360#endif
361 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
362 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
363 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
364 return 0;
365}
366
367void
| 374 return 0;
375 }
376 }
377 free(dmatab, M_DEVBUF);
378 return -1;
379}
380
381int32_t
382ata_dmasetup(struct ata_softc *scp, int32_t device,
383 int8_t *data, int32_t count, int32_t flags)
384{
385 struct ata_dmaentry *dmatab;
386 u_int32_t dma_count, dma_base;
387 int32_t i = 0;
388
389#ifdef ATA_DMADEBUG
390 printf("ata%d: dmasetup\n", scp->lun);
391#endif
392 if (((uintptr_t)data & 1) || (count & 1))
393 return -1;
394
395 if (!count) {
396#ifdef ATA_DMADEBUG
397 printf("ata%d: zero length DMA transfer attempt on %s\n",
398 scp->lun, ((device == ATA_MASTER) ? "master" : "slave"));
399#endif
400 return -1;
401 }
402
403 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1];
404 dma_base = vtophys(data);
405 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK)));
406 data += dma_count;
407 count -= dma_count;
408
409 while (count) {
410 dmatab[i].base = dma_base;
411 dmatab[i].count = (dma_count & 0xffff);
412 i++;
413 if (i >= ATA_DMA_ENTRIES) {
414 printf("ata%d: too many segments in DMA table for %s\n",
415 scp->lun, (device ? "slave" : "master"));
416 return -1;
417 }
418 dma_base = vtophys(data);
419 dma_count = MIN(count, PAGE_SIZE);
420 data += MIN(count, PAGE_SIZE);
421 count -= MIN(count, PAGE_SIZE);
422 }
423#ifdef ATA_DMADEBUG
424 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count);
425#endif
426 dmatab[i].base = dma_base;
427 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
428
429 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
430#ifdef ATA_DMADEBUG
431 printf("dmatab=%08x %08x\n",
432 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
433#endif
434 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
435 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
436 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
437 return 0;
438}
439
440void
|
368ata_dmastart(struct ata_softc *scp, int32_t device)
| 441ata_dmastart(struct ata_softc *scp)
|
369{
370#ifdef ATA_DMADEBUG
371 printf("ata%d: dmastart\n", scp->lun);
372#endif
| 442{
443#ifdef ATA_DMADEBUG
444 printf("ata%d: dmastart\n", scp->lun);
445#endif
|
| 446 scp->flags |= ATA_DMA_ACTIVE;
|
373 outb(scp->bmaddr + ATA_BMCMD_PORT,
374 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
375}
376
377int32_t
| 447 outb(scp->bmaddr + ATA_BMCMD_PORT,
448 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
449}
450
451int32_t
|
378ata_dmadone(struct ata_softc *scp, int32_t device)
| 452ata_dmadone(struct ata_softc *scp)
|
379{
380#ifdef ATA_DMADEBUG
381 printf("ata%d: dmadone\n", scp->lun);
382#endif
383 outb(scp->bmaddr + ATA_BMCMD_PORT,
384 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
| 453{
454#ifdef ATA_DMADEBUG
455 printf("ata%d: dmadone\n", scp->lun);
456#endif
457 outb(scp->bmaddr + ATA_BMCMD_PORT,
458 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
|
| 459 scp->flags &= ~ATA_DMA_ACTIVE;
|
385 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
386}
387
388int32_t
| 460 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
461}
462
463int32_t
|
389ata_dmastatus(struct ata_softc *scp, int32_t device)
| 464ata_dmastatus(struct ata_softc *scp)
|
390{
391#ifdef ATA_DMADEBUG
392 printf("ata%d: dmastatus\n", scp->lun);
393#endif
394 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
395}
396
| 465{
466#ifdef ATA_DMADEBUG
467 printf("ata%d: dmastatus\n", scp->lun);
468#endif
469 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
470}
471
|
| 472static void
473hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode)
474{
475 u_int32_t timing;
476
477 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){
478 case 0x85: /* 25Mhz */
479 switch (mode) {
480 case ATA_MODE_PIO: timing = 0xc0ca8521; break;
481 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break;
482 case ATA_MODE_UDMA2:
483 case ATA_MODE_UDMA3: timing = 0x90cf8521; break;
484 case ATA_MODE_UDMA4: timing = 0x90c98521; break;
485 default: timing = 0x01208585;
486 }
487 break;
488 default:
489 case 0xa7: /* 33MHz */
490 switch (mode) {
491 case ATA_MODE_PIO: timing = 0xc0c8a731; break;
492 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break;
493 case ATA_MODE_UDMA2: timing = 0x90caa731; break;
494 case ATA_MODE_UDMA3: timing = 0x90cfa731; break;
495 case ATA_MODE_UDMA4: timing = 0x90c9a731; break;
496 default: timing = 0x0120a7a7;
497 }
498 break;
499 case 0xd9: /* 40Mhz */
500 switch (mode) {
501 case ATA_MODE_PIO: timing = 0xc008d963; break;
502 case ATA_MODE_WDMA2: timing = 0xa008d943; break;
503 case ATA_MODE_UDMA2: timing = 0x900bd943; break;
504 case ATA_MODE_UDMA3: timing = 0x900ad943; break;
505 case ATA_MODE_UDMA4: timing = 0x900fd943; break;
506 default: timing = 0x0120d9d9;
507 }
508 }
509 pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4);
510}
511
|
397#else /* NPCI > 0 */
398
399int32_t
400ata_dmainit(struct ata_softc *scp, int32_t device,
401 int32_t piomode, int32_t wdmamode, int32_t udmamode)
402{
403 return -1;
404}
405
406int32_t
407ata_dmasetup(struct ata_softc *scp, int32_t device,
408 int8_t *data, int32_t count, int32_t flags)
409{
410 return -1;
411}
412
413void
| 512#else /* NPCI > 0 */
513
514int32_t
515ata_dmainit(struct ata_softc *scp, int32_t device,
516 int32_t piomode, int32_t wdmamode, int32_t udmamode)
517{
518 return -1;
519}
520
521int32_t
522ata_dmasetup(struct ata_softc *scp, int32_t device,
523 int8_t *data, int32_t count, int32_t flags)
524{
525 return -1;
526}
527
528void
|
414ata_dmastart(struct ata_softc *scp, int32_t device)
| 529ata_dmastart(struct ata_softc *scp)
|
415{
416}
417
418int32_t
| 530{
531}
532
533int32_t
|
419ata_dmadone(struct ata_softc *scp, int32_t device)
| 534ata_dmadone(struct ata_softc *scp)
|
420{
421 return -1;
422}
423
424int32_t
| 535{
536 return -1;
537}
538
539int32_t
|
425ata_dmastatus(struct ata_softc *scp, int32_t device)
| 540ata_dmastatus(struct ata_softc *scp)
|
426{
427 return -1;
428}
429
430#endif /* NPCI > 0 */
| 541{
542 return -1;
543}
544
545#endif /* NPCI > 0 */
|