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1/*-
2 * Copyright (c) 1998,1999 S�ren Schmidt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: head/sys/dev/ata/ata-all.c 50842 1999-09-03 10:57:17Z phk $
29 */
30
31#include "ata.h"
32#if NATA > 0
33#include "isa.h"
34#include "pci.h"
35#include "atadisk.h"
36#include "opt_global.h"
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/kernel.h>
40#include <sys/interrupt.h>
41#include <sys/conf.h>
42#include <sys/module.h>
43#include <sys/bus.h>
44#include <sys/buf.h>
45#include <sys/malloc.h>
46#include <sys/devicestat.h>
47#include <vm/vm.h>
48#include <vm/pmap.h>
49#include <machine/resource.h>
50#include <machine/bus.h>
51#include <sys/rman.h>
52#include <machine/clock.h>
53#ifdef __i386__
54#include <machine/smp.h>
55#include <i386/isa/intr_machdep.h>
56#endif
57#if NPCI > 0
58#include <pci/pcivar.h>
59#include <pci/pcireg.h>
60#endif
61#include <isa/isavar.h>
62#include <isa/isareg.h>
63#include <dev/ata/ata-all.h>
64#include <dev/ata/atapi-all.h>
65
66/* misc defines */
67#define UNIT(dev) (dev>>3 & 0x1f) /* assume 8 minor # per unit */
68#define MIN(a,b) ((a)>(b)?(b):(a))
69#if SMP == 0
70#define isa_apic_irq(x) x
71#endif
72
73/* prototypes */
74#if NPCI > 0
75static void promise_intr(void *);
76#endif
77static int32_t ata_probe(int32_t, int32_t, int32_t, device_t, int32_t *);
78static void ataintr(void *);

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124
125 bus_release_resource(dev, SYS_RES_IOPORT, 0, port);
126
127 if (res) {
128 isa_set_portsize(dev, res);
129 *(int *)device_get_softc(dev) = lun;
130 return 0;
131 }
132
133 return ENXIO;
134}
135
136static int
137ata_isaattach(device_t dev)
138{
139 struct resource *port;
140 struct resource *irq;

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166
167static driver_t ata_isa_driver = {
168 "ata",
169 ata_isa_methods,
170 sizeof(int),
171};
172
173DRIVER_MODULE(ata, isa, ata_isa_driver, ata_devclass, 0, 0);
174
175#endif
176
177#if NPCI > 0
178
179static const char *
180ata_pcimatch(device_t dev)
181{
182 u_int32_t data;
183
184 data = pci_read_config(dev, PCI_CLASS_REG, 4);
185 if (pci_get_class(dev) == PCIC_STORAGE &&
186 (pci_get_subclass(dev) == PCIS_STORAGE_IDE ||

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194 case 0x71118086:
195 return "Intel PIIX4 IDE controller";
196 case 0x4d33105a:
197 return "Promise Ultra/33 IDE controller";
198 case 0x4d38105a:
199 return "Promise Ultra/66 IDE controller";
200 case 0x522910b9:
201 return "AcerLabs Aladdin IDE controller";
202#if 0
203 case 0x05711106:
204 return "VIA Apollo IDE controller";
205 case 0x06401095:
206 return "CMD 640 IDE controller";
207 case 0x06461095:
208 return "CMD 646 IDE controller";
209 case 0xc6931080:
210 return "Cypress 82C693 IDE controller";
211 case 0x01021078:
212 return "Cyrix 5530 IDE controller";
213#endif
214 default:
215 return "Unknown PCI IDE controller (using generic mode)";
216 }
217 }
218 return NULL;
219}
220
221static int
222ata_pciprobe(device_t dev)
223{

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255
256 /* if this is a Promise controller handle it specially */
257 if (type == 0x4d33105a || type == 0x4d38105a) {
258 iobase_1 = pci_read_config(dev, 0x10, 4) & 0xfffc;
259 altiobase_1 = pci_read_config(dev, 0x14, 4) & 0xfffc;
260 iobase_2 = pci_read_config(dev, 0x18, 4) & 0xfffc;
261 altiobase_2 = pci_read_config(dev, 0x1c, 4) & 0xfffc;
262 irq1 = irq2 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
263 bmaddr_1 = pci_read_config(dev, 0x20, 4) & 0xfffc;
264 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
265 outb(bmaddr_1 + 0x1f, inb(bmaddr_1 + 0x1f) | 0x01);
266 printf("ata-pci%d: Busmastering DMA supported\n", unit);
267 }
268 /* everybody else seems to do it this way */
269 else {
270 if ((unit == 0) &&
271 (pci_get_progif(dev) & PCIP_STORAGE_IDE_MODEPRIM) == 0) {

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285 irq2 = 15;
286 }
287 else {
288 iobase_2 = pci_read_config(dev, 0x18, 4) & 0xfffc;
289 altiobase_2 = pci_read_config(dev, 0x1c, 4) & 0xfffc;
290 irq2 = pci_read_config(dev, PCI_INTERRUPT_REG, 4) & 0xff;
291 }
292
293 /* is this controller busmaster capable ? */
294 if (pci_get_progif(dev) & PCIP_STORAGE_IDE_MASTERDEV) {
295 /* is busmastering support turned on ? */
296 if ((pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4) & 5) == 5) {
297 /* is there a valid port range to connect to ? */
298 if ((bmaddr_1 = pci_read_config(dev, 0x20, 4) & 0xfffc)) {
299 bmaddr_2 = bmaddr_1 + ATA_BM_OFFSET1;
300 printf("ata-pci%d: Busmastering DMA supported\n", unit);
301 }
302 else
303 printf("ata-pci%d: Busmastering DMA not configured\n",unit);
304 }
305 else
306 printf("ata-pci%d: Busmastering DMA not enabled\n", unit);
307 }
308 else
309 printf("ata-pci%d: Busmastering DMA not supported\n", unit);
310 }
311
312 /* now probe the addresse found for "real" ATA/ATAPI hardware */
313 lun = 0;
314 if (ata_probe(iobase_1, altiobase_1, bmaddr_1, dev, &lun)) {
315 scp = atadevices[lun];
316 if (iobase_1 == IO_WD1)
317#ifdef __i386__
318 inthand_add(device_get_nameunit(dev), irq1, ataintr, scp,
319 &bio_imask, INTR_EXCL);
320#endif
321#ifdef __alpha__
322 alpha_platform_setup_ide_intr(0, ataintr, scp);
323#endif
324 else {
325 struct resource *irq;
326 int rid = 0;
327 void *ih;
328
329 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
330 RF_SHAREABLE | RF_ACTIVE);
331 if (!irq)
332 printf("ata_pciattach: Unable to alloc interrupt\n");
333
334 if (type == 0x4d33105a || type == 0x4d38105a)
335 bus_setup_intr(dev, irq, INTR_TYPE_BIO, promise_intr, scp, &ih);
336 else
337 bus_setup_intr(dev, irq, INTR_TYPE_BIO, ataintr, scp, &ih);
338 }
339 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
340 lun, iobase_1, isa_apic_irq(irq1), unit);
341 }
342 lun = 1;
343 if (ata_probe(iobase_2, altiobase_2, bmaddr_2, dev, &lun)) {
344 scp = atadevices[lun];
345 if (iobase_2 == IO_WD2)
346#ifdef __i386__
347 inthand_add(device_get_nameunit(dev), irq2, ataintr, scp,
348 &bio_imask, INTR_EXCL);
349#endif
350#ifdef __alpha__
351 alpha_platform_setup_ide_intr(1, ataintr, scp);
352#endif
353 else {
354 struct resource *irq;
355 int rid = 0;
356 void *ih;
357
358 if (type != 0x4d33105a && type != 0x4d38105a) {
359 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
360 RF_SHAREABLE | RF_ACTIVE);
361 if (!irq)
362 printf("ata_pciattach: Unable to alloc interrupt\n");
363
364 bus_setup_intr(dev, irq, INTR_TYPE_BIO, ataintr, scp, &ih);
365 }
366 }
367 printf("ata%d at 0x%04x irq %d on ata-pci%d\n",
368 lun, iobase_2, isa_apic_irq(irq2), unit);
369 }

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400#endif
401
402static int32_t
403ata_probe(int32_t ioaddr, int32_t altioaddr, int32_t bmaddr,
404 device_t dev, int32_t *unit)
405{
406 struct ata_softc *scp = atadevices[atanlun];
407 int32_t mask = 0;
408 int32_t timeout;
409 int32_t lun = atanlun;
410 u_int8_t status0, status1;
411
412#ifdef ATA_STATIC_ID
413 atanlun++;
414#endif
415 if (lun > MAXATA) {
416 printf("ata: unit out of range(%d)\n", lun);

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428 bzero(scp, sizeof(struct ata_softc));
429
430 scp->unit = *unit;
431 scp->lun = lun;
432 scp->ioaddr = ioaddr;
433 scp->altioaddr = altioaddr;
434 scp->active = ATA_IDLE;
435
436#ifdef ATA_DEBUG
437 printf("ata%d: iobase=0x%04x altiobase=0x%04x\n",
438 scp->lun, scp->ioaddr, scp->altioaddr);
439#endif
440
441 /* do we have any signs of ATA/ATAPI HW being present ? */
442 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | ATA_MASTER);
443 DELAY(1);
444 status0 = inb(scp->ioaddr + ATA_STATUS);
445 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | ATA_SLAVE);
446 DELAY(1);
447 status1 = inb(scp->ioaddr + ATA_STATUS);
448 if ((status0 & 0xf8) != 0xf8)
449 mask |= 0x01;
450 if ((status1 & 0xf8) != 0xf8)
451 mask |= 0x02;
452#ifdef ATA_DEBUG
453 printf("ata%d: mask=%02x status0=%02x status1=%02x\n",
454 scp->lun, mask, status0, status1);
455#endif
456 if (!mask) {
457 free(scp, M_DEVBUF);
458 return 0;
459 }
460 /* assert reset for devices and wait for completition */
461 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | ATA_MASTER);
462 DELAY(1);
463 outb(scp->altioaddr, ATA_A_IDS | ATA_A_RESET);
464 DELAY(1000);
465 outb(scp->altioaddr, ATA_A_IDS);
466 DELAY(1000);
467 inb(scp->ioaddr + ATA_ERROR);
468 DELAY(1);
469 outb(scp->altioaddr, ATA_A_4BIT);
470 DELAY(1);
471
472 /* wait for BUSY to go inactive */
473 for (timeout = 0; timeout < 30000*10; timeout++) {
474 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | ATA_MASTER);
475 DELAY(1);
476 status0 = inb(scp->ioaddr + ATA_STATUS);
477 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | ATA_SLAVE);
478 DELAY(1);
479 status1 = inb(scp->ioaddr + ATA_STATUS);
480 if (mask == 0x01) /* wait for master only */
481 if (!(status0 & ATA_S_BSY))
482 break;
483 if (mask == 0x02) /* wait for slave only */
484 if (!(status1 & ATA_S_BSY))
485 break;
486 if (mask == 0x03) /* wait for both master & slave */
487 if (!(status0 & ATA_S_BSY) && !(status1 & ATA_S_BSY))
488 break;
489 DELAY(100);
490 }
491 if (status0 & ATA_S_BSY)
492 mask &= ~0x01;
493 if (status1 & ATA_S_BSY)
494 mask &= ~0x02;
495#ifdef ATA_DEBUG
496 printf("ata%d: mask=%02x status0=%02x status1=%02x\n",
497 scp->lun, mask, status0, status1);
498#endif
499 if (!mask) {
500 free(scp, M_DEVBUF);
501 return 0;
502 }
503 /*
504 * OK, we have at least one device on the chain,
505 * check for ATAPI signatures, if none check if its
506 * a good old ATA device.
507 */
508
509 outb(scp->ioaddr + ATA_DRIVE, (ATA_D_IBM | ATA_MASTER));
510 DELAY(1);
511 if (inb(scp->ioaddr + ATA_CYL_LSB) == ATAPI_MAGIC_LSB &&
512 inb(scp->ioaddr + ATA_CYL_MSB) == ATAPI_MAGIC_MSB) {
513 scp->devices |= ATA_ATAPI_MASTER;
514 }
515 outb(scp->ioaddr + ATA_DRIVE, (ATA_D_IBM | ATA_SLAVE));
516 DELAY(1);
517 if (inb(scp->ioaddr + ATA_CYL_LSB) == ATAPI_MAGIC_LSB &&
518 inb(scp->ioaddr + ATA_CYL_MSB) == ATAPI_MAGIC_MSB) {
519 scp->devices |= ATA_ATAPI_SLAVE;
520 }
521 if (status0 != 0x00 && !(scp->devices & ATA_ATAPI_MASTER)) {
522 outb(scp->ioaddr + ATA_DRIVE, (ATA_D_IBM | ATA_MASTER));
523 DELAY(1);
524 outb(scp->ioaddr + ATA_ERROR, 0x58);
525 outb(scp->ioaddr + ATA_CYL_LSB, 0xa5);
526 if (inb(scp->ioaddr + ATA_ERROR) != 0x58 &&
527 inb(scp->ioaddr + ATA_CYL_LSB) == 0xa5) {
528 scp->devices |= ATA_ATA_MASTER;
529 }
530 }
531 if (status1 != 0x00 && !(scp->devices & ATA_ATAPI_SLAVE)) {
532 outb(scp->ioaddr + ATA_DRIVE, (ATA_D_IBM | ATA_SLAVE));
533 DELAY(1);
534 outb(scp->ioaddr + ATA_ERROR, 0x58);
535 outb(scp->ioaddr + ATA_CYL_LSB, 0xa5);
536 if (inb(scp->ioaddr + ATA_ERROR) != 0x58 &&
537 inb(scp->ioaddr + ATA_CYL_LSB) == 0xa5) {
538 scp->devices |= ATA_ATA_SLAVE;
539 }
540 }
541#ifdef ATA_DEBUG
542 printf("ata%d: devices = 0x%x\n", scp->lun, scp->devices);
543#endif
544 if (!scp->devices) {
545 free(scp, M_DEVBUF);
546 return 0;
547 }
548 TAILQ_INIT(&scp->ata_queue);
549 TAILQ_INIT(&scp->atapi_queue);
550 *unit = scp->lun;
551 scp->dev = dev;
552 if (bmaddr)
553 scp->bmaddr = bmaddr;
554 atadevices[scp->lun] = scp;
555#ifndef ATA_STATIC_ID
556 atanlun++;
557#endif
558 return ATA_IOSIZE;
559}
560
561static void
562ataintr(void *data)
563{
564 struct ata_softc *scp;
565 struct atapi_request *atapi_request;
566 struct ad_request *ad_request;
567 u_int8_t status;
568 static int32_t intr_count = 0;
569
570 scp = (struct ata_softc *)data;
571
572 /* find & call the responsible driver to process this interrupt */
573 switch (scp->active) {
574#if NATADISK > 0
575 case ATA_ACTIVE_ATA:
576 if ((ad_request = TAILQ_FIRST(&scp->ata_queue)))
577 if (ad_interrupt(ad_request) == ATA_OP_CONTINUES)
578 return;
579 break;
580#endif
581 case ATA_ACTIVE_ATAPI:
582 if ((atapi_request = TAILQ_FIRST(&scp->atapi_queue)))
583 if (atapi_interrupt(atapi_request) == ATA_OP_CONTINUES)
584 return;
585 break;
586
587 case ATA_WAIT_INTR:
588 wakeup((caddr_t)scp);
589 break;
590
591 case ATA_IGNORE_INTR:
592 break;
593
594 default:
595 case ATA_IDLE:
596 status = inb(scp->ioaddr + ATA_STATUS);
597 if (intr_count++ < 10)
598 printf("ata%d: unwanted interrupt %d status = %02x\n",
599 scp->lun, intr_count, status);
600 return;
601 }
602 scp->active = ATA_IDLE;
603 ata_start(scp);
604}
605
606void
607ata_start(struct ata_softc *scp)
608{
609 struct ad_request *ad_request;
610 struct atapi_request *atapi_request;
611
612#ifdef ATA_DEBUG
613 printf("ata_start: entered\n");
614#endif
615 if (scp->active != ATA_IDLE) {
616 printf("ata: unwanted ata_start\n");
617 return;
618 }
619
620#if NATADISK > 0
621 /* find & call the responsible driver if anything on ATA queue */
622 if ((ad_request = TAILQ_FIRST(&scp->ata_queue))) {
623 scp->active = ATA_ACTIVE_ATA;
624 ad_transfer(ad_request);
625#ifdef ATA_DEBUG
626 printf("ata_start: started ata, leaving\n");
627#endif
628 return;
629 }
630#endif
631
632 /* find & call the responsible driver if anything on ATAPI queue */
633 if ((atapi_request = TAILQ_FIRST(&scp->atapi_queue))) {
634 scp->active = ATA_ACTIVE_ATAPI;
635 atapi_transfer(atapi_request);
636#ifdef ATA_DEBUG
637 printf("ata_start: started atapi, leaving\n");
638#endif
639 return;
640 }
641}
642
643int32_t
644ata_wait(struct ata_softc *scp, int32_t device, u_int8_t mask)
645{
646 u_int8_t status;
647 u_int32_t timeout = 0;
648
649 while (timeout++ <= 500000) { /* timeout 5 secs */
650 status = inb(scp->ioaddr + ATA_STATUS);
651
652 /* if drive fails status, reselect the drive just to be sure */
653 if (status == 0xff) {
654 printf("ata%d: %s: no status, reselecting device\n",
655 scp->lun, device?"slave":"master");
656 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | device);
657 DELAY(1);
658 status = inb(scp->ioaddr + ATA_STATUS);
659 }
660 if (status == 0xff)
661 return -1;
662 scp->status = status;
663 if (!(status & ATA_S_BSY)) {
664 if (status & ATA_S_ERROR)
665 scp->error = inb(scp->ioaddr + ATA_ERROR);
666 if ((status & mask) == mask)
667 return (status & ATA_S_ERROR);
668 }
669 if (timeout > 1000)
670 DELAY(1000);
671 else
672 DELAY(10);
673 }
674 return -1;
675}
676
677int32_t
678ata_command(struct ata_softc *scp, int32_t device, u_int32_t command,
679 u_int32_t cylinder, u_int32_t head, u_int32_t sector,
680 u_int32_t count, u_int32_t feature, int32_t flags)
681{
682#ifdef ATA_DEBUG
683printf("ata%d: ata_command: addr=%04x, device=%02x, cmd=%02x, c=%d, h=%d, s=%d, count=%d, flags=%02x\n", scp->lun, scp->ioaddr, device, command, cylinder, head, sector, count, flags);
684#endif
685
686 /* ready to issue command ? */
687 if (ata_wait(scp, device, 0) < 0) {
688 printf("ata%d: %s: timeout waiting to give command s=%02x e=%02x\n",
689 scp->lun, device?"slave":"master", scp->status, scp->error);
690 }
691 outb(scp->ioaddr + ATA_FEATURE, feature);
692 outb(scp->ioaddr + ATA_CYL_LSB, cylinder);
693 outb(scp->ioaddr + ATA_CYL_MSB, cylinder >> 8);
694 outb(scp->ioaddr + ATA_DRIVE, ATA_D_IBM | device | head);
695 outb(scp->ioaddr + ATA_SECTOR, sector);
696 outb(scp->ioaddr + ATA_COUNT, count);
697
698 if (scp->active != ATA_IDLE && flags != ATA_IMMEDIATE)
699 printf("DANGER active=%d\n", scp->active);
700
701 switch (flags) {
702 case ATA_WAIT_INTR:
703 scp->active = ATA_WAIT_INTR;
704 outb(scp->ioaddr + ATA_CMD, command);
705 if (tsleep((caddr_t)scp, PRIBIO, "atacmd", 500)) {
706 printf("ata_command: timeout waiting for interrupt\n");
707 scp->active = ATA_IDLE;
708 return -1;
709 }
710 break;
711
712 case ATA_IGNORE_INTR:
713 scp->active = ATA_IGNORE_INTR;
714 outb(scp->ioaddr + ATA_CMD, command);
715 break;
716
717 case ATA_IMMEDIATE:
718 default:
719 outb(scp->ioaddr + ATA_CMD, command);
720 break;
721 }
722#ifdef ATA_DEBUG
723printf("ata_command: leaving\n");
724#endif
725 return 0;
726}
727
728void
729bswap(int8_t *buf, int32_t len)
730{
731 u_int16_t *p = (u_int16_t*)(buf + len);
732
733 while (--p >= (u_int16_t*)buf)
734 *p = ntohs(*p);
735}
736
737void
738btrim(int8_t *buf, int32_t len)
739{
740 int8_t *p;
741
742 for (p = buf; p < buf+len; ++p)
743 if (!*p)
744 *p = ' ';
745 for (p = buf + len - 1; p >= buf && *p == ' '; --p)
746 *p = 0;
747}
748
749void
750bpack(int8_t *src, int8_t *dst, int32_t len)
751{
752 int32_t i, j, blank;
753
754 for (i = j = blank = 0 ; i < len-1; i++) {
755 if (blank && src[i] == ' ') continue;
756 if (blank && src[i] != ' ') {
757 dst[j++] = src[i];
758 blank = 0;
759 continue;
760 }
761 if (src[i] == ' ')
762 blank = 1;
763 dst[j++] = src[i];
764 }
765 dst[j] = 0x00;
766}
767#endif /* NATA > 0 */