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if_anreg.h (103870) if_anreg.h (108401)
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/an/if_anreg.h 103870 2002-09-23 18:54:32Z alfred $
32 * $FreeBSD: head/sys/dev/an/if_anreg.h 108401 2002-12-29 19:22:07Z ambrisko $
33 */
34
33 */
34
35#define AN_TIMEOUT 65536
35#define AN_TIMEOUT 600000
36
37/* Default network name: <empty string> */
38#define AN_DEFAULT_NETNAME ""
39
40/* The nodename must be less than 16 bytes */
41#define AN_DEFAULT_NODENAME "FreeBSD"
42
43#define AN_DEFAULT_IBSS "FreeBSD IBSS"

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53
54#define CSR_WRITE_1(sc, reg, val) \
55 bus_space_write_1(sc->an_btag, sc->an_bhandle, reg, val)
56
57#define CSR_READ_1(sc, reg) \
58 bus_space_read_1(sc->an_btag, sc->an_bhandle, reg)
59
60/*
36
37/* Default network name: <empty string> */
38#define AN_DEFAULT_NETNAME ""
39
40/* The nodename must be less than 16 bytes */
41#define AN_DEFAULT_NODENAME "FreeBSD"
42
43#define AN_DEFAULT_IBSS "FreeBSD IBSS"

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53
54#define CSR_WRITE_1(sc, reg, val) \
55 bus_space_write_1(sc->an_btag, sc->an_bhandle, reg, val)
56
57#define CSR_READ_1(sc, reg) \
58 bus_space_read_1(sc->an_btag, sc->an_bhandle, reg)
59
60/*
61 * memory space access macros
62 */
63#define CSR_MEM_WRITE_2(sc, reg, val) \
64 bus_space_write_2(sc->an_mem_btag, sc->an_mem_bhandle, reg, val)
65
66#define CSR_MEM_READ_2(sc, reg) \
67 bus_space_read_2(sc->an_mem_btag, sc->an_mem_bhandle, reg)
68
69#define CSR_MEM_WRITE_1(sc, reg, val) \
70 bus_space_write_1(sc->an_mem_btag, sc->an_mem_bhandle, reg, val)
71
72#define CSR_MEM_READ_1(sc, reg) \
73 bus_space_read_1(sc->an_mem_btag, sc->an_mem_bhandle, reg)
74
75/*
76 * aux. memory space access macros
77 */
78#define CSR_MEM_AUX_WRITE_4(sc, reg, val) \
79 bus_space_write_4(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg, val)
80
81#define CSR_MEM_AUX_READ_4(sc, reg) \
82 bus_space_read_4(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg)
83
84#define CSR_MEM_AUX_WRITE_1(sc, reg, val) \
85 bus_space_write_1(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg, val)
86
87#define CSR_MEM_AUX_READ_1(sc, reg) \
88 bus_space_read_1(sc->an_mem_aux_btag, sc->an_mem_aux_bhandle, reg)
89
90/*
61 * Size of Aironet I/O space.
62 */
63#define AN_IOSIZ 0x40
64
65/*
91 * Size of Aironet I/O space.
92 */
93#define AN_IOSIZ 0x40
94
95/*
96 * Size of aux. memory space ... probably not needed DJA
97 */
98#define AN_AUXMEMSIZE (256 * 1024)
99
100/*
66 * Hermes register definitions and what little I know about them.
67 */
68
69/* Hermes command/status registers. */
101 * Hermes register definitions and what little I know about them.
102 */
103
104/* Hermes command/status registers. */
70#define AN_COMMAND 0x00
71#define AN_PARAM0 0x02
72#define AN_PARAM1 0x04
73#define AN_PARAM2 0x06
74#define AN_STATUS 0x08
75#define AN_RESP0 0x0A
76#define AN_RESP1 0x0C
77#define AN_RESP2 0x0E
78#define AN_LINKSTAT 0x10
105#define AN_COMMAND(x) (x ? 0x00 : 0x00)
106#define AN_PARAM0(x) (x ? 0x04 : 0x02)
107#define AN_PARAM1(x) (x ? 0x08 : 0x04)
108#define AN_PARAM2(x) (x ? 0x0c : 0x06)
109#define AN_STATUS(x) (x ? 0x10 : 0x08)
110#define AN_RESP0(x) (x ? 0x14 : 0x0A)
111#define AN_RESP1(x) (x ? 0x18 : 0x0C)
112#define AN_RESP2(x) (x ? 0x1c : 0x0E)
113#define AN_LINKSTAT(x) (x ? 0x20 : 0x10)
79
80/* Command register */
81#define AN_CMD_BUSY 0x8000 /* busy bit */
82#define AN_CMD_NO_ACK 0x0080 /* don't acknowledge command */
83#define AN_CMD_CODE_MASK 0x003F
84#define AN_CMD_QUAL_MASK 0x7F00
85
86/* Command codes */

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92#define AN_CMD_HOST_SLEEP 0x0005
93#define AN_CMD_MAGIC_PKT 0x0006
94#define AN_CMD_READCFG 0x0008
95#define AN_CMD_SET_MODE 0x0009
96#define AN_CMD_ALLOC_MEM 0x000A /* allocate NIC memory */
97#define AN_CMD_TX 0x000B /* transmit */
98#define AN_CMD_DEALLOC_MEM 0x000C
99#define AN_CMD_NOOP2 0x0010
114
115/* Command register */
116#define AN_CMD_BUSY 0x8000 /* busy bit */
117#define AN_CMD_NO_ACK 0x0080 /* don't acknowledge command */
118#define AN_CMD_CODE_MASK 0x003F
119#define AN_CMD_QUAL_MASK 0x7F00
120
121/* Command codes */

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127#define AN_CMD_HOST_SLEEP 0x0005
128#define AN_CMD_MAGIC_PKT 0x0006
129#define AN_CMD_READCFG 0x0008
130#define AN_CMD_SET_MODE 0x0009
131#define AN_CMD_ALLOC_MEM 0x000A /* allocate NIC memory */
132#define AN_CMD_TX 0x000B /* transmit */
133#define AN_CMD_DEALLOC_MEM 0x000C
134#define AN_CMD_NOOP2 0x0010
135#define AN_CMD_ALLOC_DESC 0x0020
100#define AN_CMD_ACCESS 0x0021
101#define AN_CMD_ALLOC_BUF 0x0028
102#define AN_CMD_PSP_NODES 0x0030
103#define AN_CMD_SET_PHYREG 0x003E
104#define AN_CMD_TX_TEST 0x003F
105#define AN_CMD_SLEEP 0x0085
106#define AN_CMD_SAVECFG 0x0108
107
108/*
136#define AN_CMD_ACCESS 0x0021
137#define AN_CMD_ALLOC_BUF 0x0028
138#define AN_CMD_PSP_NODES 0x0030
139#define AN_CMD_SET_PHYREG 0x003E
140#define AN_CMD_TX_TEST 0x003F
141#define AN_CMD_SLEEP 0x0085
142#define AN_CMD_SAVECFG 0x0108
143
144/*
145 * MPI 350 DMA descriptor information
146 */
147#define AN_DESCRIPTOR_TX 0x01
148#define AN_DESCRIPTOR_RX 0x02
149#define AN_DESCRIPTOR_TXCMP 0x04
150#define AN_DESCRIPTOR_HOSTWRITE 0x08
151#define AN_DESCRIPTOR_HOSTREAD 0x10
152#define AN_DESCRIPTOR_HOSTRW 0x20
153
154#define AN_MAX_RX_DESC 1
155#define AN_MAX_TX_DESC 1
156#define AN_HOSTBUFSIZ 1840
157
158struct an_card_rid_desc
159{
160 unsigned an_rid:16;
161 unsigned an_len:15;
162 unsigned an_valid:1;
163 u_int64_t an_phys;
164};
165
166struct an_card_rx_desc
167{
168 unsigned an_ctrl:15;
169 unsigned an_done:1;
170 unsigned an_len:15;
171 unsigned an_valid:1;
172 u_int64_t an_phys;
173};
174
175struct an_card_tx_desc
176{
177 unsigned an_offset:15;
178 unsigned an_eoc:1;
179 unsigned an_len:15;
180 unsigned an_valid:1;
181 u_int64_t an_phys;
182};
183
184#define AN_RID_BUFFER_SIZE 2048
185#define AN_RX_BUFFER_SIZE 1840
186#define AN_TX_BUFFER_SIZE 1840
187#define AN_HOST_DESC_OFFSET 0x8
188#define AN_RX_DESC_OFFSET (AN_HOST_DESC_OFFSET + \
189 sizeof(struct an_card_rid_desc))
190#define AN_TX_DESC_OFFSET (AN_RX_DESC_OFFSET + \
191 (AN_MAX_RX_DESC * sizeof(struct an_card_rx_desc)))
192
193struct an_command {
194 u_int16_t an_cmd;
195 u_int16_t an_parm0;
196 u_int16_t an_parm1;
197 u_int16_t an_parm2;
198};
199
200struct an_reply {
201 u_int16_t an_status;
202 u_int16_t an_resp0;
203 u_int16_t an_resp1;
204 u_int16_t an_resp2;
205};
206
207/*
109 * Reclaim qualifier bit, applicable to the
110 * TX command.
111 */
112#define AN_RECLAIM 0x0100 /* reclaim NIC memory */
113
114/*
115 * ACCESS command qualifier bits.
116 */

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164#define AN_BAP1 AN_DATA1
165
166#define AN_OFF_BUSY 0x8000
167#define AN_OFF_ERR 0x4000
168#define AN_OFF_DONE 0x2000
169#define AN_OFF_DATAOFF 0x0FFF
170
171/* Event registers */
208 * Reclaim qualifier bit, applicable to the
209 * TX command.
210 */
211#define AN_RECLAIM 0x0100 /* reclaim NIC memory */
212
213/*
214 * ACCESS command qualifier bits.
215 */

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263#define AN_BAP1 AN_DATA1
264
265#define AN_OFF_BUSY 0x8000
266#define AN_OFF_ERR 0x4000
267#define AN_OFF_DONE 0x2000
268#define AN_OFF_DATAOFF 0x0FFF
269
270/* Event registers */
172#define AN_EVENT_STAT 0x30 /* Event status */
173#define AN_INT_EN 0x32 /* Interrupt enable/disable */
174#define AN_EVENT_ACK 0x34 /* Ack event */
271#define AN_EVENT_STAT(x) (x ? 0x60 : 0x30) /* Event status */
272#define AN_INT_EN(x) (x ? 0x64 : 0x32) /* Interrupt enable/
273 disable */
274#define AN_EVENT_ACK(x) (x ? 0x68 : 0x34) /* Ack event */
175
176/* Events */
177#define AN_EV_CLR_STUCK_BUSY 0x4000 /* clear stuck busy bit */
178#define AN_EV_WAKEREQUEST 0x2000 /* awaken from PSP mode */
179#define AN_EV_AWAKE 0x0100 /* station woke up from PSP mode*/
180#define AN_EV_LINKSTAT 0x0080 /* link status available */
181#define AN_EV_CMD 0x0010 /* command completed */
182#define AN_EV_ALLOC 0x0008 /* async alloc/reclaim completed */
183#define AN_EV_TX_EXC 0x0004 /* async xmit completed with failure */
184#define AN_EV_TX 0x0002 /* async xmit completed succesfully */
185#define AN_EV_RX 0x0001 /* async rx completed */
186
187#define AN_INTRS \
188 (AN_EV_RX|AN_EV_TX|AN_EV_TX_EXC|AN_EV_ALLOC|AN_EV_LINKSTAT)
189
190/* Host software registers */
275
276/* Events */
277#define AN_EV_CLR_STUCK_BUSY 0x4000 /* clear stuck busy bit */
278#define AN_EV_WAKEREQUEST 0x2000 /* awaken from PSP mode */
279#define AN_EV_AWAKE 0x0100 /* station woke up from PSP mode*/
280#define AN_EV_LINKSTAT 0x0080 /* link status available */
281#define AN_EV_CMD 0x0010 /* command completed */
282#define AN_EV_ALLOC 0x0008 /* async alloc/reclaim completed */
283#define AN_EV_TX_EXC 0x0004 /* async xmit completed with failure */
284#define AN_EV_TX 0x0002 /* async xmit completed succesfully */
285#define AN_EV_RX 0x0001 /* async rx completed */
286
287#define AN_INTRS \
288 (AN_EV_RX|AN_EV_TX|AN_EV_TX_EXC|AN_EV_ALLOC|AN_EV_LINKSTAT)
289
290/* Host software registers */
191#define AN_SW0 0x28
192#define AN_SW1 0x2A
193#define AN_SW2 0x2C
194#define AN_SW3 0x2E
291#define AN_SW0(x) (x ? 0x50 : 0x28)
292#define AN_SW1(x) (x ? 0x54 : 0x2A)
293#define AN_SW2(x) (x ? 0x58 : 0x2C)
294#define AN_SW3(x) (x ? 0x5c : 0x2E)
195
196#define AN_CNTL 0x14
197
198#define AN_CNTL_AUX_ENA 0xC000
199#define AN_CNTL_AUX_ENA_STAT 0xC000
200#define AN_CNTL_AUX_DIS_STAT 0x0000
201#define AN_CNTL_AUX_ENA_CNTL 0x8000
202#define AN_CNTL_AUX_DIS_CNTL 0x4000

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306 u_int16_t an_8023_type;
307};
308
309struct an_snap_hdr {
310 u_int16_t an_snap_dat[3]; /* SNAP header */
311 u_int16_t an_snap_type;
312};
313
295
296#define AN_CNTL 0x14
297
298#define AN_CNTL_AUX_ENA 0xC000
299#define AN_CNTL_AUX_ENA_STAT 0xC000
300#define AN_CNTL_AUX_DIS_STAT 0x0000
301#define AN_CNTL_AUX_ENA_CNTL 0x8000
302#define AN_CNTL_AUX_DIS_CNTL 0x4000

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406 u_int16_t an_8023_type;
407};
408
409struct an_snap_hdr {
410 u_int16_t an_snap_dat[3]; /* SNAP header */
411 u_int16_t an_snap_type;
412};
413
414struct an_dma_alloc {
415 u_int32_t an_dma_paddr;
416 caddr_t an_dma_vaddr;
417 bus_dmamap_t an_dma_map;
418 bus_dma_segment_t an_dma_seg;
419 bus_size_t an_dma_size;
420 int an_dma_nseg;
421};
422
314#define AN_TX_RING_CNT 4
315#define AN_INC(x, y) (x) = (x + 1) % y
316
317struct an_tx_ring_data {
318 u_int16_t an_tx_fids[AN_TX_RING_CNT];
319 u_int16_t an_tx_ring[AN_TX_RING_CNT];
320 int an_tx_prod;
321 int an_tx_cons;
423#define AN_TX_RING_CNT 4
424#define AN_INC(x, y) (x) = (x + 1) % y
425
426struct an_tx_ring_data {
427 u_int16_t an_tx_fids[AN_TX_RING_CNT];
428 u_int16_t an_tx_ring[AN_TX_RING_CNT];
429 int an_tx_prod;
430 int an_tx_cons;
431 int an_tx_empty;
322};
323
324struct an_softc {
325 struct arpcom arpcom;
326
327 int an_unit;
328
329 int port_rid; /* resource id for port range */
330 struct resource* port_res; /* resource for port range */
432};
433
434struct an_softc {
435 struct arpcom arpcom;
436
437 int an_unit;
438
439 int port_rid; /* resource id for port range */
440 struct resource* port_res; /* resource for port range */
441 int mem_rid; /* resource id for memory range */
442 int mem_used; /* nonzero if memory used */
443 struct resource* mem_res; /* resource for memory range */
444 int mem_aux_rid; /* resource id for memory range */
445 int mem_aux_used; /* nonzero if memory used */
446 struct resource* mem_aux_res; /* resource for memory range */
331 int irq_rid; /* resource id for irq */
447 int irq_rid; /* resource id for irq */
332 struct resource* irq_res; /* resource for irq */
333 void* irq_handle; /* handle for irq handler */
448 void* irq_handle; /* handle for irq handler */
449 struct resource* irq_res; /* resource for irq */
334
335 bus_space_handle_t an_bhandle_p;
336 bus_space_handle_t an_bhandle;
337 bus_space_tag_t an_btag;
450
451 bus_space_handle_t an_bhandle_p;
452 bus_space_handle_t an_bhandle;
453 bus_space_tag_t an_btag;
454 bus_space_handle_t an_mem_bhandle;
455 bus_space_tag_t an_mem_btag;
456 bus_space_handle_t an_mem_aux_bhandle;
457 bus_space_tag_t an_mem_aux_btag;
458 bus_dma_tag_t an_dtag;
338 struct an_ltv_genconfig an_config;
339 struct an_ltv_caps an_caps;
340 struct an_ltv_ssidlist an_ssidlist;
341 struct an_ltv_aplist an_aplist;
342 struct an_ltv_key an_temp_keys;
343 struct an_ltv_key an_perm_keys;
344 int an_tx_rate;
345 int an_rxmode;
346 int an_gone;
347 int an_if_flags;
348 u_int8_t an_txbuf[1536];
349 struct an_tx_ring_data an_rdata;
350 struct an_ltv_stats an_stats;
351 struct an_ltv_status an_status;
352 u_int8_t an_associated;
353#ifdef ANCACHE
354 int an_sigitems;
355 struct an_sigcache an_sigcache[MAXANCACHE];
356 int an_nextitem;
459 struct an_ltv_genconfig an_config;
460 struct an_ltv_caps an_caps;
461 struct an_ltv_ssidlist an_ssidlist;
462 struct an_ltv_aplist an_aplist;
463 struct an_ltv_key an_temp_keys;
464 struct an_ltv_key an_perm_keys;
465 int an_tx_rate;
466 int an_rxmode;
467 int an_gone;
468 int an_if_flags;
469 u_int8_t an_txbuf[1536];
470 struct an_tx_ring_data an_rdata;
471 struct an_ltv_stats an_stats;
472 struct an_ltv_status an_status;
473 u_int8_t an_associated;
474#ifdef ANCACHE
475 int an_sigitems;
476 struct an_sigcache an_sigcache[MAXANCACHE];
477 int an_nextitem;
478 int an_have_rssimap;
479 struct an_ltv_rssi_map an_rssimap;
357#endif
358 struct callout_handle an_stat_ch;
359 struct mtx an_mtx;
360 device_t an_dev;
361 struct ifmedia an_ifmedia;
362 int an_monitor;
363 int an_was_monitor;
364 u_char buf_802_11[MCLBYTES];
365 struct an_req areq;
480#endif
481 struct callout_handle an_stat_ch;
482 struct mtx an_mtx;
483 device_t an_dev;
484 struct ifmedia an_ifmedia;
485 int an_monitor;
486 int an_was_monitor;
487 u_char buf_802_11[MCLBYTES];
488 struct an_req areq;
489 unsigned short* an_flash_buffer;
490 int mpi350;
491 struct an_dma_alloc an_rid_buffer;
492 struct an_dma_alloc an_rx_buffer[AN_MAX_RX_DESC];
493 struct an_dma_alloc an_tx_buffer[AN_MAX_TX_DESC];
366};
367
368#define AN_LOCK(_sc) mtx_lock(&(_sc)->an_mtx)
369#define AN_UNLOCK(_sc) mtx_unlock(&(_sc)->an_mtx)
370
371void an_release_resources (device_t);
372int an_alloc_port (device_t, int, int);
373int an_alloc_memory (device_t, int, int);
494};
495
496#define AN_LOCK(_sc) mtx_lock(&(_sc)->an_mtx)
497#define AN_UNLOCK(_sc) mtx_unlock(&(_sc)->an_mtx)
498
499void an_release_resources (device_t);
500int an_alloc_port (device_t, int, int);
501int an_alloc_memory (device_t, int, int);
502int an_alloc_aux_memory (device_t, int, int);
374int an_alloc_irq (device_t, int, int);
375int an_probe (device_t);
376void an_shutdown (device_t);
377int an_attach (struct an_softc *, int, int);
378void an_stop (struct an_softc *);
379
380driver_intr_t an_intr;
381

--- 35 unchanged lines hidden --- 		503int an_alloc_irq (device_t, int, int);
504int an_probe (device_t);
505void an_shutdown (device_t);
506int an_attach (struct an_softc *, int, int);
507void an_stop (struct an_softc *);
508
509driver_intr_t an_intr;
510

--- 35 unchanged lines hidden ---