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if_an_pci.c (106937) if_an_pci.c (108401)
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/an/if_an_pci.c 106937 2002-11-14 23:54:55Z sam $
32 * $FreeBSD: head/sys/dev/an/if_an_pci.c 108401 2002-12-29 19:22:07Z ambrisko $
33 */
34
35/*
36 * This is a PCI shim for the Aironet PC4500/4800 wireless network
37 * driver. Aironet makes PCMCIA, ISA and PCI versions of these devices,
38 * which all have basically the same interface. The ISA and PCI cards
39 * are actually bridge adapters with PCMCIA cards inserted into them,
40 * however they appear as normal PCI or ISA devices to the host.

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79#include <net/if_dl.h>
80#include <net/if_media.h>
81
82#include <pci/pcireg.h>
83#include <pci/pcivar.h>
84
85#ifndef lint
86static const char rcsid[] =
33 */
34
35/*
36 * This is a PCI shim for the Aironet PC4500/4800 wireless network
37 * driver. Aironet makes PCMCIA, ISA and PCI versions of these devices,
38 * which all have basically the same interface. The ISA and PCI cards
39 * are actually bridge adapters with PCMCIA cards inserted into them,
40 * however they appear as normal PCI or ISA devices to the host.

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79#include <net/if_dl.h>
80#include <net/if_media.h>
81
82#include <pci/pcireg.h>
83#include <pci/pcivar.h>
84
85#ifndef lint
86static const char rcsid[] =
87 "$FreeBSD: head/sys/dev/an/if_an_pci.c 106937 2002-11-14 23:54:55Z sam $";
87 "$FreeBSD: head/sys/dev/an/if_an_pci.c 108401 2002-12-29 19:22:07Z ambrisko $";
88#endif
89
90#include <dev/an/if_aironet_ieee.h>
91#include <dev/an/if_anreg.h>
92
93struct an_type {
94 u_int16_t an_vid;
95 u_int16_t an_did;
96 char *an_name;
97};
98
99#define AIRONET_VENDORID 0x14B9
100#define AIRONET_DEVICEID_35x 0x0350
101#define AIRONET_DEVICEID_4500 0x4500
102#define AIRONET_DEVICEID_4800 0x4800
103#define AIRONET_DEVICEID_4xxx 0x0001
88#endif
89
90#include <dev/an/if_aironet_ieee.h>
91#include <dev/an/if_anreg.h>
92
93struct an_type {
94 u_int16_t an_vid;
95 u_int16_t an_did;
96 char *an_name;
97};
98
99#define AIRONET_VENDORID 0x14B9
100#define AIRONET_DEVICEID_35x 0x0350
101#define AIRONET_DEVICEID_4500 0x4500
102#define AIRONET_DEVICEID_4800 0x4800
103#define AIRONET_DEVICEID_4xxx 0x0001
104#define AIRONET_DEVICEID_MPI350 0xA504
104#define AN_PCI_PLX_LOIO 0x14 /* PLX chip iobase */
105#define AN_PCI_LOIO 0x18 /* Aironet iobase */
106
107static struct an_type an_devs[] = {
108 { AIRONET_VENDORID, AIRONET_DEVICEID_35x, "Cisco Aironet 350 Series" },
109 { AIRONET_VENDORID, AIRONET_DEVICEID_4500, "Aironet PCI4500" },
110 { AIRONET_VENDORID, AIRONET_DEVICEID_4800, "Aironet PCI4800" },
111 { AIRONET_VENDORID, AIRONET_DEVICEID_4xxx, "Aironet PCI4500/PCI4800" },

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127 if (pci_get_vendor(dev) == t->an_vid &&
128 pci_get_device(dev) == t->an_did) {
129 device_set_desc(dev, t->an_name);
130 return(0);
131 }
132 t++;
133 }
134
105#define AN_PCI_PLX_LOIO 0x14 /* PLX chip iobase */
106#define AN_PCI_LOIO 0x18 /* Aironet iobase */
107
108static struct an_type an_devs[] = {
109 { AIRONET_VENDORID, AIRONET_DEVICEID_35x, "Cisco Aironet 350 Series" },
110 { AIRONET_VENDORID, AIRONET_DEVICEID_4500, "Aironet PCI4500" },
111 { AIRONET_VENDORID, AIRONET_DEVICEID_4800, "Aironet PCI4800" },
112 { AIRONET_VENDORID, AIRONET_DEVICEID_4xxx, "Aironet PCI4500/PCI4800" },

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128 if (pci_get_vendor(dev) == t->an_vid &&
129 pci_get_device(dev) == t->an_did) {
130 device_set_desc(dev, t->an_name);
131 return(0);
132 }
133 t++;
134 }
135
136 if (pci_get_vendor(dev) == AIRONET_VENDORID &&
137 pci_get_device(dev) == AIRONET_DEVICEID_MPI350) {
138 device_set_desc(dev, "Cisco Aironet MPI350");
139 return(0);
140 }
141
135 return(ENXIO);
136}
137
138static int
139an_attach_pci(dev)
140 device_t dev;
141{
142 u_int32_t command;
143 struct an_softc *sc;
144 int unit, flags, error = 0;
145
146 sc = device_get_softc(dev);
147 unit = device_get_unit(dev);
148 flags = device_get_flags(dev);
149 bzero(sc, sizeof(struct an_softc));
150
142 return(ENXIO);
143}
144
145static int
146an_attach_pci(dev)
147 device_t dev;
148{
149 u_int32_t command;
150 struct an_softc *sc;
151 int unit, flags, error = 0;
152
153 sc = device_get_softc(dev);
154 unit = device_get_unit(dev);
155 flags = device_get_flags(dev);
156 bzero(sc, sizeof(struct an_softc));
157
151 /*
152 * Map control/status registers.
153 */
154 command = pci_read_config(dev, PCIR_COMMAND, 4);
155 command |= PCIM_CMD_PORTEN;
156 pci_write_config(dev, PCIR_COMMAND, command, 4);
157 command = pci_read_config(dev, PCIR_COMMAND, 4);
158 if (pci_get_vendor(dev) == AIRONET_VENDORID &&
159 pci_get_device(dev) == AIRONET_DEVICEID_MPI350) {
160 sc->mpi350 = 1;
161 sc->port_rid = PCIR_MAPS;
162 } else {
163 /*
164 * Map control/status registers.
165 */
166 command = pci_read_config(dev, PCIR_COMMAND, 4);
167 command |= PCIM_CMD_PORTEN;
168 pci_write_config(dev, PCIR_COMMAND, command, 4);
169 command = pci_read_config(dev, PCIR_COMMAND, 4);
158
170
159 if (!(command & PCIM_CMD_PORTEN)) {
160 printf("an%d: failed to enable I/O ports!\n", unit);
161 error = ENXIO;
162 goto fail;
171 if (!(command & PCIM_CMD_PORTEN)) {
172 printf("an%d: failed to enable I/O ports!\n", unit);
173 error = ENXIO;
174 goto fail;
175 }
176 sc->port_rid = AN_PCI_LOIO;
163 }
177 }
164
165 sc->port_rid = AN_PCI_LOIO;
166 error = an_alloc_port(dev, sc->port_rid, 1);
167
168 if (error) {
169 printf("an%d: couldn't map ports\n", unit);
170 goto fail;
171 }
172
173 sc->an_btag = rman_get_bustag(sc->port_res);
174 sc->an_bhandle = rman_get_bushandle(sc->port_res);
175
178 error = an_alloc_port(dev, sc->port_rid, 1);
179
180 if (error) {
181 printf("an%d: couldn't map ports\n", unit);
182 goto fail;
183 }
184
185 sc->an_btag = rman_get_bustag(sc->port_res);
186 sc->an_bhandle = rman_get_bushandle(sc->port_res);
187
188 /* Allocate memory for MPI350 */
189 if (sc->mpi350) {
190 /* Allocate memory */
191 sc->mem_rid = PCIR_MAPS + 4;
192 error = an_alloc_memory(dev, sc->mem_rid, 1);
193 if (error) {
194 printf("an%d: couldn't map memory\n", unit);
195 goto fail;
196 }
197 sc->an_mem_btag = rman_get_bustag(sc->mem_res);
198 sc->an_mem_bhandle = rman_get_bushandle(sc->mem_res);
199
200 /* Allocate aux. memory */
201 sc->mem_aux_rid = PCIR_MAPS + 8;
202 error = an_alloc_aux_memory(dev, sc->mem_aux_rid,
203 AN_AUXMEMSIZE);
204 if (error) {
205 printf("an%d: couldn't map aux memory\n", unit);
206 goto fail;
207 }
208 sc->an_mem_aux_btag = rman_get_bustag(sc->mem_aux_res);
209 sc->an_mem_aux_bhandle = rman_get_bushandle(sc->mem_aux_res);
210
211 /* Allocate DMA region */
212 error = bus_dma_tag_create(NULL, /* parent */
213 1, 0, /* alignment, bounds */
214 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
215 BUS_SPACE_MAXADDR, /* highaddr */
216 NULL, NULL, /* filter, filterarg */
217 0x3ffff, /* maxsize XXX */
218 1, /* nsegments */
219 0xffff, /* maxsegsize XXX */
220 BUS_DMA_ALLOCNOW, /* flags */
221 &sc->an_dtag);
222 if (error) {
223 printf("an%d: couldn't get DMA region\n", unit);
224 goto fail;
225 }
226 }
227
176 /* Allocate interrupt */
177 error = an_alloc_irq(dev, 0, RF_SHAREABLE);
178 if (error) {
228 /* Allocate interrupt */
229 error = an_alloc_irq(dev, 0, RF_SHAREABLE);
230 if (error) {
179 an_release_resources(dev);
180 goto fail;
181 }
182
183 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
184 an_intr, sc, &sc->irq_handle);
185 if (error) {
231 goto fail;
232 }
233
234 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
235 an_intr, sc, &sc->irq_handle);
236 if (error) {
186 an_release_resources(dev);
187 goto fail;
188 }
189
190 sc->an_dev = dev;
191 error = an_attach(sc, device_get_unit(dev), flags);
192
193fail:
237 goto fail;
238 }
239
240 sc->an_dev = dev;
241 error = an_attach(sc, device_get_unit(dev), flags);
242
243fail:
244 if (error)
245 an_release_resources(dev);
194 return(error);
195}
196
197static int
198an_detach_pci(device_t dev)
199{
200 struct an_softc *sc = device_get_softc(dev);
201 struct ifnet *ifp = &sc->arpcom.ac_if;

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246 return(error);
247}
248
249static int
250an_detach_pci(device_t dev)
251{
252 struct an_softc *sc = device_get_softc(dev);
253 struct ifnet *ifp = &sc->arpcom.ac_if;

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