1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
| 1/*-
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
|
34__FBSDID("$FreeBSD: head/sys/dev/an/if_an_pci.c 232854 2012-03-12 08:03:51Z scottl $");
| 34__FBSDID("$FreeBSD: head/sys/dev/an/if_an_pci.c 254263 2013-08-12 23:30:01Z scottl $");
|
35
36/*
37 * This is a PCI shim for the Aironet PC4500/4800 wireless network
38 * driver. Aironet makes PCMCIA, ISA and PCI versions of these devices,
39 * which all have basically the same interface. The ISA and PCI cards
40 * are actually bridge adapters with PCMCIA cards inserted into them,
41 * however they appear as normal PCI or ISA devices to the host.
42 *
43 * All we do here is handle the PCI probe and attach and set up an
44 * interrupt handler entry point. The PCI version of the card uses
45 * a PLX 9050 PCI to "dumb bus" bridge chip, which provides us with
46 * multiple PCI address space mappings. The primary mapping at PCI
47 * register 0x14 is for the PLX chip itself, *NOT* the Aironet card.
48 * The I/O address of the Aironet is actually at register 0x18, which
49 * is the local bus mapping register for bus space 0. There are also
50 * registers for additional register spaces at registers 0x1C and
51 * 0x20, but these are unused in the Aironet devices. To find out
52 * more, you need a datasheet for the 9050 from PLX, but you have
53 * to go through their sales office to get it. Bleh.
54 */
55
56#include "opt_inet.h"
57
58#ifdef INET
59#define ANCACHE
60#endif
61
62#include <sys/param.h>
63#include <sys/systm.h>
64#include <sys/sockio.h>
65#include <sys/mbuf.h>
66#include <sys/kernel.h>
67#include <sys/socket.h>
68
69#include <sys/module.h>
70#include <sys/bus.h>
71#include <machine/bus.h>
72#include <sys/rman.h>
73#include <sys/lock.h>
74#include <sys/mutex.h>
75#include <machine/resource.h>
76
77#include <net/if.h>
78#include <net/if_arp.h>
79#include <net/ethernet.h>
80#include <net/if_dl.h>
81#include <net/if_media.h>
82
83#include <dev/pci/pcireg.h>
84#include <dev/pci/pcivar.h>
85
86#include <dev/an/if_aironet_ieee.h>
87#include <dev/an/if_anreg.h>
88
89struct an_type {
90 u_int16_t an_vid;
91 u_int16_t an_did;
92 char *an_name;
93};
94
95#define AIRONET_VENDORID 0x14B9
96#define AIRONET_DEVICEID_35x 0x0350
97#define AIRONET_DEVICEID_4500 0x4500
98#define AIRONET_DEVICEID_4800 0x4800
99#define AIRONET_DEVICEID_4xxx 0x0001
100#define AIRONET_DEVICEID_MPI350 0xA504
101#define AN_PCI_PLX_LOIO 0x14 /* PLX chip iobase */
102#define AN_PCI_LOIO 0x18 /* Aironet iobase */
103
104static struct an_type an_devs[] = {
105 { AIRONET_VENDORID, AIRONET_DEVICEID_35x, "Cisco Aironet 350 Series" },
106 { AIRONET_VENDORID, AIRONET_DEVICEID_MPI350, "Cisco Aironet MPI350" },
107 { AIRONET_VENDORID, AIRONET_DEVICEID_4500, "Aironet PCI4500" },
108 { AIRONET_VENDORID, AIRONET_DEVICEID_4800, "Aironet PCI4800" },
109 { AIRONET_VENDORID, AIRONET_DEVICEID_4xxx, "Aironet PCI4500/PCI4800" },
110 { 0, 0, NULL }
111};
112
113static int an_probe_pci (device_t);
114static int an_attach_pci (device_t);
115static int an_suspend_pci (device_t);
116static int an_resume_pci (device_t);
117
118static int
119an_probe_pci(device_t dev)
120{
121 struct an_type *t;
122 struct an_softc *sc = device_get_softc(dev);
123
124 bzero(sc, sizeof(struct an_softc));
125 t = an_devs;
126
127 while (t->an_name != NULL) {
128 if (pci_get_vendor(dev) == t->an_vid &&
129 pci_get_device(dev) == t->an_did) {
130 device_set_desc(dev, t->an_name);
131 an_pci_probe(dev);
132 return(BUS_PROBE_DEFAULT);
133 }
134 t++;
135 }
136
137 return(ENXIO);
138}
139
140static int
141an_attach_pci(dev)
142 device_t dev;
143{
| 35
36/*
37 * This is a PCI shim for the Aironet PC4500/4800 wireless network
38 * driver. Aironet makes PCMCIA, ISA and PCI versions of these devices,
39 * which all have basically the same interface. The ISA and PCI cards
40 * are actually bridge adapters with PCMCIA cards inserted into them,
41 * however they appear as normal PCI or ISA devices to the host.
42 *
43 * All we do here is handle the PCI probe and attach and set up an
44 * interrupt handler entry point. The PCI version of the card uses
45 * a PLX 9050 PCI to "dumb bus" bridge chip, which provides us with
46 * multiple PCI address space mappings. The primary mapping at PCI
47 * register 0x14 is for the PLX chip itself, *NOT* the Aironet card.
48 * The I/O address of the Aironet is actually at register 0x18, which
49 * is the local bus mapping register for bus space 0. There are also
50 * registers for additional register spaces at registers 0x1C and
51 * 0x20, but these are unused in the Aironet devices. To find out
52 * more, you need a datasheet for the 9050 from PLX, but you have
53 * to go through their sales office to get it. Bleh.
54 */
55
56#include "opt_inet.h"
57
58#ifdef INET
59#define ANCACHE
60#endif
61
62#include <sys/param.h>
63#include <sys/systm.h>
64#include <sys/sockio.h>
65#include <sys/mbuf.h>
66#include <sys/kernel.h>
67#include <sys/socket.h>
68
69#include <sys/module.h>
70#include <sys/bus.h>
71#include <machine/bus.h>
72#include <sys/rman.h>
73#include <sys/lock.h>
74#include <sys/mutex.h>
75#include <machine/resource.h>
76
77#include <net/if.h>
78#include <net/if_arp.h>
79#include <net/ethernet.h>
80#include <net/if_dl.h>
81#include <net/if_media.h>
82
83#include <dev/pci/pcireg.h>
84#include <dev/pci/pcivar.h>
85
86#include <dev/an/if_aironet_ieee.h>
87#include <dev/an/if_anreg.h>
88
89struct an_type {
90 u_int16_t an_vid;
91 u_int16_t an_did;
92 char *an_name;
93};
94
95#define AIRONET_VENDORID 0x14B9
96#define AIRONET_DEVICEID_35x 0x0350
97#define AIRONET_DEVICEID_4500 0x4500
98#define AIRONET_DEVICEID_4800 0x4800
99#define AIRONET_DEVICEID_4xxx 0x0001
100#define AIRONET_DEVICEID_MPI350 0xA504
101#define AN_PCI_PLX_LOIO 0x14 /* PLX chip iobase */
102#define AN_PCI_LOIO 0x18 /* Aironet iobase */
103
104static struct an_type an_devs[] = {
105 { AIRONET_VENDORID, AIRONET_DEVICEID_35x, "Cisco Aironet 350 Series" },
106 { AIRONET_VENDORID, AIRONET_DEVICEID_MPI350, "Cisco Aironet MPI350" },
107 { AIRONET_VENDORID, AIRONET_DEVICEID_4500, "Aironet PCI4500" },
108 { AIRONET_VENDORID, AIRONET_DEVICEID_4800, "Aironet PCI4800" },
109 { AIRONET_VENDORID, AIRONET_DEVICEID_4xxx, "Aironet PCI4500/PCI4800" },
110 { 0, 0, NULL }
111};
112
113static int an_probe_pci (device_t);
114static int an_attach_pci (device_t);
115static int an_suspend_pci (device_t);
116static int an_resume_pci (device_t);
117
118static int
119an_probe_pci(device_t dev)
120{
121 struct an_type *t;
122 struct an_softc *sc = device_get_softc(dev);
123
124 bzero(sc, sizeof(struct an_softc));
125 t = an_devs;
126
127 while (t->an_name != NULL) {
128 if (pci_get_vendor(dev) == t->an_vid &&
129 pci_get_device(dev) == t->an_did) {
130 device_set_desc(dev, t->an_name);
131 an_pci_probe(dev);
132 return(BUS_PROBE_DEFAULT);
133 }
134 t++;
135 }
136
137 return(ENXIO);
138}
139
140static int
141an_attach_pci(dev)
142 device_t dev;
143{
|
144 u_int32_t command;
| |
145 struct an_softc *sc;
146 int flags, error = 0;
147
148 sc = device_get_softc(dev);
149 flags = device_get_flags(dev);
150
151 if (pci_get_vendor(dev) == AIRONET_VENDORID &&
152 pci_get_device(dev) == AIRONET_DEVICEID_MPI350) {
153 sc->mpi350 = 1;
154 sc->port_rid = PCIR_BAR(0);
155 } else {
| 144 struct an_softc *sc;
145 int flags, error = 0;
146
147 sc = device_get_softc(dev);
148 flags = device_get_flags(dev);
149
150 if (pci_get_vendor(dev) == AIRONET_VENDORID &&
151 pci_get_device(dev) == AIRONET_DEVICEID_MPI350) {
152 sc->mpi350 = 1;
153 sc->port_rid = PCIR_BAR(0);
154 } else {
|
156 /*
157 * Map control/status registers.
158 */
159 command = pci_read_config(dev, PCIR_COMMAND, 4);
160 command |= PCIM_CMD_PORTEN;
161 pci_write_config(dev, PCIR_COMMAND, command, 4);
162 command = pci_read_config(dev, PCIR_COMMAND, 4);
163
164 if (!(command & PCIM_CMD_PORTEN)) {
165 device_printf(dev, "failed to enable I/O ports!\n");
166 error = ENXIO;
167 goto fail;
168 }
| |
169 sc->port_rid = AN_PCI_LOIO;
170 }
171 error = an_alloc_port(dev, sc->port_rid, 1);
172
173 if (error) {
174 device_printf(dev, "couldn't map ports\n");
175 goto fail;
176 }
177
178 /* Allocate memory for MPI350 */
179 if (sc->mpi350) {
180 /* Allocate memory */
181 sc->mem_rid = PCIR_BAR(1);
182 error = an_alloc_memory(dev, sc->mem_rid, 1);
183 if (error) {
184 device_printf(dev, "couldn't map memory\n");
185 goto fail;
186 }
187
188 /* Allocate aux. memory */
189 sc->mem_aux_rid = PCIR_BAR(2);
190 error = an_alloc_aux_memory(dev, sc->mem_aux_rid,
191 AN_AUX_MEM_SIZE);
192 if (error) {
193 device_printf(dev, "couldn't map aux memory\n");
194 goto fail;
195 }
196
197 /* Allocate DMA region */
198 error = bus_dma_tag_create(bus_get_dma_tag(dev),/* parent */
199 1, 0, /* alignment, bounds */
200 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
201 BUS_SPACE_MAXADDR, /* highaddr */
202 NULL, NULL, /* filter, filterarg */
203 0x3ffff, /* maxsize XXX */
204 1, /* nsegments */
205 0xffff, /* maxsegsize XXX */
206 BUS_DMA_ALLOCNOW, /* flags */
207 NULL, /* lockfunc */
208 NULL, /* lockarg */
209 &sc->an_dtag);
210 if (error) {
211 device_printf(dev, "couldn't get DMA region\n");
212 goto fail;
213 }
214 }
215
216 /* Allocate interrupt */
217 error = an_alloc_irq(dev, 0, RF_SHAREABLE);
218 if (error) {
219 device_printf(dev, "couldn't get interrupt\n");
220 goto fail;
221 }
222
223 sc->an_dev = dev;
224 error = an_attach(sc, flags);
225 if (error) {
226 device_printf(dev, "couldn't attach\n");
227 goto fail;
228 }
229
230 /*
231 * Must setup the interrupt after the an_attach to prevent racing.
232 */
233 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
234 NULL, an_intr, sc, &sc->irq_handle);
235 if (error)
236 device_printf(dev, "couldn't setup interrupt\n");
237
238fail:
239 if (error)
240 an_release_resources(dev);
241 return(error);
242}
243
244static int
245an_suspend_pci(device_t dev)
246{
247 an_shutdown(dev);
248
249 return (0);
250}
251
252static int
253an_resume_pci(device_t dev)
254{
255 an_resume(dev);
256
257 return (0);
258}
259
260static device_method_t an_pci_methods[] = {
261 /* Device interface */
262 DEVMETHOD(device_probe, an_probe_pci),
263 DEVMETHOD(device_attach, an_attach_pci),
264 DEVMETHOD(device_detach, an_detach),
265 DEVMETHOD(device_shutdown, an_shutdown),
266 DEVMETHOD(device_suspend, an_suspend_pci),
267 DEVMETHOD(device_resume, an_resume_pci),
268 { 0, 0 }
269};
270
271static driver_t an_pci_driver = {
272 "an",
273 an_pci_methods,
274 sizeof(struct an_softc),
275};
276
277static devclass_t an_devclass;
278
279DRIVER_MODULE(an, pci, an_pci_driver, an_devclass, 0, 0);
280MODULE_DEPEND(an, pci, 1, 1, 1);
281MODULE_DEPEND(an, wlan, 1, 1, 1);
| 155 sc->port_rid = AN_PCI_LOIO;
156 }
157 error = an_alloc_port(dev, sc->port_rid, 1);
158
159 if (error) {
160 device_printf(dev, "couldn't map ports\n");
161 goto fail;
162 }
163
164 /* Allocate memory for MPI350 */
165 if (sc->mpi350) {
166 /* Allocate memory */
167 sc->mem_rid = PCIR_BAR(1);
168 error = an_alloc_memory(dev, sc->mem_rid, 1);
169 if (error) {
170 device_printf(dev, "couldn't map memory\n");
171 goto fail;
172 }
173
174 /* Allocate aux. memory */
175 sc->mem_aux_rid = PCIR_BAR(2);
176 error = an_alloc_aux_memory(dev, sc->mem_aux_rid,
177 AN_AUX_MEM_SIZE);
178 if (error) {
179 device_printf(dev, "couldn't map aux memory\n");
180 goto fail;
181 }
182
183 /* Allocate DMA region */
184 error = bus_dma_tag_create(bus_get_dma_tag(dev),/* parent */
185 1, 0, /* alignment, bounds */
186 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
187 BUS_SPACE_MAXADDR, /* highaddr */
188 NULL, NULL, /* filter, filterarg */
189 0x3ffff, /* maxsize XXX */
190 1, /* nsegments */
191 0xffff, /* maxsegsize XXX */
192 BUS_DMA_ALLOCNOW, /* flags */
193 NULL, /* lockfunc */
194 NULL, /* lockarg */
195 &sc->an_dtag);
196 if (error) {
197 device_printf(dev, "couldn't get DMA region\n");
198 goto fail;
199 }
200 }
201
202 /* Allocate interrupt */
203 error = an_alloc_irq(dev, 0, RF_SHAREABLE);
204 if (error) {
205 device_printf(dev, "couldn't get interrupt\n");
206 goto fail;
207 }
208
209 sc->an_dev = dev;
210 error = an_attach(sc, flags);
211 if (error) {
212 device_printf(dev, "couldn't attach\n");
213 goto fail;
214 }
215
216 /*
217 * Must setup the interrupt after the an_attach to prevent racing.
218 */
219 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
220 NULL, an_intr, sc, &sc->irq_handle);
221 if (error)
222 device_printf(dev, "couldn't setup interrupt\n");
223
224fail:
225 if (error)
226 an_release_resources(dev);
227 return(error);
228}
229
230static int
231an_suspend_pci(device_t dev)
232{
233 an_shutdown(dev);
234
235 return (0);
236}
237
238static int
239an_resume_pci(device_t dev)
240{
241 an_resume(dev);
242
243 return (0);
244}
245
246static device_method_t an_pci_methods[] = {
247 /* Device interface */
248 DEVMETHOD(device_probe, an_probe_pci),
249 DEVMETHOD(device_attach, an_attach_pci),
250 DEVMETHOD(device_detach, an_detach),
251 DEVMETHOD(device_shutdown, an_shutdown),
252 DEVMETHOD(device_suspend, an_suspend_pci),
253 DEVMETHOD(device_resume, an_resume_pci),
254 { 0, 0 }
255};
256
257static driver_t an_pci_driver = {
258 "an",
259 an_pci_methods,
260 sizeof(struct an_softc),
261};
262
263static devclass_t an_devclass;
264
265DRIVER_MODULE(an, pci, an_pci_driver, an_devclass, 0, 0);
266MODULE_DEPEND(an, pci, 1, 1, 1);
267MODULE_DEPEND(an, wlan, 1, 1, 1);
|