| if_alc.c (213844) | if_alc.c (213893) |
|---|---|
| 1/*- 2 * Copyright (c) 2009, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28/* Driver for Atheros AR813x/AR815x PCIe Ethernet. */ 29 30#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2009, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28/* Driver for Atheros AR813x/AR815x PCIe Ethernet. */ 29 30#include <sys/cdefs.h> |
| 31__FBSDID("$FreeBSD: head/sys/dev/alc/if_alc.c 213844 2010-10-14 18:31:40Z yongari $"); | 31__FBSDID("$FreeBSD: head/sys/dev/alc/if_alc.c 213893 2010-10-15 14:52:11Z marius $"); |
| 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/kernel.h> 38#include <sys/lock.h> 39#include <sys/malloc.h> --- 190 unchanged lines hidden (view full) --- 230alc_miibus_readreg(device_t dev, int phy, int reg) 231{ 232 struct alc_softc *sc; 233 uint32_t v; 234 int i; 235 236 sc = device_get_softc(dev); 237 | 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/kernel.h> 38#include <sys/lock.h> 39#include <sys/malloc.h> --- 190 unchanged lines hidden (view full) --- 230alc_miibus_readreg(device_t dev, int phy, int reg) 231{ 232 struct alc_softc *sc; 233 uint32_t v; 234 int i; 235 236 sc = device_get_softc(dev); 237 |
| 238 if (phy != sc->alc_phyaddr) 239 return (0); 240 | |
| 241 /* 242 * For AR8132 fast ethernet controller, do not report 1000baseT 243 * capability to mii(4). Even though AR8132 uses the same 244 * model/revision number of F1 gigabit PHY, the PHY has no 245 * ability to establish 1000baseT link. 246 */ 247 if ((sc->alc_flags & ALC_FLAG_FASTETHER) != 0 && 248 reg == MII_EXTSR) --- 20 unchanged lines hidden (view full) --- 269alc_miibus_writereg(device_t dev, int phy, int reg, int val) 270{ 271 struct alc_softc *sc; 272 uint32_t v; 273 int i; 274 275 sc = device_get_softc(dev); 276 | 238 /* 239 * For AR8132 fast ethernet controller, do not report 1000baseT 240 * capability to mii(4). Even though AR8132 uses the same 241 * model/revision number of F1 gigabit PHY, the PHY has no 242 * ability to establish 1000baseT link. 243 */ 244 if ((sc->alc_flags & ALC_FLAG_FASTETHER) != 0 && 245 reg == MII_EXTSR) --- 20 unchanged lines hidden (view full) --- 266alc_miibus_writereg(device_t dev, int phy, int reg, int val) 267{ 268 struct alc_softc *sc; 269 uint32_t v; 270 int i; 271 272 sc = device_get_softc(dev); 273 |
| 277 if (phy != sc->alc_phyaddr) 278 return (0); 279 | |
| 280 CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE | 281 (val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT | 282 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 283 for (i = ALC_PHY_TIMEOUT; i > 0; i--) { 284 DELAY(5); 285 v = CSR_READ_4(sc, ALC_MDIO); 286 if ((v & (MDIO_OP_EXECUTE | MDIO_OP_BUSY)) == 0) 287 break; --- 685 unchanged lines hidden (view full) --- 973 if (pci_find_extcap(dev, PCIY_PMG, &base) == 0) { 974 ifp->if_capabilities |= IFCAP_WOL_MAGIC | IFCAP_WOL_MCAST; 975 sc->alc_flags |= ALC_FLAG_PM; 976 sc->alc_pmcap = base; 977 } 978 ifp->if_capenable = ifp->if_capabilities; 979 980 /* Set up MII bus. */ | 274 CSR_WRITE_4(sc, ALC_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE | 275 (val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT | 276 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 277 for (i = ALC_PHY_TIMEOUT; i > 0; i--) { 278 DELAY(5); 279 v = CSR_READ_4(sc, ALC_MDIO); 280 if ((v & (MDIO_OP_EXECUTE | MDIO_OP_BUSY)) == 0) 281 break; --- 685 unchanged lines hidden (view full) --- 967 if (pci_find_extcap(dev, PCIY_PMG, &base) == 0) { 968 ifp->if_capabilities |= IFCAP_WOL_MAGIC | IFCAP_WOL_MCAST; 969 sc->alc_flags |= ALC_FLAG_PM; 970 sc->alc_pmcap = base; 971 } 972 ifp->if_capenable = ifp->if_capabilities; 973 974 /* Set up MII bus. */ |
| 981 if ((error = mii_phy_probe(dev, &sc->alc_miibus, alc_mediachange, 982 alc_mediastatus)) != 0) { 983 device_printf(dev, "no PHY found!\n"); | 975 error = mii_attach(dev, &sc->alc_miibus, ifp, alc_mediachange, 976 alc_mediastatus, BMSR_DEFCAPMASK, sc->alc_phyaddr, MII_OFFSET_ANY, 977 0); 978 if (error != 0) { 979 device_printf(dev, "attaching PHYs failed\n"); |
| 984 goto fail; 985 } 986 987 ether_ifattach(ifp, sc->alc_eaddr); 988 989 /* VLAN capability setup. */ 990 ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | 991 IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO; --- 2781 unchanged lines hidden --- | 980 goto fail; 981 } 982 983 ether_ifattach(ifp, sc->alc_eaddr); 984 985 /* VLAN capability setup. */ 986 ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | 987 IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO; --- 2781 unchanged lines hidden --- |