| aic7xxx_93cx6.c (70204) | aic7xxx_93cx6.c (72640) |
|---|---|
| 1/* 2 * Interface for the 93C66/56/46/26/06 serial eeprom parts. 3 * 4 * Copyright (c) 1995, 1996 Daniel M. Eischen 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 16 unchanged lines hidden (view full) --- 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $Id: //depot/src/aic7xxx/aic7xxx_93cx6.c#5 $ 32 * | 1/* 2 * Interface for the 93C66/56/46/26/06 serial eeprom parts. 3 * 4 * Copyright (c) 1995, 1996 Daniel M. Eischen 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 16 unchanged lines hidden (view full) --- 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $Id: //depot/src/aic7xxx/aic7xxx_93cx6.c#5 $ 32 * |
| 33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx_93cx6.c 70204 2000-12-20 01:11:37Z gibbs $ | 33 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx_93cx6.c 72640 2001-02-18 10:25:42Z asmodai $ |
| 34 */ 35 36/* 37 * The instruction set of the 93C66/56/46/26/06 chips are as follows: 38 * 39 * Start OP * 40 * Function Bit Code Address** Data Description 41 * ------------------------------------------------------------------- 42 * READ 1 10 A5 - A0 Reads data stored in memory, 43 * starting at specified address | 34 */ 35 36/* 37 * The instruction set of the 93C66/56/46/26/06 chips are as follows: 38 * 39 * Start OP * 40 * Function Bit Code Address** Data Description 41 * ------------------------------------------------------------------- 42 * READ 1 10 A5 - A0 Reads data stored in memory, 43 * starting at specified address |
| 44 * EWEN 1 00 11XXXX Write enable must preceed | 44 * EWEN 1 00 11XXXX Write enable must precede |
| 45 * all programming modes 46 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 47 * WRITE 1 01 A5 - A0 D15 - D0 Writes register 48 * ERAL 1 00 10XXXX Erase all registers 49 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers 50 * EWDS 1 00 00XXXX Disables all programming 51 * instructions 52 * *Note: A value of X for address is a don't care condition. --- 161 unchanged lines hidden --- | 45 * all programming modes 46 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 47 * WRITE 1 01 A5 - A0 D15 - D0 Writes register 48 * ERAL 1 00 10XXXX Erase all registers 49 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers 50 * EWDS 1 00 00XXXX Disables all programming 51 * instructions 52 * *Note: A value of X for address is a don't care condition. --- 161 unchanged lines hidden --- |