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aic7xxx_93cx6.c (45445) aic7xxx_93cx6.c (47507)
1/*
2 * Interface for the 93C66/56/46/26/06 serial eeprom parts.
3 *
4 * Copyright (c) 1995, 1996 Daniel M. Eischen
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Absolutely no warranty of function or purpose is made by the author
17 * Daniel M. Eischen.
18 * 4. Modifications may be freely made to this file if the above conditions
19 * are met.
20 *
1/*
2 * Interface for the 93C66/56/46/26/06 serial eeprom parts.
3 *
4 * Copyright (c) 1995, 1996 Daniel M. Eischen
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Absolutely no warranty of function or purpose is made by the author
17 * Daniel M. Eischen.
18 * 4. Modifications may be freely made to this file if the above conditions
19 * are met.
20 *
21 * $Id: 93cx6.c,v 1.1 1998/09/15 07:24:16 gibbs Exp $
21 * $Id: 93cx6.c,v 1.2 1999/04/07 23:02:45 gibbs Exp $
22 */
23
24/*
25 * The instruction set of the 93C66/56/46/26/06 chips are as follows:
26 *
27 * Start OP *
28 * Function Bit Code Address** Data Description
29 * -------------------------------------------------------------------

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50 * OP code, Address, and Data (if needed). For the READ instruction, the
51 * requested 16-bit register contents is read from the data out line but
52 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
53 * first). The clock cycling from low to high initiates the next data
54 * bit to be sent from the chip.
55 *
56 */
57
22 */
23
24/*
25 * The instruction set of the 93C66/56/46/26/06 chips are as follows:
26 *
27 * Start OP *
28 * Function Bit Code Address** Data Description
29 * -------------------------------------------------------------------

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50 * OP code, Address, and Data (if needed). For the READ instruction, the
51 * requested 16-bit register contents is read from the data out line but
52 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
53 * first). The clock cycling from low to high initiates the next data
54 * bit to be sent from the chip.
55 *
56 */
57
58#include "opt_aic7xxx.h"
59
58#include <sys/param.h>
59#include <sys/systm.h>
60#include <machine/bus_memio.h>
61#include <machine/bus_pio.h>
62#include <machine/bus.h>
63#include <dev/aic7xxx/93cx6.h>
64
65/*

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155 temp = sd->sd_MS;
156 SEEPROM_OUTB(sd, temp);
157 CLOCK_PULSE(sd, sd->sd_RDY);
158 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
159 CLOCK_PULSE(sd, sd->sd_RDY);
160 SEEPROM_OUTB(sd, temp);
161 CLOCK_PULSE(sd, sd->sd_RDY);
162 }
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <machine/bus_memio.h>
63#include <machine/bus_pio.h>
64#include <machine/bus.h>
65#include <dev/aic7xxx/93cx6.h>
66
67/*

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157 temp = sd->sd_MS;
158 SEEPROM_OUTB(sd, temp);
159 CLOCK_PULSE(sd, sd->sd_RDY);
160 SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
161 CLOCK_PULSE(sd, sd->sd_RDY);
162 SEEPROM_OUTB(sd, temp);
163 CLOCK_PULSE(sd, sd->sd_RDY);
164 }
163#ifdef DUMP_93CX6_EEPROM
165#ifdef AHC_DUMP_EEPROM
164 printf("\nSerial EEPROM:");
165 for (k = 0; k < count; k = k + 1) {
166 if (((k % 8) == 0) && (k != 0)) {
167 printf ("\n ");
168 }
169 printf (" 0x%x", buf[k]);
170 }
171 printf ("\n");
172#endif
173 return (1);
174}
166 printf("\nSerial EEPROM:");
167 for (k = 0; k < count; k = k + 1) {
168 if (((k % 8) == 0) && (k != 0)) {
169 printf ("\n ");
170 }
171 printf (" 0x%x", buf[k]);
172 }
173 printf ("\n");
174#endif
175 return (1);
176}