| aic7xxx.seq (54211) | aic7xxx.seq (55581) |
|---|---|
| 1/* 2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD. 3 * | 1/* 2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD. 3 * |
| 4 * Copyright (c) 1994-1999 Justin Gibbs. | 4 * Copyright (c) 1994-2000 Justin Gibbs. |
| 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. --- 10 unchanged lines hidden (view full) --- 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * | 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. --- 10 unchanged lines hidden (view full) --- 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * |
| 31 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 54211 1999-12-06 18:23:31Z gibbs $ | 31 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 55581 2000-01-07 23:08:20Z gibbs $ |
| 32 */ 33 34#include <dev/aic7xxx/aic7xxx.reg> 35#include <cam/scsi/scsi_message.h> 36 37/* 38 * A few words on the waiting SCB list: 39 * After starting the selection hardware, we check for reconnecting targets --- 732 unchanged lines hidden (view full) --- 772data_phase_wideodd: 773 if ((ahc->features & AHC_ULTRA2) != 0) { 774 mov SINDEX, ALLONES; 775 mov DFCNTRL, DMAPARAMS; 776 test SSTAT0, SDONE jnz .;/* Wait for preload to complete */ 777data_phase_dma_loop: 778 test SSTAT0, SDONE jnz data_phase_dma_done; 779 test SSTAT1,PHASEMIS jz data_phase_dma_loop; /* ie. underrun */ | 32 */ 33 34#include <dev/aic7xxx/aic7xxx.reg> 35#include <cam/scsi/scsi_message.h> 36 37/* 38 * A few words on the waiting SCB list: 39 * After starting the selection hardware, we check for reconnecting targets --- 732 unchanged lines hidden (view full) --- 772data_phase_wideodd: 773 if ((ahc->features & AHC_ULTRA2) != 0) { 774 mov SINDEX, ALLONES; 775 mov DFCNTRL, DMAPARAMS; 776 test SSTAT0, SDONE jnz .;/* Wait for preload to complete */ 777data_phase_dma_loop: 778 test SSTAT0, SDONE jnz data_phase_dma_done; 779 test SSTAT1,PHASEMIS jz data_phase_dma_loop; /* ie. underrun */ |
| 780data_phase_dma_phasemis: 781 test SSTAT0,SDONE jnz . + 2; 782 mov SINDEX,ALLZEROS; /* Remeber the phasemiss */ | |
| 783 } else { 784 mov DMAPARAMS call dma; 785 } 786 787data_phase_dma_done: 788/* Go tell the host about any overruns */ 789 test SXFRCTL1,BITBUCKET jnz data_phase_overrun; 790 | 780 } else { 781 mov DMAPARAMS call dma; 782 } 783 784data_phase_dma_done: 785/* Go tell the host about any overruns */ 786 test SXFRCTL1,BITBUCKET jnz data_phase_overrun; 787 |
| 791/* Exit if we had an underrun. dma clears SINDEX in this case. */ 792 test SINDEX,0xff jz data_phase_finish; | 788/* See if we completed this segment */ 789 test STCNT[0], 0xff jnz data_phase_finish; 790 test STCNT[1], 0xff jnz data_phase_finish; 791 test STCNT[2], 0xff jnz data_phase_finish; |
| 793 794/* 795 * Advance the scatter-gather pointers if needed 796 */ 797sg_advance: 798 dec SG_COUNT; /* one less segment to go */ 799 800 test SG_COUNT, 0xff jz data_phase_finish; /* Are we done? */ --- 71 unchanged lines hidden (view full) --- 872 if ((ahc->flags & AHC_TARGETMODE) != 0) { 873 test SSTAT0, TARGET jnz data_phase_loop; 874 } 875 test SSTAT1, REQINIT jz .; 876 test SSTAT1,PHASEMIS jz data_phase_loop; 877 878 /* Ensure the last seg is visable at the shaddow layer */ 879 if ((ahc->features & AHC_ULTRA2) != 0) { | 792 793/* 794 * Advance the scatter-gather pointers if needed 795 */ 796sg_advance: 797 dec SG_COUNT; /* one less segment to go */ 798 799 test SG_COUNT, 0xff jz data_phase_finish; /* Are we done? */ --- 71 unchanged lines hidden (view full) --- 871 if ((ahc->flags & AHC_TARGETMODE) != 0) { 872 test SSTAT0, TARGET jnz data_phase_loop; 873 } 874 test SSTAT1, REQINIT jz .; 875 test SSTAT1,PHASEMIS jz data_phase_loop; 876 877 /* Ensure the last seg is visable at the shaddow layer */ 878 if ((ahc->features & AHC_ULTRA2) != 0) { |
| 880 or DFCNTRL, PRELOADEN; | 879 mov DFCNTRL, DMAPARAMS; 880 test SSTAT0, SDONE jnz .;/* Wait for preload to complete */ |
| 881 } 882 883data_phase_finish: 884 if ((ahc->features & AHC_ULTRA2) != 0) { 885 call ultra2_dmafinish; 886 } 887/* 888 * After a DMA finishes, save the SG and STCNT residuals back into the SCB --- 35 unchanged lines hidden (view full) --- 924 * Turn off BITBUCKET mode and notify the host 925 */ 926 and SXFRCTL1, ~BITBUCKET; 927 mvi INTSTAT,DATA_OVERRUN; 928 jmp ITloop; 929 930ultra2_dmafinish: 931 if ((ahc->features & AHC_ULTRA2) != 0) { | 881 } 882 883data_phase_finish: 884 if ((ahc->features & AHC_ULTRA2) != 0) { 885 call ultra2_dmafinish; 886 } 887/* 888 * After a DMA finishes, save the SG and STCNT residuals back into the SCB --- 35 unchanged lines hidden (view full) --- 924 * Turn off BITBUCKET mode and notify the host 925 */ 926 and SXFRCTL1, ~BITBUCKET; 927 mvi INTSTAT,DATA_OVERRUN; 928 jmp ITloop; 929 930ultra2_dmafinish: 931 if ((ahc->features & AHC_ULTRA2) != 0) { |
| 932 test DFCNTRL, DIRECTION jnz ultra2_dmahalt; | 932 test DFCNTRL, DIRECTION jnz ultra2_dmafifoempty; |
| 933 and DFCNTRL, ~SCSIEN; 934 test DFCNTRL, SCSIEN jnz .; 935ultra2_dmafifoflush: 936 or DFCNTRL, FIFOFLUSH; 937 /* 938 * The FIFOEMP status bit on the Ultra2 class 939 * of controllers seems to be a bit flaky. 940 * It appears that if the FIFO is full and the --- 58 unchanged lines hidden (view full) --- 999 } 1000 mvi DFCNTRL, (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET); 1001 } else { 1002 mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN|DIRECTION); 1003 } 1004cmd_loop: 1005 test SSTAT0, SDONE jnz . + 2; 1006 test SSTAT1, PHASEMIS jz cmd_loop; | 933 and DFCNTRL, ~SCSIEN; 934 test DFCNTRL, SCSIEN jnz .; 935ultra2_dmafifoflush: 936 or DFCNTRL, FIFOFLUSH; 937 /* 938 * The FIFOEMP status bit on the Ultra2 class 939 * of controllers seems to be a bit flaky. 940 * It appears that if the FIFO is full and the --- 58 unchanged lines hidden (view full) --- 999 } 1000 mvi DFCNTRL, (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET); 1001 } else { 1002 mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN|DIRECTION); 1003 } 1004cmd_loop: 1005 test SSTAT0, SDONE jnz . + 2; 1006 test SSTAT1, PHASEMIS jz cmd_loop; |
| 1007 and DFCNTRL, ~(SCSIEN|HDMAEN|SDMAEN); | 1007 /* 1008 * Wait for our ACK to go-away on it's own 1009 * instead of being killed by SCSIEN getting cleared. 1010 */ 1011 test SCSISIGI, ACKI jnz .; 1012 and DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN); |
| 1008 test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz .; 1009 jmp ITloop; 1010 1011/* 1012 * Status phase. Wait for the data byte to appear, then read it 1013 * and store it into the SCB. 1014 */ 1015p_status: --- 261 unchanged lines hidden (view full) --- 1277 jmp mesgin_done; 1278 1279/* 1280 * Identify message? For a reconnecting target, this tells us the lun 1281 * that the reconnection is for - find the correct SCB and switch to it, 1282 * clearing the "disconnected" bit so we don't "find" it by accident later. 1283 */ 1284mesgin_identify: | 1013 test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz .; 1014 jmp ITloop; 1015 1016/* 1017 * Status phase. Wait for the data byte to appear, then read it 1018 * and store it into the SCB. 1019 */ 1020p_status: --- 261 unchanged lines hidden (view full) --- 1282 jmp mesgin_done; 1283 1284/* 1285 * Identify message? For a reconnecting target, this tells us the lun 1286 * that the reconnection is for - find the correct SCB and switch to it, 1287 * clearing the "disconnected" bit so we don't "find" it by accident later. 1288 */ 1289mesgin_identify: |
| 1285 | |
| 1286 if ((ahc->features & AHC_WIDE) != 0) { 1287 and A,0x0f; /* lun in lower four bits */ 1288 } else { 1289 and A,0x07; /* lun in lower three bits */ 1290 } 1291 or SAVED_TCL,A; /* SAVED_TCL should be complete now */ 1292 1293 mvi ARG_2, SCB_LIST_NULL; /* SCBID of prev SCB in disc List */ --- 33 unchanged lines hidden (view full) --- 1327 */ 1328use_retrieveSCB: 1329 call retrieveSCB; 1330setup_SCB: 1331 mov A, SAVED_TCL; 1332 cmp SCB_TCL, A jne not_found_cleanup_scb; 1333 test SCB_CONTROL,DISCONNECTED jz not_found_cleanup_scb; 1334 and SCB_CONTROL,~DISCONNECTED; | 1290 if ((ahc->features & AHC_WIDE) != 0) { 1291 and A,0x0f; /* lun in lower four bits */ 1292 } else { 1293 and A,0x07; /* lun in lower three bits */ 1294 } 1295 or SAVED_TCL,A; /* SAVED_TCL should be complete now */ 1296 1297 mvi ARG_2, SCB_LIST_NULL; /* SCBID of prev SCB in disc List */ --- 33 unchanged lines hidden (view full) --- 1331 */ 1332use_retrieveSCB: 1333 call retrieveSCB; 1334setup_SCB: 1335 mov A, SAVED_TCL; 1336 cmp SCB_TCL, A jne not_found_cleanup_scb; 1337 test SCB_CONTROL,DISCONNECTED jz not_found_cleanup_scb; 1338 and SCB_CONTROL,~DISCONNECTED; |
| 1335 or SEQ_FLAGS,IDENTIFY_SEEN; /* make note of IDENTIFY */ | 1339 or SEQ_FLAGS,IDENTIFY_SEEN; /* make note of IDENTIFY */ |
| 1336 call set_transfer_settings; 1337 /* See if the host wants to send a message upon reconnection */ 1338 test SCB_CONTROL, MK_MESSAGE jz mesgin_done; 1339 and SCB_CONTROL, ~MK_MESSAGE; 1340 mvi HOST_MSG call mk_mesg; 1341 jmp mesgin_done; 1342 1343not_found_cleanup_scb: --- 106 unchanged lines hidden (view full) --- 1450 * during initialization. 1451 */ 1452dma: 1453 mov DFCNTRL,SINDEX; 1454dma_loop: 1455 test SSTAT0,DMADONE jnz dma_dmadone; 1456 test SSTAT1,PHASEMIS jz dma_loop; /* ie. underrun */ 1457dma_phasemis: | 1340 call set_transfer_settings; 1341 /* See if the host wants to send a message upon reconnection */ 1342 test SCB_CONTROL, MK_MESSAGE jz mesgin_done; 1343 and SCB_CONTROL, ~MK_MESSAGE; 1344 mvi HOST_MSG call mk_mesg; 1345 jmp mesgin_done; 1346 1347not_found_cleanup_scb: --- 106 unchanged lines hidden (view full) --- 1454 * during initialization. 1455 */ 1456dma: 1457 mov DFCNTRL,SINDEX; 1458dma_loop: 1459 test SSTAT0,DMADONE jnz dma_dmadone; 1460 test SSTAT1,PHASEMIS jz dma_loop; /* ie. underrun */ 1461dma_phasemis: |
| 1458 test SSTAT0,SDONE jnz dma_checkfifo; 1459 mov SINDEX,ALLZEROS; /* Notify caller of phasemiss */ | |
| 1460 1461/* 1462 * We will be "done" DMAing when the transfer count goes to zero, or 1463 * the target changes the phase (in light of this, it makes sense that 1464 * the DMA circuitry doesn't ACK when PHASEMIS is active). If we are 1465 * doing a SCSI->Host transfer, the data FIFO should be flushed auto- 1466 * magically on STCNT=0 or a phase change, so just wait for FIFO empty 1467 * status. --- 366 unchanged lines hidden --- | 1462 1463/* 1464 * We will be "done" DMAing when the transfer count goes to zero, or 1465 * the target changes the phase (in light of this, it makes sense that 1466 * the DMA circuitry doesn't ACK when PHASEMIS is active). If we are 1467 * doing a SCSI->Host transfer, the data FIFO should be flushed auto- 1468 * magically on STCNT=0 or a phase change, so just wait for FIFO empty 1469 * status. --- 366 unchanged lines hidden --- |