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aic7xxx.seq (50477) aic7xxx.seq (51471)
1/*
2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
3 *
4 * Copyright (c) 1994-1999 Justin Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
1/*
2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
3 *
4 * Copyright (c) 1994-1999 Justin Gibbs.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions

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27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 50477 1999-08-28 01:08:13Z peter $
35 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 51471 1999-09-20 18:57:04Z gibbs $
36 */
37
38#include <dev/aic7xxx/aic7xxx.reg>
39#include <cam/scsi/scsi_message.h>
40
41/*
42 * A few words on the waiting SCB list:
43 * After starting the selection hardware, we check for reconnecting targets

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674 /* clear target specific flags */
675 clr SEQ_FLAGS ret;
676
677/*
678 * If we re-enter the data phase after going through another phase, the
679 * STCNT may have been cleared, so restore it from the residual field.
680 */
681data_phase_reinit:
36 */
37
38#include <dev/aic7xxx/aic7xxx.reg>
39#include <cam/scsi/scsi_message.h>
40
41/*
42 * A few words on the waiting SCB list:
43 * After starting the selection hardware, we check for reconnecting targets

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674 /* clear target specific flags */
675 clr SEQ_FLAGS ret;
676
677/*
678 * If we re-enter the data phase after going through another phase, the
679 * STCNT may have been cleared, so restore it from the residual field.
680 */
681data_phase_reinit:
682 if ((ahc->features & AHC_CMD_CHAN) != 0) {
682 if ((ahc->features & AHC_ULTRA2) != 0) {
683 /*
684 * The preload circuitry requires us to
685 * reload the address too, so pull it from
686 * the shaddow address.
687 */
688 bmov HADDR, SHADDR, 4;
689 bmov HCNT, SCB_RESID_DCNT, 3;
690 } else if ((ahc->features & AHC_CMD_CHAN) != 0) {
683 bmov STCNT, SCB_RESID_DCNT, 3;
684 } else {
685 mvi DINDEX, STCNT;
686 mvi SCB_RESID_DCNT call bcopy_3;
687 }
688 and DATA_COUNT_ODD, 0x1, SCB_RESID_DCNT[0];
689 jmp data_phase_loop;
690

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923 mvi INTSTAT,DATA_OVERRUN;
924 jmp ITloop;
925
926ultra2_dmafinish:
927 if ((ahc->features & AHC_ULTRA2) != 0) {
928 test DFCNTRL, DIRECTION jnz ultra2_dmahalt;
929 and DFCNTRL, ~SCSIEN;
930 test DFCNTRL, SCSIEN jnz .;
691 bmov STCNT, SCB_RESID_DCNT, 3;
692 } else {
693 mvi DINDEX, STCNT;
694 mvi SCB_RESID_DCNT call bcopy_3;
695 }
696 and DATA_COUNT_ODD, 0x1, SCB_RESID_DCNT[0];
697 jmp data_phase_loop;
698

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931 mvi INTSTAT,DATA_OVERRUN;
932 jmp ITloop;
933
934ultra2_dmafinish:
935 if ((ahc->features & AHC_ULTRA2) != 0) {
936 test DFCNTRL, DIRECTION jnz ultra2_dmahalt;
937 and DFCNTRL, ~SCSIEN;
938 test DFCNTRL, SCSIEN jnz .;
939ultra2_dmafifoflush:
931 or DFCNTRL, FIFOFLUSH;
940 or DFCNTRL, FIFOFLUSH;
932 test DFSTATUS, FIFOEMP jz . - 1;
941 /*
942 * The FIFOEMP status bit on the Ultra2 class
943 * of controllers seems to be a bit flaky.
944 * It appears that if the FIFO is full and the
945 * transfer ends with some data in the REQ/ACK
946 * FIFO, FIFOEMP will fall temporarily
947 * as the data is transferred to the PCI bus.
948 * This glitch lasts for fewer than 5 clock cycles,
949 * so we work around the problem by ensuring the
950 * status bit stays false through a full glitch
951 * window.
952 */
953 test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
954 test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
955 test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
956 test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
957 test DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
958
959ultra2_dmafifoempty:
960 /* Don't clobber an inprogress host data transfer */
961 test DFSTATUS, MREQPEND jnz ultra2_dmafifoempty;
962
933ultra2_dmahalt:
934 and DFCNTRL, ~(SCSIEN|HDMAEN);
935 test DFCNTRL, HDMAEN jnz .;
936 ret;
937 }
938
939if ((ahc->flags & AHC_INITIATORMODE) != 0) {
940/*

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963ultra2_dmahalt:
964 and DFCNTRL, ~(SCSIEN|HDMAEN);
965 test DFCNTRL, HDMAEN jnz .;
966 ret;
967 }
968
969if ((ahc->flags & AHC_INITIATORMODE) != 0) {
970/*

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