| aic7xxx.seq (15709) | aic7xxx.seq (15843) |
|---|---|
| 1/*+M*********************************************************************** 2 *Adaptec 274x/284x/294x device driver for Linux and FreeBSD. 3 * 4 *Copyright (c) 1994 John Aycock 5 * The University of Calgary Department of Computer Science. 6 * All rights reserved. 7 * 8 *FreeBSD, Twin, Wide, 2 command per target support, tagged queuing, --- 25 unchanged lines hidden (view full) --- 34 *OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 *HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 *OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 *SUCH DAMAGE. 39 * 40 *-M************************************************************************/ 41 | 1/*+M*********************************************************************** 2 *Adaptec 274x/284x/294x device driver for Linux and FreeBSD. 3 * 4 *Copyright (c) 1994 John Aycock 5 * The University of Calgary Department of Computer Science. 6 * All rights reserved. 7 * 8 *FreeBSD, Twin, Wide, 2 command per target support, tagged queuing, --- 25 unchanged lines hidden (view full) --- 34 *OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 *HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 *LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 *OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 *SUCH DAMAGE. 39 * 40 *-M************************************************************************/ 41 |
| 42VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.33 1996/04/20 21:20:29 gibbs Exp $" | 42VERSION AIC7XXX_SEQ_VER "$Id: aic7xxx.seq,v 1.34 1996/05/10 16:11:01 gibbs Exp $" |
| 43 44#include "../../dev/aic7xxx/aic7xxx_reg.h" 45 46/* 47 * We can't just use ACCUM in the sequencer code because it 48 * must be treated specially by the assembler, and it currently 49 * looks for the symbol 'A'. This is the only register defined in 50 * the assembler's symbol space. --- 197 unchanged lines hidden (view full) --- 248 */ 249 or SXFRCTL0,CLRCHN 250/* 251 * Initialize SCSIRATE with the appropriate value for this target. 252 */ 253 call ndx_dtr 254 mov SCSIRATE,SINDIR 255 | 43 44#include "../../dev/aic7xxx/aic7xxx_reg.h" 45 46/* 47 * We can't just use ACCUM in the sequencer code because it 48 * must be treated specially by the assembler, and it currently 49 * looks for the symbol 'A'. This is the only register defined in 50 * the assembler's symbol space. --- 197 unchanged lines hidden (view full) --- 248 */ 249 or SXFRCTL0,CLRCHN 250/* 251 * Initialize SCSIRATE with the appropriate value for this target. 252 */ 253 call ndx_dtr 254 mov SCSIRATE,SINDIR 255 |
| 256/* 257 * Initialize Ultra mode setting. ndx_dtr has left our target mask 258 * in A. 259 */ 260 and SINDEX,0xdf,SXFRCTL0 /* default to Ultra disabled */ 261 test SCSIID, 0x80 jnz ultra_b /* Target ID > 7 */ 262 test SBLKCTL, SELBUSB jnz ultra_b /* Second channel device */ 263 test ULTRA_ENB,A jz set_sxfrctl0 264 or SINDEX, ULTRAEN jmp set_sxfrctl0 265ultra_b: 266 test ULTRA_ENB_B,A jz set_sxfrctl0 267 or SINDEX, ULTRAEN 268 269set_sxfrctl0: 270 mov SXFRCTL0,SINDEX 271 |
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| 256 mvi SCSISEQ,ENAUTOATNP /* 257 * ATN on parity errors 258 * for "in" phases 259 */ 260 mvi CLRSINT1,CLRBUSFREE 261 mvi CLRSINT0,0x60 /* CLRSELDI|CLRSELDO */ | 272 mvi SCSISEQ,ENAUTOATNP /* 273 * ATN on parity errors 274 * for "in" phases 275 */ 276 mvi CLRSINT1,CLRBUSFREE 277 mvi CLRSINT0,0x60 /* CLRSELDI|CLRSELDO */ |
| 262 | |
| 263/* 264 * Main loop for information transfer phases. If BSY is false, then 265 * we have a bus free condition, expected or not. Otherwise, wait 266 * for the target to assert REQ before checking MSG, C/D and I/O 267 * for the bus phase. 268 * 269 */ 270ITloop: --- 7 unchanged lines hidden (view full) --- 278 cmp ALLZEROS,A je p_dataout 279 cmp A,P_DATAIN je p_datain 280 cmp A,P_COMMAND je p_command 281 cmp A,P_MESGOUT je p_mesgout 282 cmp A,P_STATUS je p_status 283 cmp A,P_MESGIN je p_mesgin 284 285 mvi INTSTAT,BAD_PHASE /* unknown phase - signal driver */ | 278/* 279 * Main loop for information transfer phases. If BSY is false, then 280 * we have a bus free condition, expected or not. Otherwise, wait 281 * for the target to assert REQ before checking MSG, C/D and I/O 282 * for the bus phase. 283 * 284 */ 285ITloop: --- 7 unchanged lines hidden (view full) --- 293 cmp ALLZEROS,A je p_dataout 294 cmp A,P_DATAIN je p_datain 295 cmp A,P_COMMAND je p_command 296 cmp A,P_MESGOUT je p_mesgout 297 cmp A,P_STATUS je p_status 298 cmp A,P_MESGIN je p_mesgin 299 300 mvi INTSTAT,BAD_PHASE /* unknown phase - signal driver */ |
| 301 jmp ITloop /* Try reading the bus again. */ |
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| 286 287p_dataout: 288 mvi DMAPARAMS,0x7d /* 289 * WIDEODD|SCSIEN|SDMAEN|HDMAEN| 290 * DIRECTION|FIFORESET 291 */ 292 jmp data_phase_init 293 --- 808 unchanged lines hidden --- | 302 303p_dataout: 304 mvi DMAPARAMS,0x7d /* 305 * WIDEODD|SCSIEN|SDMAEN|HDMAEN| 306 * DIRECTION|FIFORESET 307 */ 308 jmp data_phase_init 309 --- 808 unchanged lines hidden --- |