| aic7xxx.seq (13177) | aic7xxx.seq (13251) |
|---|---|
| 1/*+M*********************************************************************** 2 *Adaptec 274x/284x/294x device driver for Linux and FreeBSD. 3 * 4 *Copyright (c) 1994 John Aycock 5 * The University of Calgary Department of Computer Science. 6 * All rights reserved. 7 * 8 *Modifications/enhancements: --- 866 unchanged lines hidden (view full) --- 875 * we send our ACK. 876 * 877 * The assumption here is that these are called in a particular sequence, 878 * and that REQ is already set when inb_first is called. inb_{first,next} 879 * use the same calling convention as inb. 880 */ 881 882inb_next: | 1/*+M*********************************************************************** 2 *Adaptec 274x/284x/294x device driver for Linux and FreeBSD. 3 * 4 *Copyright (c) 1994 John Aycock 5 * The University of Calgary Department of Computer Science. 6 * All rights reserved. 7 * 8 *Modifications/enhancements: --- 866 unchanged lines hidden (view full) --- 875 * we send our ACK. 876 * 877 * The assumption here is that these are called in a particular sequence, 878 * and that REQ is already set when inb_first is called. inb_{first,next} 879 * use the same calling convention as inb. 880 */ 881 882inb_next: |
| 883 mov NONE,SCSIDATL /*dummy read from latch to ACK*/ 884inb_first: | 883 call inb_last 884inb_next_wait: |
| 885 test SSTAT1,PHASEMIS jnz mesgin_phasemis | 885 test SSTAT1,PHASEMIS jnz mesgin_phasemis |
| 886 test SSTAT0,SPIORDY jz inb_first /* wait for next byte */ | 886 test SSTAT0,SPIORDY jz inb_next_wait /* wait for next byte */ 887inb_first: |
| 887 mov DINDEX,SINDEX 888 mov DINDIR,SCSIBUSL ret /*read byte directly from bus*/ 889inb_last: | 888 mov DINDEX,SINDEX 889 mov DINDIR,SCSIBUSL ret /*read byte directly from bus*/ 890inb_last: |
| 890 mov NONE,SCSIDATL ret /*dummy read from latch to ACK*/ | 891 clr STCNT2 892 clr STCNT1 893 mvi STCNT0,0x01 894 mov NONE,SCSIDATL /*dummy read from latch to ACK*/ 895inb_last_wait: 896 test SSTAT0,SDONE jz inb_last_wait /* Wait for completion */ 897 ret |
| 891 892 | 898 899 |
| 900 |
|
| 893mesgin_phasemis: 894/* 895 * We expected to receive another byte, but the target changed phase 896 */ 897 mvi INTSTAT, MSGIN_PHASEMIS 898 jmp ITloop 899 900/* --- 222 unchanged lines hidden --- | 901mesgin_phasemis: 902/* 903 * We expected to receive another byte, but the target changed phase 904 */ 905 mvi INTSTAT, MSGIN_PHASEMIS 906 jmp ITloop 907 908/* --- 222 unchanged lines hidden --- |