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aic7xxx.seq (102673) aic7xxx.seq (107420)
1/*
2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
3 *
4 * Copyright (c) 1994-2001 Justin T. Gibbs.
5 * Copyright (c) 2000-2001 Adaptec Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

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32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
37 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGES.
39 *
1/*
2 * Adaptec 274x/284x/294x device driver firmware for Linux and FreeBSD.
3 *
4 * Copyright (c) 1994-2001 Justin T. Gibbs.
5 * Copyright (c) 2000-2001 Adaptec Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

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32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
37 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGES.
39 *
40 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 102673 2002-08-31 06:43:15Z gibbs $
40 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.seq 107420 2002-11-30 19:30:09Z scottl $
41 */
42
41 */
42
43VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#50 $"
43VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#52 $"
44PATCH_ARG_LIST = "struct ahc_softc *ahc"
45PREFIX = "ahc_"
46
47#include "aic7xxx.reg"
48#include "scsi_message.h"
49
50/*
51 * A few words on the waiting SCB list:

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301
302ident_messages_done:
303 /* Terminate the ident list */
304 if ((ahc->features & AHC_CMD_CHAN) != 0) {
305 mvi CCSCBRAM, SCB_LIST_NULL;
306 } else {
307 mvi DFDAT, SCB_LIST_NULL;
308 }
44PATCH_ARG_LIST = "struct ahc_softc *ahc"
45PREFIX = "ahc_"
46
47#include "aic7xxx.reg"
48#include "scsi_message.h"
49
50/*
51 * A few words on the waiting SCB list:

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301
302ident_messages_done:
303 /* Terminate the ident list */
304 if ((ahc->features & AHC_CMD_CHAN) != 0) {
305 mvi CCSCBRAM, SCB_LIST_NULL;
306 } else {
307 mvi DFDAT, SCB_LIST_NULL;
308 }
309 or SEQ_FLAGS, TARG_CMD_PENDING|IDENTIFY_SEEN;
309 mvi SEQ_FLAGS, TARG_CMD_PENDING;
310 test SEQ_FLAGS2, TARGET_MSG_PENDING
311 jnz target_mesgout_pending;
312 test SCSISIGI, ATNI jnz target_mesgout_continue;
313 jmp target_ITloop;
314
315
316ident_messages_done_msg_pending:
317 or SEQ_FLAGS2, TARGET_MSG_PENDING;

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643initiator_select:
644 or SXFRCTL0, SPIOEN|CLRSTCNT|CLRCHN;
645 /*
646 * As soon as we get a successful selection, the target
647 * should go into the message out phase since we have ATN
648 * asserted.
649 */
650 mvi MSG_OUT, MSG_IDENTIFYFLAG;
310 test SEQ_FLAGS2, TARGET_MSG_PENDING
311 jnz target_mesgout_pending;
312 test SCSISIGI, ATNI jnz target_mesgout_continue;
313 jmp target_ITloop;
314
315
316ident_messages_done_msg_pending:
317 or SEQ_FLAGS2, TARGET_MSG_PENDING;

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643initiator_select:
644 or SXFRCTL0, SPIOEN|CLRSTCNT|CLRCHN;
645 /*
646 * As soon as we get a successful selection, the target
647 * should go into the message out phase since we have ATN
648 * asserted.
649 */
650 mvi MSG_OUT, MSG_IDENTIFYFLAG;
651 or SEQ_FLAGS, IDENTIFY_SEEN;
651 mvi SEQ_FLAGS, NO_CDB_SENT;
652 mvi CLRSINT0, CLRSELDO;
653
654 /*
655 * Main loop for information transfer phases. Wait for the
656 * target to assert REQ before checking MSG, C/D and I/O for
657 * the bus phase.
658 */
659mesgin_phasemis:

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702 } else {
703 clr SCSIRATE;
704 if ((ahc->features & AHC_ULTRA) != 0) {
705 and SXFRCTL0, ~(FAST20);
706 }
707 }
708 mvi LASTPHASE, P_BUSFREE;
709 /* clear target specific flags */
652 mvi CLRSINT0, CLRSELDO;
653
654 /*
655 * Main loop for information transfer phases. Wait for the
656 * target to assert REQ before checking MSG, C/D and I/O for
657 * the bus phase.
658 */
659mesgin_phasemis:

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702 } else {
703 clr SCSIRATE;
704 if ((ahc->features & AHC_ULTRA) != 0) {
705 and SXFRCTL0, ~(FAST20);
706 }
707 }
708 mvi LASTPHASE, P_BUSFREE;
709 /* clear target specific flags */
710 clr SEQ_FLAGS ret;
710 mvi SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT ret;
711
712sg_advance:
713 clr A; /* add sizeof(struct scatter) */
714 add SCB_RESIDUAL_SGPTR[0],SG_SIZEOF;
715 adc SCB_RESIDUAL_SGPTR[1],A;
716 adc SCB_RESIDUAL_SGPTR[2],A;
717 adc SCB_RESIDUAL_SGPTR[3],A ret;
718

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816 not A;
817 inc A;
818 add HCNT[0], A;
819 adc HCNT[1], -1;
820 adc HCNT[2], -1 ret;
821}
822
823p_data:
711
712sg_advance:
713 clr A; /* add sizeof(struct scatter) */
714 add SCB_RESIDUAL_SGPTR[0],SG_SIZEOF;
715 adc SCB_RESIDUAL_SGPTR[1],A;
716 adc SCB_RESIDUAL_SGPTR[2],A;
717 adc SCB_RESIDUAL_SGPTR[3],A ret;
718

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816 not A;
817 inc A;
818 add HCNT[0], A;
819 adc HCNT[1], -1;
820 adc HCNT[2], -1 ret;
821}
822
823p_data:
824 test SEQ_FLAGS,IDENTIFY_SEEN jnz p_data_okay;
825 mvi NO_IDENT jmp set_seqint;
826p_data_okay:
824 test SEQ_FLAGS,NOT_IDENTIFIED|NO_CDB_SENT jz p_data_allowed;
825 mvi PROTO_VIOLATION call set_seqint;
826p_data_allowed:
827 if ((ahc->features & AHC_ULTRA2) != 0) {
828 mvi DMAPARAMS, PRELOADEN|SCSIEN|HDMAEN;
829 } else {
830 mvi DMAPARAMS, WIDEODD|SCSIEN|SDMAEN|HDMAEN|FIFORESET;
831 }
832 test LASTPHASE, IOI jnz . + 2;
833 or DMAPARAMS, DIRECTION;
834 if ((ahc->features & AHC_CMD_CHAN) != 0) {

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1362 jmp ITloop;
1363 }
1364
1365if ((ahc->flags & AHC_INITIATORROLE) != 0) {
1366/*
1367 * Command phase. Set up the DMA registers and let 'er rip.
1368 */
1369p_command:
827 if ((ahc->features & AHC_ULTRA2) != 0) {
828 mvi DMAPARAMS, PRELOADEN|SCSIEN|HDMAEN;
829 } else {
830 mvi DMAPARAMS, WIDEODD|SCSIEN|SDMAEN|HDMAEN|FIFORESET;
831 }
832 test LASTPHASE, IOI jnz . + 2;
833 or DMAPARAMS, DIRECTION;
834 if ((ahc->features & AHC_CMD_CHAN) != 0) {

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1362 jmp ITloop;
1363 }
1364
1365if ((ahc->flags & AHC_INITIATORROLE) != 0) {
1366/*
1367 * Command phase. Set up the DMA registers and let 'er rip.
1368 */
1369p_command:
1370 test SEQ_FLAGS,IDENTIFY_SEEN jnz p_command_okay;
1371 mvi NO_IDENT jmp set_seqint;
1370 test SEQ_FLAGS, NOT_IDENTIFIED jz p_command_okay;
1371 mvi PROTO_VIOLATION call set_seqint;
1372p_command_okay:
1373
1374 if ((ahc->features & AHC_ULTRA2) != 0) {
1375 bmov HCNT[0], SCB_CDB_LEN, 1;
1376 bmov HCNT[1], ALLZEROS, 2;
1377 mvi SG_CACHE_PRE, LAST_SEG;
1378 } else if ((ahc->features & AHC_CMD_CHAN) != 0) {
1379 bmov STCNT[0], SCB_CDB_LEN, 1;

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1395 bmov HCNT, STCNT, 3;
1396 } else {
1397 mvi DINDEX, HADDR;
1398 mvi SCB_CDB_PTR call bcopy_4;
1399 mov SCB_CDB_LEN call set_hcnt;
1400 }
1401 mvi DFCNTRL, (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET);
1402 }
1372p_command_okay:
1373
1374 if ((ahc->features & AHC_ULTRA2) != 0) {
1375 bmov HCNT[0], SCB_CDB_LEN, 1;
1376 bmov HCNT[1], ALLZEROS, 2;
1377 mvi SG_CACHE_PRE, LAST_SEG;
1378 } else if ((ahc->features & AHC_CMD_CHAN) != 0) {
1379 bmov STCNT[0], SCB_CDB_LEN, 1;

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1395 bmov HCNT, STCNT, 3;
1396 } else {
1397 mvi DINDEX, HADDR;
1398 mvi SCB_CDB_PTR call bcopy_4;
1399 mov SCB_CDB_LEN call set_hcnt;
1400 }
1401 mvi DFCNTRL, (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET);
1402 }
1403 jmp p_command_loop;
1403 jmp p_command_xfer;
1404p_command_embedded:
1405 /*
1406 * The data fifo seems to require 4 byte aligned
1407 * transfers from the sequencer. Force this to
1408 * be the case by clearing HADDR[0] even though
1409 * we aren't going to touch host memory.
1410 */
1411 clr HADDR[0];

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1433 or DFCNTRL, FIFOFLUSH;
1434 }
1435 } else {
1436 mvi DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFORESET);
1437 call copy_to_fifo_6;
1438 call copy_to_fifo_6;
1439 or DFCNTRL, FIFOFLUSH;
1440 }
1404p_command_embedded:
1405 /*
1406 * The data fifo seems to require 4 byte aligned
1407 * transfers from the sequencer. Force this to
1408 * be the case by clearing HADDR[0] even though
1409 * we aren't going to touch host memory.
1410 */
1411 clr HADDR[0];

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1433 or DFCNTRL, FIFOFLUSH;
1434 }
1435 } else {
1436 mvi DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFORESET);
1437 call copy_to_fifo_6;
1438 call copy_to_fifo_6;
1439 or DFCNTRL, FIFOFLUSH;
1440 }
1441p_command_loop:
1441p_command_xfer:
1442 and SEQ_FLAGS, ~NO_CDB_SENT;
1442 if ((ahc->features & AHC_DT) == 0) {
1443 test SSTAT0, SDONE jnz . + 2;
1443 if ((ahc->features & AHC_DT) == 0) {
1444 test SSTAT0, SDONE jnz . + 2;
1444 test SSTAT1, PHASEMIS jz p_command_loop;
1445 test SSTAT1, PHASEMIS jz . - 1;
1445 /*
1446 * Wait for our ACK to go-away on it's own
1447 * instead of being killed by SCSIEN getting cleared.
1448 */
1449 test SCSISIGI, ACKI jnz .;
1450 } else {
1446 /*
1447 * Wait for our ACK to go-away on it's own
1448 * instead of being killed by SCSIEN getting cleared.
1449 */
1450 test SCSISIGI, ACKI jnz .;
1451 } else {
1451 test DFCNTRL, SCSIEN jnz p_command_loop;
1452 test DFCNTRL, SCSIEN jnz .;
1452 }
1453 }
1454 test SSTAT0, SDONE jnz p_command_successful;
1455 /*
1456 * Don't allow a data phase if the command
1457 * was not fully transferred.
1458 */
1459 or SEQ_FLAGS, NO_CDB_SENT;
1460p_command_successful:
1453 and DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN);
1454 test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz .;
1461 and DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN);
1462 test DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz .;
1455 if ((ahc->features & AHC_ULTRA2) != 0) {
1456 /* Drop any residual from the S/G Preload queue */
1457 or SXFRCTL0, CLRSTCNT;
1458 }
1459 jmp ITloop;
1460
1461/*
1462 * Status phase. Wait for the data byte to appear, then read it
1463 * and store it into the SCB.
1464 */
1465p_status:
1463 jmp ITloop;
1464
1465/*
1466 * Status phase. Wait for the data byte to appear, then read it
1467 * and store it into the SCB.
1468 */
1469p_status:
1466 test SEQ_FLAGS,IDENTIFY_SEEN jnz p_status_okay;
1467 mvi NO_IDENT jmp set_seqint;
1470 test SEQ_FLAGS, NOT_IDENTIFIED jnz mesgin_proto_violation;
1468p_status_okay:
1469 mov SCB_SCSI_STATUS, SCSIDATL;
1471p_status_okay:
1472 mov SCB_SCSI_STATUS, SCSIDATL;
1473 or SCB_CONTROL, STATUS_RCVD;
1470 jmp ITloop;
1471
1472/*
1473 * Message out phase. If MSG_OUT is MSG_IDENTIFYFLAG, build a full
1474 * indentify message sequence and send it to the target. The host may
1475 * override this behavior by setting the MK_MESSAGE bit in the SCB
1476 * control byte. This will cause us to interrupt the host and allow
1477 * it to handle the message phase completely on its own. If the bit

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1582 mvi ARG_1 call inb_next;
1583 cmp ARG_1, 0x01 jne mesgin_reject;
1584 test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz . + 2;
1585 test DATA_COUNT_ODD, 0x1 jz mesgin_done;
1586 mvi IGN_WIDE_RES call set_seqint;
1587 jmp mesgin_done;
1588}
1589
1474 jmp ITloop;
1475
1476/*
1477 * Message out phase. If MSG_OUT is MSG_IDENTIFYFLAG, build a full
1478 * indentify message sequence and send it to the target. The host may
1479 * override this behavior by setting the MK_MESSAGE bit in the SCB
1480 * control byte. This will cause us to interrupt the host and allow
1481 * it to handle the message phase completely on its own. If the bit

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1586 mvi ARG_1 call inb_next;
1587 cmp ARG_1, 0x01 jne mesgin_reject;
1588 test SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz . + 2;
1589 test DATA_COUNT_ODD, 0x1 jz mesgin_done;
1590 mvi IGN_WIDE_RES call set_seqint;
1591 jmp mesgin_done;
1592}
1593
1594mesgin_proto_violation:
1595 mvi PROTO_VIOLATION call set_seqint;
1596 jmp mesgin_done;
1590mesgin_reject:
1591 mvi MSG_MESSAGE_REJECT call mk_mesg;
1592mesgin_done:
1593 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1594 jmp ITloop;
1595
1597mesgin_reject:
1598 mvi MSG_MESSAGE_REJECT call mk_mesg;
1599mesgin_done:
1600 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1601 jmp ITloop;
1602
1596mesgin_complete:
1597/*
1598 * We received a "command complete" message. Put the SCB_TAG into the QOUTFIFO,
1599 * and trigger a completion interrupt. Before doing so, check to see if there
1600 * is a residual or the status byte is something other than STATUS_GOOD (0).
1601 * In either of these conditions, we upload the SCB back to the host so it can
1602 * process this information. In the case of a non zero status byte, we
1603 * additionally interrupt the kernel driver synchronously, allowing it to
1604 * decide if sense should be retrieved. If the kernel driver wishes to request
1605 * sense, it will fill the kernel SCB with a request sense command, requeue
1606 * it to the QINFIFO and tell us not to post to the QOUTFIFO by setting
1607 * RETURN_1 to SEND_SENSE.
1608 */
1603/*
1604 * We received a "command complete" message. Put the SCB_TAG into the QOUTFIFO,
1605 * and trigger a completion interrupt. Before doing so, check to see if there
1606 * is a residual or the status byte is something other than STATUS_GOOD (0).
1607 * In either of these conditions, we upload the SCB back to the host so it can
1608 * process this information. In the case of a non zero status byte, we
1609 * additionally interrupt the kernel driver synchronously, allowing it to
1610 * decide if sense should be retrieved. If the kernel driver wishes to request
1611 * sense, it will fill the kernel SCB with a request sense command, requeue
1612 * it to the QINFIFO and tell us not to post to the QOUTFIFO by setting
1613 * RETURN_1 to SEND_SENSE.
1614 */
1615mesgin_complete:
1609
1616
1610/*
1611 * If ATN is raised, we still want to give the target a message.
1612 * Perhaps there was a parity error on this last message byte.
1613 * Either way, the target should take us to message out phase
1614 * and then attempt to complete the command again. We should use a
1615 * critical section here to guard against a timeout triggering
1616 * for this command and setting ATN while we are still processing
1617 * the completion.
1617 /*
1618 * If ATN is raised, we still want to give the target a message.
1619 * Perhaps there was a parity error on this last message byte.
1620 * Either way, the target should take us to message out phase
1621 * and then attempt to complete the command again. We should use a
1622 * critical section here to guard against a timeout triggering
1623 * for this command and setting ATN while we are still processing
1624 * the completion.
1618 test SCSISIGI, ATNI jnz mesgin_done;
1625 test SCSISIGI, ATNI jnz mesgin_done;
1619 */
1626 */
1620
1627
1621/*
1622 * See if we attempted to deliver a message but the target ingnored us.
1623 */
1628 /*
1629 * If we are identified and have successfully sent the CDB,
1630 * any status will do. Optimize this fast path.
1631 */
1632 test SCB_CONTROL, STATUS_RCVD jz mesgin_proto_violation;
1633 test SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT jz complete_accepted;
1634
1635 /*
1636 * If the target never sent an identify message but instead went
1637 * to mesgin to give an invalid message, let the host abort us.
1638 */
1639 test SEQ_FLAGS, NOT_IDENTIFIED jnz mesgin_proto_violation;
1640
1641 /*
1642 * If we recevied good status but never successfully sent the
1643 * cdb, abort the command.
1644 */
1645 test SCB_SCSI_STATUS,0xff jnz complete_accepted;
1646 test SEQ_FLAGS, NO_CDB_SENT jnz mesgin_proto_violation;
1647
1648complete_accepted:
1649 /*
1650 * See if we attempted to deliver a message but the target ingnored us.
1651 */
1624 test SCB_CONTROL, MK_MESSAGE jz . + 2;
1625 mvi MKMSG_FAILED call set_seqint;
1626
1652 test SCB_CONTROL, MK_MESSAGE jz . + 2;
1653 mvi MKMSG_FAILED call set_seqint;
1654
1627/*
1628 * Check for residuals
1629 */
1655 /*
1656 * Check for residuals
1657 */
1630 test SCB_SGPTR, SG_LIST_NULL jnz check_status;/* No xfer */
1631 test SCB_SGPTR, SG_FULL_RESID jnz upload_scb;/* Never xfered */
1632 test SCB_RESIDUAL_SGPTR, SG_LIST_NULL jz upload_scb;
1633check_status:
1634 test SCB_SCSI_STATUS,0xff jz complete; /* Good Status? */
1635upload_scb:
1636 or SCB_SGPTR, SG_RESID_VALID;
1637 mvi DMAPARAMS, FIFORESET;

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1674 * If ATN is raised, we still want to give the target a message.
1675 * Perhaps there was a parity error on this last message byte
1676 * or we want to abort this command. Either way, the target
1677 * should take us to message out phase and then attempt to
1678 * disconnect again.
1679 * XXX - Wait for more testing.
1680 test SCSISIGI, ATNI jnz mesgin_done;
1681 */
1658 test SCB_SGPTR, SG_LIST_NULL jnz check_status;/* No xfer */
1659 test SCB_SGPTR, SG_FULL_RESID jnz upload_scb;/* Never xfered */
1660 test SCB_RESIDUAL_SGPTR, SG_LIST_NULL jz upload_scb;
1661check_status:
1662 test SCB_SCSI_STATUS,0xff jz complete; /* Good Status? */
1663upload_scb:
1664 or SCB_SGPTR, SG_RESID_VALID;
1665 mvi DMAPARAMS, FIFORESET;

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1702 * If ATN is raised, we still want to give the target a message.
1703 * Perhaps there was a parity error on this last message byte
1704 * or we want to abort this command. Either way, the target
1705 * should take us to message out phase and then attempt to
1706 * disconnect again.
1707 * XXX - Wait for more testing.
1708 test SCSISIGI, ATNI jnz mesgin_done;
1709 */
1682
1710 test SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT
1711 jnz mesgin_proto_violation;
1683 or SCB_CONTROL,DISCONNECTED;
1684 if ((ahc->flags & AHC_PAGESCBS) != 0) {
1685 call add_scb_to_disc_list;
1686 }
1687 test SCB_CONTROL, TAG_ENB jnz await_busfree;
1688 mov ARG_1, SCB_TAG;
1689 mov SAVED_LUN, SCB_LUN;
1690 mov SCB_SCSIID call set_busy_target;

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1742 mvi SCB_RESIDUAL_DATACNT call bcopy_8;
1743 }
1744 jmp ITloop;
1745
1746/*
1747 * Restore pointers message? Data pointers are recopied from the
1748 * SCB anytime we enter a data phase for the first time, so all
1749 * we need to do is clear the DPHASE flag and let the data phase
1712 or SCB_CONTROL,DISCONNECTED;
1713 if ((ahc->flags & AHC_PAGESCBS) != 0) {
1714 call add_scb_to_disc_list;
1715 }
1716 test SCB_CONTROL, TAG_ENB jnz await_busfree;
1717 mov ARG_1, SCB_TAG;
1718 mov SAVED_LUN, SCB_LUN;
1719 mov SCB_SCSIID call set_busy_target;

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1771 mvi SCB_RESIDUAL_DATACNT call bcopy_8;
1772 }
1773 jmp ITloop;
1774
1775/*
1776 * Restore pointers message? Data pointers are recopied from the
1777 * SCB anytime we enter a data phase for the first time, so all
1778 * we need to do is clear the DPHASE flag and let the data phase
1750 * code do the rest.
1779 * code do the rest. We also reset/reallocate the FIFO to make
1780 * sure we have a clean start for the next data or command phase.
1751 */
1752mesgin_rdptrs:
1753 and SEQ_FLAGS, ~DPHASE; /*
1754 * We'll reload them
1755 * the next time through
1756 * the dataphase.
1757 */
1781 */
1782mesgin_rdptrs:
1783 and SEQ_FLAGS, ~DPHASE; /*
1784 * We'll reload them
1785 * the next time through
1786 * the dataphase.
1787 */
1788 or SXFRCTL0, CLRSTCNT|CLRCHN;
1758 jmp mesgin_done;
1759
1760/*
1761 * Index into our Busy Target table. SINDEX and DINDEX are modified
1762 * upon return. SCBPTR may be modified by this action.
1763 */
1764set_busy_target:
1765 shr DINDEX, 4, SINDEX;

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1898 mov A, SCBPTR;
1899 }
1900 mvi ARG_1, SCB_LIST_NULL;
1901 mov SAVED_SCSIID call set_busy_target;
1902 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1903 mov SCBPTR, A;
1904 }
1905setup_SCB_tagged:
1789 jmp mesgin_done;
1790
1791/*
1792 * Index into our Busy Target table. SINDEX and DINDEX are modified
1793 * upon return. SCBPTR may be modified by this action.
1794 */
1795set_busy_target:
1796 shr DINDEX, 4, SINDEX;

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1929 mov A, SCBPTR;
1930 }
1931 mvi ARG_1, SCB_LIST_NULL;
1932 mov SAVED_SCSIID call set_busy_target;
1933 if ((ahc->flags & AHC_SCB_BTT) != 0) {
1934 mov SCBPTR, A;
1935 }
1936setup_SCB_tagged:
1906 mvi SEQ_FLAGS,IDENTIFY_SEEN; /* make note of IDENTIFY */
1937 clr SEQ_FLAGS; /* make note of IDENTIFY */
1907 call set_transfer_settings;
1908 /* See if the host wants to send a message upon reconnection */
1909 test SCB_CONTROL, MK_MESSAGE jz mesgin_done;
1910 mvi HOST_MSG call mk_mesg;
1911 jmp mesgin_done;
1912
1913not_found_cleanup_scb:
1914 if ((ahc->flags & AHC_PAGESCBS) != 0) {

--- 456 unchanged lines hidden ---
1938 call set_transfer_settings;
1939 /* See if the host wants to send a message upon reconnection */
1940 test SCB_CONTROL, MK_MESSAGE jz mesgin_done;
1941 mvi HOST_MSG call mk_mesg;
1942 jmp mesgin_done;
1943
1944not_found_cleanup_scb:
1945 if ((ahc->flags & AHC_PAGESCBS) != 0) {

--- 456 unchanged lines hidden ---