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aic7xxx.c (108479) aic7xxx.c (109590)
1/*
2 * Core routines and tables shareable across OS platforms.
3 *
4 * Copyright (c) 1994-2002 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

--- 23 unchanged lines hidden (view full) ---

32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
37 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGES.
39 *
1/*
2 * Core routines and tables shareable across OS platforms.
3 *
4 * Copyright (c) 1994-2002 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

--- 23 unchanged lines hidden (view full) ---

32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
37 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGES.
39 *
40 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#100 $
40 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#112 $
41 *
41 *
42 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.c 108479 2002-12-31 04:22:36Z scottl $
42 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.c 109590 2003-01-20 20:44:55Z gibbs $
43 */
44
45#ifdef __linux__
46#include "aic7xxx_osm.h"
47#include "aic7xxx_inline.h"
48#include "aicasm/aicasm_insformat.h"
49#else
50#include <dev/aic7xxx/aic7xxx_osm.h>

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225static void ahc_dumpseq(struct ahc_softc *ahc);
226#endif
227static void ahc_loadseq(struct ahc_softc *ahc);
228static int ahc_check_patch(struct ahc_softc *ahc,
229 struct patch **start_patch,
230 u_int start_instr, u_int *skip_addr);
231static void ahc_download_instr(struct ahc_softc *ahc,
232 u_int instrptr, uint8_t *dconsts);
43 */
44
45#ifdef __linux__
46#include "aic7xxx_osm.h"
47#include "aic7xxx_inline.h"
48#include "aicasm/aicasm_insformat.h"
49#else
50#include <dev/aic7xxx/aic7xxx_osm.h>

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225static void ahc_dumpseq(struct ahc_softc *ahc);
226#endif
227static void ahc_loadseq(struct ahc_softc *ahc);
228static int ahc_check_patch(struct ahc_softc *ahc,
229 struct patch **start_patch,
230 u_int start_instr, u_int *skip_addr);
231static void ahc_download_instr(struct ahc_softc *ahc,
232 u_int instrptr, uint8_t *dconsts);
233static int ahc_probe_stack_size(struct ahc_softc *ahc);
234#ifdef AHC_TARGET_MODE
235static void ahc_queue_lstate_event(struct ahc_softc *ahc,
236 struct ahc_tmode_lstate *lstate,
237 u_int initiator_id,
238 u_int event_type,
239 u_int event_arg);
240static void ahc_update_scsiid(struct ahc_softc *ahc,
241 u_int targid_mask);

--- 793 unchanged lines hidden (view full) ---

1035 */
1036 u_int mesg_out;
1037 u_int curphase;
1038 u_int errorphase;
1039 u_int lastphase;
1040 u_int scsirate;
1041 u_int i;
1042 u_int sstat2;
233#ifdef AHC_TARGET_MODE
234static void ahc_queue_lstate_event(struct ahc_softc *ahc,
235 struct ahc_tmode_lstate *lstate,
236 u_int initiator_id,
237 u_int event_type,
238 u_int event_arg);
239static void ahc_update_scsiid(struct ahc_softc *ahc,
240 u_int targid_mask);

--- 793 unchanged lines hidden (view full) ---

1034 */
1035 u_int mesg_out;
1036 u_int curphase;
1037 u_int errorphase;
1038 u_int lastphase;
1039 u_int scsirate;
1040 u_int i;
1041 u_int sstat2;
1042 int silent;
1043
1044 lastphase = ahc_inb(ahc, LASTPHASE);
1045 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
1046 sstat2 = ahc_inb(ahc, SSTAT2);
1047 ahc_outb(ahc, CLRSINT1, CLRSCSIPERR);
1048 /*
1049 * For all phases save DATA, the sequencer won't
1050 * automatically ack a byte that has a parity error

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1062 else
1063 errorphase = lastphase;
1064
1065 for (i = 0; i < num_phases; i++) {
1066 if (errorphase == ahc_phase_table[i].phase)
1067 break;
1068 }
1069 mesg_out = ahc_phase_table[i].mesg_out;
1043
1044 lastphase = ahc_inb(ahc, LASTPHASE);
1045 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
1046 sstat2 = ahc_inb(ahc, SSTAT2);
1047 ahc_outb(ahc, CLRSINT1, CLRSCSIPERR);
1048 /*
1049 * For all phases save DATA, the sequencer won't
1050 * automatically ack a byte that has a parity error

--- 11 unchanged lines hidden (view full) ---

1062 else
1063 errorphase = lastphase;
1064
1065 for (i = 0; i < num_phases; i++) {
1066 if (errorphase == ahc_phase_table[i].phase)
1067 break;
1068 }
1069 mesg_out = ahc_phase_table[i].mesg_out;
1070 silent = FALSE;
1070 if (scb != NULL) {
1071 if (scb != NULL) {
1071 ahc_print_path(ahc, scb);
1072 if (SCB_IS_SILENT(scb))
1073 silent = TRUE;
1074 else
1075 ahc_print_path(ahc, scb);
1072 scb->flags |= SCB_TRANSMISSION_ERROR;
1073 } else
1074 printf("%s:%c:%d: ", ahc_name(ahc), intr_channel,
1075 SCSIID_TARGET(ahc, ahc_inb(ahc, SAVED_SCSIID)));
1076 scsirate = ahc_inb(ahc, SCSIRATE);
1076 scb->flags |= SCB_TRANSMISSION_ERROR;
1077 } else
1078 printf("%s:%c:%d: ", ahc_name(ahc), intr_channel,
1079 SCSIID_TARGET(ahc, ahc_inb(ahc, SAVED_SCSIID)));
1080 scsirate = ahc_inb(ahc, SCSIRATE);
1077 printf("parity error detected %s. "
1078 "SEQADDR(0x%x) SCSIRATE(0x%x)\n",
1079 ahc_phase_table[i].phasemsg,
1080 ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8),
1081 scsirate);
1082
1083 if ((ahc->features & AHC_DT) != 0) {
1084
1085 if ((sstat2 & CRCVALERR) != 0)
1086 printf("\tCRC Value Mismatch\n");
1087 if ((sstat2 & CRCENDERR) != 0)
1088 printf("\tNo terminal CRC packet recevied\n");
1089 if ((sstat2 & CRCREQERR) != 0)
1090 printf("\tIllegal CRC packet request\n");
1091 if ((sstat2 & DUAL_EDGE_ERR) != 0) {
1092 printf("\tUnexpected %sDT Data Phase\n",
1093 (scsirate & SINGLE_EDGE) ? "" : "non-");
1094 /*
1095 * This error applies regardless of
1096 * data direction, so ignore the value
1097 * in the phase table.
1098 */
1099 mesg_out = MSG_INITIATOR_DET_ERR;
1081 if (silent == FALSE) {
1082 printf("parity error detected %s. "
1083 "SEQADDR(0x%x) SCSIRATE(0x%x)\n",
1084 ahc_phase_table[i].phasemsg,
1085 ahc_inw(ahc, SEQADDR0),
1086 scsirate);
1087 if ((ahc->features & AHC_DT) != 0) {
1088 if ((sstat2 & CRCVALERR) != 0)
1089 printf("\tCRC Value Mismatch\n");
1090 if ((sstat2 & CRCENDERR) != 0)
1091 printf("\tNo terminal CRC packet "
1092 "recevied\n");
1093 if ((sstat2 & CRCREQERR) != 0)
1094 printf("\tIllegal CRC packet "
1095 "request\n");
1096 if ((sstat2 & DUAL_EDGE_ERR) != 0)
1097 printf("\tUnexpected %sDT Data Phase\n",
1098 (scsirate & SINGLE_EDGE)
1099 ? "" : "non-");
1100 }
1101 }
1102
1100 }
1101 }
1102
1103 if ((ahc->features & AHC_DT) != 0
1104 && (sstat2 & DUAL_EDGE_ERR) != 0) {
1105 /*
1106 * This error applies regardless of
1107 * data direction, so ignore the value
1108 * in the phase table.
1109 */
1110 mesg_out = MSG_INITIATOR_DET_ERR;
1111 }
1112
1103 /*
1104 * We've set the hardware to assert ATN if we
1105 * get a parity error on "in" phases, so all we
1106 * need to do is stuff the message buffer with
1107 * the appropriate message. "In" phases have set
1108 * mesg_out to something other than MSG_NOP.
1109 */
1110 if (mesg_out != MSG_NOOP) {

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1150
1151 scb = ahc_lookup_scb(ahc, scb_index);
1152 if (scb == NULL) {
1153 printf("%s: ahc_intr - referenced scb not "
1154 "valid during SELTO scb(%d, %d)\n",
1155 ahc_name(ahc), scbptr, scb_index);
1156 ahc_dump_card_state(ahc);
1157 } else {
1113 /*
1114 * We've set the hardware to assert ATN if we
1115 * get a parity error on "in" phases, so all we
1116 * need to do is stuff the message buffer with
1117 * the appropriate message. "In" phases have set
1118 * mesg_out to something other than MSG_NOP.
1119 */
1120 if (mesg_out != MSG_NOOP) {

--- 39 unchanged lines hidden (view full) ---

1160
1161 scb = ahc_lookup_scb(ahc, scb_index);
1162 if (scb == NULL) {
1163 printf("%s: ahc_intr - referenced scb not "
1164 "valid during SELTO scb(%d, %d)\n",
1165 ahc_name(ahc), scbptr, scb_index);
1166 ahc_dump_card_state(ahc);
1167 } else {
1168#ifdef AHC_DEBUG
1169 if ((ahc_debug & AHC_SHOW_SELTO) != 0) {
1170 ahc_print_path(ahc, scb);
1171 printf("Saw Selection Timeout for SCB 0x%x\n",
1172 scb_index);
1173 }
1174#endif
1158 /*
1159 * Force a renegotiation with this target just in
1160 * case the cable was pulled and will later be
1161 * re-attached. The target may forget its negotiation
1162 * settings with us should it attempt to reselect
1163 * during the interruption. The target will not issue
1164 * a unit attention in this case, so we must always
1165 * renegotiate.
1166 */
1167 ahc_force_renegotiation(ahc);
1168 ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
1169 ahc_freeze_devq(ahc, scb);
1175 /*
1176 * Force a renegotiation with this target just in
1177 * case the cable was pulled and will later be
1178 * re-attached. The target may forget its negotiation
1179 * settings with us should it attempt to reselect
1180 * during the interruption. The target will not issue
1181 * a unit attention in this case, so we must always
1182 * renegotiate.
1183 */
1184 ahc_force_renegotiation(ahc);
1185 ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
1186 ahc_freeze_devq(ahc, scb);
1170#ifdef AHC_DEBUG
1171 if ((ahc_debug & AHC_SHOW_SELTO) != 0) {
1172 ahc_print_path(ahc, scb);
1173 printf("Saw Selection Timeout for SCB 0x%x\n",
1174 scb_index);
1175 }
1176#endif
1177 }
1178 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1179 ahc_restart(ahc);
1180 } else if ((status & BUSFREE) != 0
1181 && (ahc_inb(ahc, SIMODE1) & ENBUSFREE) != 0) {
1182 u_int lastphase;
1183 u_int saved_scsiid;
1184 u_int saved_lun;

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1637 * incoming negotiations even if target initiated
1638 * negotiation is not performed.
1639 */
1640 if (role == ROLE_TARGET)
1641 transinfo = &tinfo->user;
1642 else
1643 transinfo = &tinfo->goal;
1644 *ppr_options &= transinfo->ppr_options;
1187 }
1188 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1189 ahc_restart(ahc);
1190 } else if ((status & BUSFREE) != 0
1191 && (ahc_inb(ahc, SIMODE1) & ENBUSFREE) != 0) {
1192 u_int lastphase;
1193 u_int saved_scsiid;
1194 u_int saved_lun;

--- 452 unchanged lines hidden (view full) ---

1647 * incoming negotiations even if target initiated
1648 * negotiation is not performed.
1649 */
1650 if (role == ROLE_TARGET)
1651 transinfo = &tinfo->user;
1652 else
1653 transinfo = &tinfo->goal;
1654 *ppr_options &= transinfo->ppr_options;
1655 if (transinfo->width == MSG_EXT_WDTR_BUS_8_BIT) {
1656 maxsync = MAX(maxsync, AHC_SYNCRATE_ULTRA2);
1657 *ppr_options &= ~MSG_EXT_PPR_DT_REQ;
1658 }
1645 if (transinfo->period == 0) {
1646 *period = 0;
1647 *ppr_options = 0;
1648 return (NULL);
1649 }
1650 *period = MAX(*period, transinfo->period);
1651 return (ahc_find_syncrate(ahc, period, ppr_options, maxsync));
1652}

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1825 auto_negotiate_orig = tstate->auto_negotiate;
1826 if (neg_type == AHC_NEG_ALWAYS) {
1827 /*
1828 * Force our "current" settings to be
1829 * unknown so that unless a bus reset
1830 * occurs the need to renegotiate is
1831 * recorded persistently.
1832 */
1659 if (transinfo->period == 0) {
1660 *period = 0;
1661 *ppr_options = 0;
1662 return (NULL);
1663 }
1664 *period = MAX(*period, transinfo->period);
1665 return (ahc_find_syncrate(ahc, period, ppr_options, maxsync));
1666}

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1839 auto_negotiate_orig = tstate->auto_negotiate;
1840 if (neg_type == AHC_NEG_ALWAYS) {
1841 /*
1842 * Force our "current" settings to be
1843 * unknown so that unless a bus reset
1844 * occurs the need to renegotiate is
1845 * recorded persistently.
1846 */
1847 if ((ahc->features & AHC_WIDE) != 0)
1848 tinfo->curr.width = AHC_WIDTH_UNKNOWN;
1833 tinfo->curr.period = AHC_PERIOD_UNKNOWN;
1849 tinfo->curr.period = AHC_PERIOD_UNKNOWN;
1834 tinfo->curr.width = AHC_WIDTH_UNKNOWN;
1835 tinfo->curr.offset = AHC_OFFSET_UNKNOWN;
1850 tinfo->curr.offset = AHC_OFFSET_UNKNOWN;
1836 tinfo->curr.ppr_options = AHC_OFFSET_UNKNOWN;
1837 }
1838 if (tinfo->curr.period != tinfo->goal.period
1839 || tinfo->curr.width != tinfo->goal.width
1840 || tinfo->curr.offset != tinfo->goal.offset
1841 || tinfo->curr.ppr_options != tinfo->goal.ppr_options
1842 || (neg_type == AHC_NEG_IF_NON_ASYNC
1843 && (tinfo->goal.offset != 0
1844 || tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT

--- 906 unchanged lines hidden (view full) ---

2751 */
2752 ahc->msgin_index = 0;
2753
2754 /*
2755 * If this message illicited a response,
2756 * assert ATN so the target takes us to the
2757 * message out phase.
2758 */
1851 }
1852 if (tinfo->curr.period != tinfo->goal.period
1853 || tinfo->curr.width != tinfo->goal.width
1854 || tinfo->curr.offset != tinfo->goal.offset
1855 || tinfo->curr.ppr_options != tinfo->goal.ppr_options
1856 || (neg_type == AHC_NEG_IF_NON_ASYNC
1857 && (tinfo->goal.offset != 0
1858 || tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT

--- 906 unchanged lines hidden (view full) ---

2765 */
2766 ahc->msgin_index = 0;
2767
2768 /*
2769 * If this message illicited a response,
2770 * assert ATN so the target takes us to the
2771 * message out phase.
2772 */
2759 if (ahc->msgout_len != 0)
2773 if (ahc->msgout_len != 0) {
2774#ifdef AHC_DEBUG
2775 if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
2776 ahc_print_devinfo(ahc, &devinfo);
2777 printf("Asserting ATN for response\n");
2778 }
2779#endif
2760 ahc_assert_atn(ahc);
2780 ahc_assert_atn(ahc);
2781 }
2761 } else
2762 ahc->msgin_index++;
2763
2764 if (message_done == MSGLOOP_TERMINATED) {
2765 end_session = TRUE;
2766 } else {
2767 /* Ack the byte */
2768 ahc_outb(ahc, CLRSINT1, CLRREQINIT);

--- 649 unchanged lines hidden (view full) ---

3418 /*paused*/TRUE);
3419 /*
3420 * No need to clear the sync rate. If the target
3421 * did not accept the command, our syncrate is
3422 * unaffected. If the target started the negotiation,
3423 * but rejected our response, we already cleared the
3424 * sync rate before sending our WDTR.
3425 */
2782 } else
2783 ahc->msgin_index++;
2784
2785 if (message_done == MSGLOOP_TERMINATED) {
2786 end_session = TRUE;
2787 } else {
2788 /* Ack the byte */
2789 ahc_outb(ahc, CLRSINT1, CLRREQINIT);

--- 649 unchanged lines hidden (view full) ---

3439 /*paused*/TRUE);
3440 /*
3441 * No need to clear the sync rate. If the target
3442 * did not accept the command, our syncrate is
3443 * unaffected. If the target started the negotiation,
3444 * but rejected our response, we already cleared the
3445 * sync rate before sending our WDTR.
3446 */
3426 if (tinfo->goal.offset) {
3447 if (tinfo->goal.offset != tinfo->curr.offset) {
3427
3428 /* Start the sync negotiation */
3429 ahc->msgout_index = 0;
3430 ahc->msgout_len = 0;
3431 ahc_build_transfer_msg(ahc, devinfo);
3432 ahc->msgout_index = 0;
3433 response = 1;
3434 }

--- 544 unchanged lines hidden (view full) ---

3979 xpt_free_path(ahc->black_hole->path);
3980 free(ahc->black_hole, M_DEVBUF);
3981 }
3982#endif
3983 if (ahc->name != NULL)
3984 free(ahc->name, M_DEVBUF);
3985 if (ahc->seep_config != NULL)
3986 free(ahc->seep_config, M_DEVBUF);
3448
3449 /* Start the sync negotiation */
3450 ahc->msgout_index = 0;
3451 ahc->msgout_len = 0;
3452 ahc_build_transfer_msg(ahc, devinfo);
3453 ahc->msgout_index = 0;
3454 response = 1;
3455 }

--- 544 unchanged lines hidden (view full) ---

4000 xpt_free_path(ahc->black_hole->path);
4001 free(ahc->black_hole, M_DEVBUF);
4002 }
4003#endif
4004 if (ahc->name != NULL)
4005 free(ahc->name, M_DEVBUF);
4006 if (ahc->seep_config != NULL)
4007 free(ahc->seep_config, M_DEVBUF);
3987 if (ahc->saved_stack != NULL)
3988 free(ahc->saved_stack, M_DEVBUF);
3989#ifndef __FreeBSD__
3990 free(ahc, M_DEVBUF);
3991#endif
3992 return;
3993}
3994
3995void
3996ahc_shutdown(void *arg)

--- 25 unchanged lines hidden (view full) ---

4022 int wait;
4023
4024 /*
4025 * Preserve the value of the SXFRCTL1 register for all channels.
4026 * It contains settings that affect termination and we don't want
4027 * to disturb the integrity of the bus.
4028 */
4029 ahc_pause(ahc);
4008#ifndef __FreeBSD__
4009 free(ahc, M_DEVBUF);
4010#endif
4011 return;
4012}
4013
4014void
4015ahc_shutdown(void *arg)

--- 25 unchanged lines hidden (view full) ---

4041 int wait;
4042
4043 /*
4044 * Preserve the value of the SXFRCTL1 register for all channels.
4045 * It contains settings that affect termination and we don't want
4046 * to disturb the integrity of the bus.
4047 */
4048 ahc_pause(ahc);
4049 if ((ahc_inb(ahc, HCNTRL) & CHIPRST) != 0) {
4050 /*
4051 * The chip has not been initialized since
4052 * PCI/EISA/VLB bus reset. Don't trust
4053 * "left over BIOS data".
4054 */
4055 ahc->flags |= AHC_NO_BIOS_INIT;
4056 }
4030 sxfrctl1_b = 0;
4031 if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7770) {
4032 u_int sblkctl;
4033
4034 /*
4035 * Save channel B's settings in case this chip
4036 * is setup for TWIN channel operation.
4037 */

--- 478 unchanged lines hidden (view full) ---

4516 u_int scsi_conf;
4517 u_int scsiseq_template;
4518 u_int ultraenb;
4519 u_int discenable;
4520 u_int tagenable;
4521 size_t driver_data_size;
4522 uint32_t physaddr;
4523
4057 sxfrctl1_b = 0;
4058 if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7770) {
4059 u_int sblkctl;
4060
4061 /*
4062 * Save channel B's settings in case this chip
4063 * is setup for TWIN channel operation.
4064 */

--- 478 unchanged lines hidden (view full) ---

4543 u_int scsi_conf;
4544 u_int scsiseq_template;
4545 u_int ultraenb;
4546 u_int discenable;
4547 u_int tagenable;
4548 size_t driver_data_size;
4549 uint32_t physaddr;
4550
4524 ahc->stack_size = ahc_probe_stack_size(ahc);
4525 ahc->saved_stack = malloc(ahc->stack_size * sizeof(uint16_t),
4526 M_DEVBUF, M_NOWAIT);
4527 if (ahc->saved_stack == NULL)
4528 return (ENOMEM);
4529
4530#ifdef AHC_DEBUG_SEQUENCER
4531 ahc->flags |= AHC_SEQUENCER_DEBUG;
4551#ifdef AHC_DEBUG
4552 if ((ahc_debug & AHC_DEBUG_SEQUENCER) != 0)
4553 ahc->flags |= AHC_SEQUENCER_DEBUG;
4532#endif
4533
4534#ifdef AHC_PRINT_SRAM
4535 printf("Scratch Ram:");
4536 for (i = 0x20; i < 0x5f; i++) {
4537 if (((i % 8) == 0) && (i != 0)) {
4538 printf ("\n ");
4539 }

--- 318 unchanged lines hidden (view full) ---

4858 tinfo->user.transport_version = 3;
4859 else
4860 tinfo->user.transport_version = 2;
4861 tinfo->goal.protocol_version = 2;
4862 tinfo->goal.transport_version = 2;
4863 tinfo->curr.protocol_version = 2;
4864 tinfo->curr.transport_version = 2;
4865 }
4554#endif
4555
4556#ifdef AHC_PRINT_SRAM
4557 printf("Scratch Ram:");
4558 for (i = 0x20; i < 0x5f; i++) {
4559 if (((i % 8) == 0) && (i != 0)) {
4560 printf ("\n ");
4561 }

--- 318 unchanged lines hidden (view full) ---

4880 tinfo->user.transport_version = 3;
4881 else
4882 tinfo->user.transport_version = 2;
4883 tinfo->goal.protocol_version = 2;
4884 tinfo->goal.transport_version = 2;
4885 tinfo->curr.protocol_version = 2;
4886 tinfo->curr.transport_version = 2;
4887 }
4866 tstate->ultraenb = ultraenb;
4888 tstate->ultraenb = 0;
4867 }
4868 ahc->user_discenable = discenable;
4869 ahc->user_tagenable = tagenable;
4870
4871 /* There are no untagged SCBs active yet. */
4872 for (i = 0; i < 16; i++) {
4873 ahc_unbusy_tcl(ahc, BUILD_TCL(i << 4, 0));
4874 if ((ahc->flags & AHC_SCB_BTT) != 0) {

--- 1375 unchanged lines hidden (view full) ---

6250 if ((scb->flags & SCB_SENSE) == 0)
6251 ahc_set_residual(scb, resid);
6252 else
6253 ahc_set_sense_residual(scb, resid);
6254
6255#ifdef AHC_DEBUG
6256 if ((ahc_debug & AHC_SHOW_MISC) != 0) {
6257 ahc_print_path(ahc, scb);
4889 }
4890 ahc->user_discenable = discenable;
4891 ahc->user_tagenable = tagenable;
4892
4893 /* There are no untagged SCBs active yet. */
4894 for (i = 0; i < 16; i++) {
4895 ahc_unbusy_tcl(ahc, BUILD_TCL(i << 4, 0));
4896 if ((ahc->flags & AHC_SCB_BTT) != 0) {

--- 1375 unchanged lines hidden (view full) ---

6272 if ((scb->flags & SCB_SENSE) == 0)
6273 ahc_set_residual(scb, resid);
6274 else
6275 ahc_set_sense_residual(scb, resid);
6276
6277#ifdef AHC_DEBUG
6278 if ((ahc_debug & AHC_SHOW_MISC) != 0) {
6279 ahc_print_path(ahc, scb);
6258 printf("Handled Residual of %d bytes\n", resid);
6280 printf("Handled %sResidual of %d bytes\n",
6281 (scb->flags & SCB_SENSE) ? "Sense " : "", resid);
6259 }
6260#endif
6261}
6262
6263/******************************* Target Mode **********************************/
6264#ifdef AHC_TARGET_MODE
6265/*
6266 * Add a target mode event to this lun's queue

--- 198 unchanged lines hidden (view full) ---

6465 ahc->critical_sections = malloc(cs_count, M_DEVBUF, M_NOWAIT);
6466 if (ahc->critical_sections == NULL)
6467 panic("ahc_loadseq: Could not malloc");
6468 memcpy(ahc->critical_sections, cs_table, cs_count);
6469 }
6470 ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
6471 ahc_restart(ahc);
6472
6282 }
6283#endif
6284}
6285
6286/******************************* Target Mode **********************************/
6287#ifdef AHC_TARGET_MODE
6288/*
6289 * Add a target mode event to this lun's queue

--- 198 unchanged lines hidden (view full) ---

6488 ahc->critical_sections = malloc(cs_count, M_DEVBUF, M_NOWAIT);
6489 if (ahc->critical_sections == NULL)
6490 panic("ahc_loadseq: Could not malloc");
6491 memcpy(ahc->critical_sections, cs_table, cs_count);
6492 }
6493 ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
6494 ahc_restart(ahc);
6495
6473 if (bootverbose)
6496 if (bootverbose) {
6474 printf(" %d instructions downloaded\n", downloaded);
6497 printf(" %d instructions downloaded\n", downloaded);
6498 printf("%s: Features 0x%x, Bugs 0x%x, Flags 0x%x\n",
6499 ahc_name(ahc), ahc->features, ahc->bugs, ahc->flags);
6500 }
6475}
6476
6477static int
6478ahc_check_patch(struct ahc_softc *ahc, struct patch **start_patch,
6479 u_int start_instr, u_int *skip_addr)
6480{
6481 struct patch *cur_patch;
6482 struct patch *last_patch;

--- 147 unchanged lines hidden (view full) ---

6630 ahc_outsb(ahc, SEQRAM, instr.bytes, 4);
6631 break;
6632 default:
6633 panic("Unknown opcode encountered in seq program");
6634 break;
6635 }
6636}
6637
6501}
6502
6503static int
6504ahc_check_patch(struct ahc_softc *ahc, struct patch **start_patch,
6505 u_int start_instr, u_int *skip_addr)
6506{
6507 struct patch *cur_patch;
6508 struct patch *last_patch;

--- 147 unchanged lines hidden (view full) ---

6656 ahc_outsb(ahc, SEQRAM, instr.bytes, 4);
6657 break;
6658 default:
6659 panic("Unknown opcode encountered in seq program");
6660 break;
6661 }
6662}
6663
6638static int
6639ahc_probe_stack_size(struct ahc_softc *ahc)
6640{
6641 int last_probe;
6642
6643 last_probe = 0;
6644 while (1) {
6645 int i;
6646
6647 /*
6648 * We avoid using 0 as a pattern to avoid
6649 * confusion if the stack implementation
6650 * "back-fills" with zeros when "poping'
6651 * entries.
6652 */
6653 for (i = 1; i <= last_probe+1; i++) {
6654 ahc_outb(ahc, STACK, i & 0xFF);
6655 ahc_outb(ahc, STACK, (i >> 8) & 0xFF);
6656 }
6657
6658 /* Verify */
6659 for (i = last_probe+1; i > 0; i--) {
6660 u_int stack_entry;
6661
6662 stack_entry = ahc_inb(ahc, STACK)
6663 |(ahc_inb(ahc, STACK) << 8);
6664 if (stack_entry != i)
6665 goto sized;
6666 }
6667 last_probe++;
6668 }
6669sized:
6670 return (last_probe);
6671}
6672
6673int
6674ahc_print_register(ahc_reg_parse_entry_t *table, u_int num_entries,
6675 const char *name, u_int address, u_int value,
6676 u_int *cur_column, u_int wrap_point)
6677{
6678 int printed;
6679 u_int printed_mask;
6680

--- 38 unchanged lines hidden (view full) ---

6719}
6720
6721void
6722ahc_dump_card_state(struct ahc_softc *ahc)
6723{
6724 struct scb *scb;
6725 struct scb_tailq *untagged_q;
6726 u_int cur_col;
6664int
6665ahc_print_register(ahc_reg_parse_entry_t *table, u_int num_entries,
6666 const char *name, u_int address, u_int value,
6667 u_int *cur_column, u_int wrap_point)
6668{
6669 int printed;
6670 u_int printed_mask;
6671

--- 38 unchanged lines hidden (view full) ---

6710}
6711
6712void
6713ahc_dump_card_state(struct ahc_softc *ahc)
6714{
6715 struct scb *scb;
6716 struct scb_tailq *untagged_q;
6717 u_int cur_col;
6718 int paused;
6727 int target;
6728 int maxtarget;
6729 int i;
6730 uint8_t last_phase;
6731 uint8_t qinpos;
6732 uint8_t qintail;
6733 uint8_t qoutpos;
6734 uint8_t scb_index;
6735 uint8_t saved_scbptr;
6736
6719 int target;
6720 int maxtarget;
6721 int i;
6722 uint8_t last_phase;
6723 uint8_t qinpos;
6724 uint8_t qintail;
6725 uint8_t qoutpos;
6726 uint8_t scb_index;
6727 uint8_t saved_scbptr;
6728
6737 saved_scbptr = ahc_inb(ahc, SCBPTR);
6729 if (ahc_is_paused(ahc)) {
6730 paused = 1;
6731 } else {
6732 paused = 0;
6733 ahc_pause(ahc);
6734 }
6738
6735
6736 saved_scbptr = ahc_inb(ahc, SCBPTR);
6739 last_phase = ahc_inb(ahc, LASTPHASE);
6737 last_phase = ahc_inb(ahc, LASTPHASE);
6740 printf("%s: Dumping Card State %s, at SEQADDR 0x%x\n",
6738 printf(">>>>>>>>>>>>>>>>>> Dump Card State Begins <<<<<<<<<<<<<<<<<\n"
6739 "%s: Dumping Card State %s, at SEQADDR 0x%x\n",
6741 ahc_name(ahc), ahc_lookup_phase_entry(last_phase)->phasemsg,
6742 ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8));
6740 ahc_name(ahc), ahc_lookup_phase_entry(last_phase)->phasemsg,
6741 ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8));
6742 if (paused)
6743 printf("Card was paused\n");
6743 printf("ACCUM = 0x%x, SINDEX = 0x%x, DINDEX = 0x%x, ARG_2 = 0x%x\n",
6744 ahc_inb(ahc, ACCUM), ahc_inb(ahc, SINDEX), ahc_inb(ahc, DINDEX),
6745 ahc_inb(ahc, ARG_2));
6746 printf("HCNT = 0x%x SCBPTR = 0x%x\n", ahc_inb(ahc, HCNT),
6747 ahc_inb(ahc, SCBPTR));
6748 cur_col = 0;
6749 if ((ahc->features & AHC_DT) != 0)
6744 printf("ACCUM = 0x%x, SINDEX = 0x%x, DINDEX = 0x%x, ARG_2 = 0x%x\n",
6745 ahc_inb(ahc, ACCUM), ahc_inb(ahc, SINDEX), ahc_inb(ahc, DINDEX),
6746 ahc_inb(ahc, ARG_2));
6747 printf("HCNT = 0x%x SCBPTR = 0x%x\n", ahc_inb(ahc, HCNT),
6748 ahc_inb(ahc, SCBPTR));
6749 cur_col = 0;
6750 if ((ahc->features & AHC_DT) != 0)
6750 ahc_scsisigi_print(ahc_inb(ahc, SCSISIGI), &cur_col, 50);
6751 ahc_scsiphase_print(ahc_inb(ahc, SCSIPHASE), &cur_col, 50);
6751 ahc_scsiphase_print(ahc_inb(ahc, SCSIPHASE), &cur_col, 50);
6752 ahc_scsisigi_print(ahc_inb(ahc, SCSISIGI), &cur_col, 50);
6753 ahc_error_print(ahc_inb(ahc, ERROR), &cur_col, 50);
6752 ahc_scsibusl_print(ahc_inb(ahc, SCSIBUSL), &cur_col, 50);
6753 ahc_lastphase_print(ahc_inb(ahc, LASTPHASE), &cur_col, 50);
6754 ahc_scsiseq_print(ahc_inb(ahc, SCSISEQ), &cur_col, 50);
6755 ahc_sblkctl_print(ahc_inb(ahc, SBLKCTL), &cur_col, 50);
6754 ahc_scsibusl_print(ahc_inb(ahc, SCSIBUSL), &cur_col, 50);
6755 ahc_lastphase_print(ahc_inb(ahc, LASTPHASE), &cur_col, 50);
6756 ahc_scsiseq_print(ahc_inb(ahc, SCSISEQ), &cur_col, 50);
6757 ahc_sblkctl_print(ahc_inb(ahc, SBLKCTL), &cur_col, 50);
6758 ahc_scsirate_print(ahc_inb(ahc, SCSIRATE), &cur_col, 50);
6756 ahc_seqctl_print(ahc_inb(ahc, SEQCTL), &cur_col, 50);
6757 ahc_seq_flags_print(ahc_inb(ahc, SEQ_FLAGS), &cur_col, 50);
6758 ahc_sstat0_print(ahc_inb(ahc, SSTAT0), &cur_col, 50);
6759 ahc_sstat1_print(ahc_inb(ahc, SSTAT1), &cur_col, 50);
6760 ahc_sstat2_print(ahc_inb(ahc, SSTAT2), &cur_col, 50);
6761 ahc_sstat3_print(ahc_inb(ahc, SSTAT3), &cur_col, 50);
6762 ahc_simode0_print(ahc_inb(ahc, SIMODE0), &cur_col, 50);
6763 ahc_simode1_print(ahc_inb(ahc, SIMODE1), &cur_col, 50);
6764 ahc_sxfrctl0_print(ahc_inb(ahc, SXFRCTL0), &cur_col, 50);
6765 ahc_dfcntrl_print(ahc_inb(ahc, DFCNTRL), &cur_col, 50);
6766 ahc_dfstatus_print(ahc_inb(ahc, DFSTATUS), &cur_col, 50);
6767 if (cur_col != 0)
6768 printf("\n");
6769 printf("STACK:");
6759 ahc_seqctl_print(ahc_inb(ahc, SEQCTL), &cur_col, 50);
6760 ahc_seq_flags_print(ahc_inb(ahc, SEQ_FLAGS), &cur_col, 50);
6761 ahc_sstat0_print(ahc_inb(ahc, SSTAT0), &cur_col, 50);
6762 ahc_sstat1_print(ahc_inb(ahc, SSTAT1), &cur_col, 50);
6763 ahc_sstat2_print(ahc_inb(ahc, SSTAT2), &cur_col, 50);
6764 ahc_sstat3_print(ahc_inb(ahc, SSTAT3), &cur_col, 50);
6765 ahc_simode0_print(ahc_inb(ahc, SIMODE0), &cur_col, 50);
6766 ahc_simode1_print(ahc_inb(ahc, SIMODE1), &cur_col, 50);
6767 ahc_sxfrctl0_print(ahc_inb(ahc, SXFRCTL0), &cur_col, 50);
6768 ahc_dfcntrl_print(ahc_inb(ahc, DFCNTRL), &cur_col, 50);
6769 ahc_dfstatus_print(ahc_inb(ahc, DFSTATUS), &cur_col, 50);
6770 if (cur_col != 0)
6771 printf("\n");
6772 printf("STACK:");
6770 for (i = 0; i < ahc->stack_size; i++) {
6771 ahc->saved_stack[i] =
6772 ahc_inb(ahc, STACK)|(ahc_inb(ahc, STACK) << 8);
6773 printf(" 0x%x", ahc->saved_stack[i]);
6774 }
6773 for (i = 0; i < STACK_SIZE; i++)
6774 printf(" 0x%x", ahc_inb(ahc, STACK)|(ahc_inb(ahc, STACK) << 8));
6775 printf("\nSCB count = %d\n", ahc->scb_data->numscbs);
6776 printf("Kernel NEXTQSCB = %d\n", ahc->next_queued_scb->hscb->tag);
6777 printf("Card NEXTQSCB = %d\n", ahc_inb(ahc, NEXT_QUEUED_SCB));
6778 /* QINFIFO */
6779 printf("QINFIFO entries: ");
6780 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
6781 qinpos = ahc_inb(ahc, SNSCB_QOFF);
6782 ahc_outb(ahc, SNSCB_QOFF, qinpos);

--- 98 unchanged lines hidden (view full) ---

6881 if (i++ > 256)
6882 break;
6883 printf("%d ", scb->hscb->tag);
6884 }
6885 printf("\n");
6886 }
6887
6888 ahc_platform_dump_card_state(ahc);
6775 printf("\nSCB count = %d\n", ahc->scb_data->numscbs);
6776 printf("Kernel NEXTQSCB = %d\n", ahc->next_queued_scb->hscb->tag);
6777 printf("Card NEXTQSCB = %d\n", ahc_inb(ahc, NEXT_QUEUED_SCB));
6778 /* QINFIFO */
6779 printf("QINFIFO entries: ");
6780 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
6781 qinpos = ahc_inb(ahc, SNSCB_QOFF);
6782 ahc_outb(ahc, SNSCB_QOFF, qinpos);

--- 98 unchanged lines hidden (view full) ---

6881 if (i++ > 256)
6882 break;
6883 printf("%d ", scb->hscb->tag);
6884 }
6885 printf("\n");
6886 }
6887
6888 ahc_platform_dump_card_state(ahc);
6889 printf("\n<<<<<<<<<<<<<<<<< Dump Card State Ends >>>>>>>>>>>>>>>>>>\n");
6889 ahc_outb(ahc, SCBPTR, saved_scbptr);
6890 ahc_outb(ahc, SCBPTR, saved_scbptr);
6891 if (paused == 0)
6892 ahc_unpause(ahc);
6890}
6891
6892/************************* Target Mode ****************************************/
6893#ifdef AHC_TARGET_MODE
6894cam_status
6895ahc_find_tmode_devs(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb,
6896 struct ahc_tmode_tstate **tstate,
6897 struct ahc_tmode_lstate **lstate,

--- 589 unchanged lines hidden --- 		6893}
6894
6895/************************* Target Mode ****************************************/
6896#ifdef AHC_TARGET_MODE
6897cam_status
6898ahc_find_tmode_devs(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb,
6899 struct ahc_tmode_tstate **tstate,
6900 struct ahc_tmode_lstate **lstate,

--- 589 unchanged lines hidden ---