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aic7xxx.c (104094) aic7xxx.c (107420)
1/*
2 * Core routines and tables shareable across OS platforms.
3 *
4 * Copyright (c) 1994-2002 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

--- 23 unchanged lines hidden (view full) ---

32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
37 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGES.
39 *
1/*
2 * Core routines and tables shareable across OS platforms.
3 *
4 * Copyright (c) 1994-2002 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without

--- 23 unchanged lines hidden (view full) ---

32 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
37 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGES.
39 *
40 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#80 $
40 * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.c#100 $
41 *
41 *
42 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.c 104094 2002-09-28 17:15:38Z phk $
42 * $FreeBSD: head/sys/dev/aic7xxx/aic7xxx.c 107420 2002-11-30 19:30:09Z scottl $
43 */
44
45#ifdef __linux__
46#include "aic7xxx_osm.h"
47#include "aic7xxx_inline.h"
48#include "aicasm/aicasm_insformat.h"
49#else
50#include <dev/aic7xxx/aic7xxx_osm.h>

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156 ahc_devlimited_syncrate(struct ahc_softc *ahc,
157 struct ahc_initiator_tinfo *,
158 u_int *period,
159 u_int *ppr_options,
160 role_t role);
161static void ahc_update_pending_scbs(struct ahc_softc *ahc);
162static void ahc_fetch_devinfo(struct ahc_softc *ahc,
163 struct ahc_devinfo *devinfo);
43 */
44
45#ifdef __linux__
46#include "aic7xxx_osm.h"
47#include "aic7xxx_inline.h"
48#include "aicasm/aicasm_insformat.h"
49#else
50#include <dev/aic7xxx/aic7xxx_osm.h>

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156 ahc_devlimited_syncrate(struct ahc_softc *ahc,
157 struct ahc_initiator_tinfo *,
158 u_int *period,
159 u_int *ppr_options,
160 role_t role);
161static void ahc_update_pending_scbs(struct ahc_softc *ahc);
162static void ahc_fetch_devinfo(struct ahc_softc *ahc,
163 struct ahc_devinfo *devinfo);
164static void ahc_print_devinfo(struct ahc_softc *ahc,
165 struct ahc_devinfo *devinfo);
166static void ahc_scb_devinfo(struct ahc_softc *ahc,
167 struct ahc_devinfo *devinfo,
168 struct scb *scb);
169static void ahc_assert_atn(struct ahc_softc *ahc);
170static void ahc_setup_initiator_msgout(struct ahc_softc *ahc,
171 struct ahc_devinfo *devinfo,
172 struct scb *scb);
173static void ahc_build_transfer_msg(struct ahc_softc *ahc,

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178static void ahc_construct_wdtr(struct ahc_softc *ahc,
179 struct ahc_devinfo *devinfo,
180 u_int bus_width);
181static void ahc_construct_ppr(struct ahc_softc *ahc,
182 struct ahc_devinfo *devinfo,
183 u_int period, u_int offset,
184 u_int bus_width, u_int ppr_options);
185static void ahc_clear_msg_state(struct ahc_softc *ahc);
164static void ahc_scb_devinfo(struct ahc_softc *ahc,
165 struct ahc_devinfo *devinfo,
166 struct scb *scb);
167static void ahc_assert_atn(struct ahc_softc *ahc);
168static void ahc_setup_initiator_msgout(struct ahc_softc *ahc,
169 struct ahc_devinfo *devinfo,
170 struct scb *scb);
171static void ahc_build_transfer_msg(struct ahc_softc *ahc,

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176static void ahc_construct_wdtr(struct ahc_softc *ahc,
177 struct ahc_devinfo *devinfo,
178 u_int bus_width);
179static void ahc_construct_ppr(struct ahc_softc *ahc,
180 struct ahc_devinfo *devinfo,
181 u_int period, u_int offset,
182 u_int bus_width, u_int ppr_options);
183static void ahc_clear_msg_state(struct ahc_softc *ahc);
184static void ahc_handle_proto_violation(struct ahc_softc *ahc);
186static void ahc_handle_message_phase(struct ahc_softc *ahc);
187typedef enum {
188 AHCMSG_1B,
189 AHCMSG_2B,
190 AHCMSG_EXT
191} ahc_msgtype;
192static int ahc_sent_msg(struct ahc_softc *ahc, ahc_msgtype type,
193 u_int msgval, int full);

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226static void ahc_dumpseq(struct ahc_softc *ahc);
227#endif
228static void ahc_loadseq(struct ahc_softc *ahc);
229static int ahc_check_patch(struct ahc_softc *ahc,
230 struct patch **start_patch,
231 u_int start_instr, u_int *skip_addr);
232static void ahc_download_instr(struct ahc_softc *ahc,
233 u_int instrptr, uint8_t *dconsts);
185static void ahc_handle_message_phase(struct ahc_softc *ahc);
186typedef enum {
187 AHCMSG_1B,
188 AHCMSG_2B,
189 AHCMSG_EXT
190} ahc_msgtype;
191static int ahc_sent_msg(struct ahc_softc *ahc, ahc_msgtype type,
192 u_int msgval, int full);

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225static void ahc_dumpseq(struct ahc_softc *ahc);
226#endif
227static void ahc_loadseq(struct ahc_softc *ahc);
228static int ahc_check_patch(struct ahc_softc *ahc,
229 struct patch **start_patch,
230 u_int start_instr, u_int *skip_addr);
231static void ahc_download_instr(struct ahc_softc *ahc,
232 u_int instrptr, uint8_t *dconsts);
233static int ahc_probe_stack_size(struct ahc_softc *ahc);
234#ifdef AHC_TARGET_MODE
235static void ahc_queue_lstate_event(struct ahc_softc *ahc,
236 struct ahc_tmode_lstate *lstate,
237 u_int initiator_id,
238 u_int event_type,
239 u_int event_arg);
240static void ahc_update_scsiid(struct ahc_softc *ahc,
241 u_int targid_mask);

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542 * Renegotiate if appropriate. Unit attention
543 * errors will be reported before any data
544 * phases occur.
545 */
546 if (ahc_get_residual(scb)
547 == ahc_get_transfer_length(scb)) {
548 ahc_update_neg_request(ahc, &devinfo,
549 tstate, targ_info,
234#ifdef AHC_TARGET_MODE
235static void ahc_queue_lstate_event(struct ahc_softc *ahc,
236 struct ahc_tmode_lstate *lstate,
237 u_int initiator_id,
238 u_int event_type,
239 u_int event_arg);
240static void ahc_update_scsiid(struct ahc_softc *ahc,
241 u_int targid_mask);

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542 * Renegotiate if appropriate. Unit attention
543 * errors will be reported before any data
544 * phases occur.
545 */
546 if (ahc_get_residual(scb)
547 == ahc_get_transfer_length(scb)) {
548 ahc_update_neg_request(ahc, &devinfo,
549 tstate, targ_info,
550 /*force*/TRUE);
550 AHC_NEG_IF_NON_ASYNC);
551 }
552 if (tstate->auto_negotiate & devinfo.target_mask) {
553 hscb->control |= MK_MESSAGE;
554 scb->flags &= ~SCB_NEGOTIATE;
555 scb->flags |= SCB_AUTO_NEGOTIATE;
556 }
557 hscb->cdb_len = sizeof(*sc);
558 hscb->dataptr = sg->addr;
559 hscb->datacnt = sg->len;
560 hscb->sgptr = scb->sg_list_phys | SG_FULL_RESID;
561 hscb->sgptr = ahc_htole32(hscb->sgptr);
562 scb->sg_count = 1;
563 scb->flags |= SCB_SENSE;
564 ahc_qinfifo_requeue_tail(ahc, scb);
565 ahc_outb(ahc, RETURN_1, SEND_SENSE);
551 }
552 if (tstate->auto_negotiate & devinfo.target_mask) {
553 hscb->control |= MK_MESSAGE;
554 scb->flags &= ~SCB_NEGOTIATE;
555 scb->flags |= SCB_AUTO_NEGOTIATE;
556 }
557 hscb->cdb_len = sizeof(*sc);
558 hscb->dataptr = sg->addr;
559 hscb->datacnt = sg->len;
560 hscb->sgptr = scb->sg_list_phys | SG_FULL_RESID;
561 hscb->sgptr = ahc_htole32(hscb->sgptr);
562 scb->sg_count = 1;
563 scb->flags |= SCB_SENSE;
564 ahc_qinfifo_requeue_tail(ahc, scb);
565 ahc_outb(ahc, RETURN_1, SEND_SENSE);
566#ifdef __FreeBSD__
567 /*
568 * Ensure we have enough time to actually
569 * retrieve the sense.
570 */
566 /*
567 * Ensure we have enough time to actually
568 * retrieve the sense.
569 */
571 untimeout(ahc_timeout, (caddr_t)scb,
572 scb->io_ctx->ccb_h.timeout_ch);
573 scb->io_ctx->ccb_h.timeout_ch =
574 timeout(ahc_timeout, (caddr_t)scb, 5 * hz);
575#endif
570 ahc_scb_timer_reset(scb, 5 * 1000000);
576 break;
577 }
578 default:
579 break;
580 }
581 break;
582 }
583 case NO_MATCH:

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621 case SEND_REJECT:
622 {
623 u_int rejbyte = ahc_inb(ahc, ACCUM);
624 printf("%s:%c:%d: Warning - unknown message received from "
625 "target (0x%x). Rejecting\n",
626 ahc_name(ahc), devinfo.channel, devinfo.target, rejbyte);
627 break;
628 }
571 break;
572 }
573 default:
574 break;
575 }
576 break;
577 }
578 case NO_MATCH:

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616 case SEND_REJECT:
617 {
618 u_int rejbyte = ahc_inb(ahc, ACCUM);
619 printf("%s:%c:%d: Warning - unknown message received from "
620 "target (0x%x). Rejecting\n",
621 ahc_name(ahc), devinfo.channel, devinfo.target, rejbyte);
622 break;
623 }
629 case NO_IDENT:
624 case PROTO_VIOLATION:
630 {
625 {
631 /*
632 * The reconnecting target either did not send an identify
633 * message, or did, but we didn't find an SCB to match and
634 * before it could respond to our ATN/abort, it hit a dataphase.
635 * The only safe thing to do is to blow it away with a bus
636 * reset.
637 */
638 int found;
639
640 printf("%s:%c:%d: Target did not send an IDENTIFY message. "
641 "LASTPHASE = 0x%x, SAVED_SCSIID == 0x%x\n",
642 ahc_name(ahc), devinfo.channel, devinfo.target,
643 ahc_inb(ahc, LASTPHASE), ahc_inb(ahc, SAVED_SCSIID));
644 found = ahc_reset_channel(ahc, devinfo.channel,
645 /*initiate reset*/TRUE);
646 printf("%s: Issued Channel %c Bus Reset. "
647 "%d SCBs aborted\n", ahc_name(ahc), devinfo.channel,
648 found);
649 return;
626 ahc_handle_proto_violation(ahc);
627 break;
650 }
651 case IGN_WIDE_RES:
652 ahc_handle_ign_wide_residue(ahc, &devinfo);
653 break;
654 case PDATA_REINIT:
655 ahc_reinitialize_dataptrs(ahc);
656 break;
657 case BAD_PHASE:

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769 * if the expected phase in SCSISIGO matches
770 * the current phase. Make sure this is
771 * currently the case.
772 */
773 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
774 ahc_outb(ahc, LASTPHASE, curphase);
775 ahc_outb(ahc, SCSISIGO, curphase);
776 }
628 }
629 case IGN_WIDE_RES:
630 ahc_handle_ign_wide_residue(ahc, &devinfo);
631 break;
632 case PDATA_REINIT:
633 ahc_reinitialize_dataptrs(ahc);
634 break;
635 case BAD_PHASE:

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747 * if the expected phase in SCSISIGO matches
748 * the current phase. Make sure this is
749 * currently the case.
750 */
751 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
752 ahc_outb(ahc, LASTPHASE, curphase);
753 ahc_outb(ahc, SCSISIGO, curphase);
754 }
777 ahc_inb(ahc, SCSIDATL);
755 if ((ahc_inb(ahc, SCSISIGI) & (CDI|MSGI)) == 0) {
756 int wait;
757
758 /*
759 * In a data phase. Faster to bitbucket
760 * the data than to individually ack each
761 * byte. This is also the only strategy
762 * that will work with AUTOACK enabled.
763 */
764 ahc_outb(ahc, SXFRCTL1,
765 ahc_inb(ahc, SXFRCTL1) | BITBUCKET);
766 wait = 5000;
767 while (--wait != 0) {
768 if ((ahc_inb(ahc, SCSISIGI)
769 & (CDI|MSGI)) != 0)
770 break;
771 ahc_delay(100);
772 }
773 ahc_outb(ahc, SXFRCTL1,
774 ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
775 if (wait == 0) {
776 struct scb *scb;
777 u_int scb_index;
778
779 ahc_print_devinfo(ahc, &devinfo);
780 printf("Unable to clear parity error. "
781 "Resetting bus.\n");
782 scb_index = ahc_inb(ahc, SCB_TAG);
783 scb = ahc_lookup_scb(ahc, scb_index);
784 if (scb != NULL)
785 ahc_set_transaction_status(scb,
786 CAM_UNCOR_PARITY);
787 ahc_reset_channel(ahc, devinfo.channel,
788 /*init reset*/TRUE);
789 }
790 } else {
791 ahc_inb(ahc, SCSIDATL);
792 }
778 }
779 break;
780 }
781 case DATA_OVERRUN:
782 {
783 /*
784 * When the sequencer detects an overrun, it
785 * places the controller in "BITBUCKET" mode

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939{
940 u_int scb_index;
941 u_int status0;
942 u_int status;
943 struct scb *scb;
944 char cur_channel;
945 char intr_channel;
946
793 }
794 break;
795 }
796 case DATA_OVERRUN:
797 {
798 /*
799 * When the sequencer detects an overrun, it
800 * places the controller in "BITBUCKET" mode

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954{
955 u_int scb_index;
956 u_int status0;
957 u_int status;
958 struct scb *scb;
959 char cur_channel;
960 char intr_channel;
961
947 /* Make sure the sequencer is in a safe location. */
948 ahc_clear_critical_section(ahc);
949
950 if ((ahc->features & AHC_TWIN) != 0
951 && ((ahc_inb(ahc, SBLKCTL) & SELBUSB) != 0))
952 cur_channel = 'B';
953 else
954 cur_channel = 'A';
955 intr_channel = cur_channel;
956
957 if ((ahc->features & AHC_ULTRA2) != 0)

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970 if (status == 0) {
971 printf("%s: Spurious SCSI interrupt\n", ahc_name(ahc));
972 ahc_outb(ahc, CLRINT, CLRSCSIINT);
973 ahc_unpause(ahc);
974 return;
975 }
976 }
977
962 if ((ahc->features & AHC_TWIN) != 0
963 && ((ahc_inb(ahc, SBLKCTL) & SELBUSB) != 0))
964 cur_channel = 'B';
965 else
966 cur_channel = 'A';
967 intr_channel = cur_channel;
968
969 if ((ahc->features & AHC_ULTRA2) != 0)

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982 if (status == 0) {
983 printf("%s: Spurious SCSI interrupt\n", ahc_name(ahc));
984 ahc_outb(ahc, CLRINT, CLRSCSIINT);
985 ahc_unpause(ahc);
986 return;
987 }
988 }
989
990 /* Make sure the sequencer is in a safe location. */
991 ahc_clear_critical_section(ahc);
992
978 scb_index = ahc_inb(ahc, SCB_TAG);
979 scb = ahc_lookup_scb(ahc, scb_index);
980 if (scb != NULL
993 scb_index = ahc_inb(ahc, SCB_TAG);
994 scb = ahc_lookup_scb(ahc, scb_index);
995 if (scb != NULL
981 && (ahc_inb(ahc, SEQ_FLAGS) & IDENTIFY_SEEN) == 0)
996 && (ahc_inb(ahc, SEQ_FLAGS) & NOT_IDENTIFIED) != 0)
982 scb = NULL;
983
984 if ((ahc->features & AHC_ULTRA2) != 0
985 && (status0 & IOERR) != 0) {
986 int now_lvd;
987
988 now_lvd = ahc_inb(ahc, SBLKCTL) & ENAB40;
989 printf("%s: Transceiver State Has Changed to %s mode\n",

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1047 else
1048 errorphase = lastphase;
1049
1050 for (i = 0; i < num_phases; i++) {
1051 if (errorphase == ahc_phase_table[i].phase)
1052 break;
1053 }
1054 mesg_out = ahc_phase_table[i].mesg_out;
997 scb = NULL;
998
999 if ((ahc->features & AHC_ULTRA2) != 0
1000 && (status0 & IOERR) != 0) {
1001 int now_lvd;
1002
1003 now_lvd = ahc_inb(ahc, SBLKCTL) & ENAB40;
1004 printf("%s: Transceiver State Has Changed to %s mode\n",

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1062 else
1063 errorphase = lastphase;
1064
1065 for (i = 0; i < num_phases; i++) {
1066 if (errorphase == ahc_phase_table[i].phase)
1067 break;
1068 }
1069 mesg_out = ahc_phase_table[i].mesg_out;
1055 if (scb != NULL)
1070 if (scb != NULL) {
1056 ahc_print_path(ahc, scb);
1071 ahc_print_path(ahc, scb);
1057 else
1072 scb->flags |= SCB_TRANSMISSION_ERROR;
1073 } else
1058 printf("%s:%c:%d: ", ahc_name(ahc), intr_channel,
1059 SCSIID_TARGET(ahc, ahc_inb(ahc, SAVED_SCSIID)));
1060 scsirate = ahc_inb(ahc, SCSIRATE);
1061 printf("parity error detected %s. "
1062 "SEQADDR(0x%x) SCSIRATE(0x%x)\n",
1063 ahc_phase_table[i].phasemsg,
1064 ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8),
1065 scsirate);

--- 66 unchanged lines hidden (view full) ---

1132 ahc_outb(ahc, SCBPTR, scbptr);
1133 scb_index = ahc_inb(ahc, SCB_TAG);
1134
1135 scb = ahc_lookup_scb(ahc, scb_index);
1136 if (scb == NULL) {
1137 printf("%s: ahc_intr - referenced scb not "
1138 "valid during SELTO scb(%d, %d)\n",
1139 ahc_name(ahc), scbptr, scb_index);
1074 printf("%s:%c:%d: ", ahc_name(ahc), intr_channel,
1075 SCSIID_TARGET(ahc, ahc_inb(ahc, SAVED_SCSIID)));
1076 scsirate = ahc_inb(ahc, SCSIRATE);
1077 printf("parity error detected %s. "
1078 "SEQADDR(0x%x) SCSIRATE(0x%x)\n",
1079 ahc_phase_table[i].phasemsg,
1080 ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8),
1081 scsirate);

--- 66 unchanged lines hidden (view full) ---

1148 ahc_outb(ahc, SCBPTR, scbptr);
1149 scb_index = ahc_inb(ahc, SCB_TAG);
1150
1151 scb = ahc_lookup_scb(ahc, scb_index);
1152 if (scb == NULL) {
1153 printf("%s: ahc_intr - referenced scb not "
1154 "valid during SELTO scb(%d, %d)\n",
1155 ahc_name(ahc), scbptr, scb_index);
1156 ahc_dump_card_state(ahc);
1140 } else {
1157 } else {
1158 /*
1159 * Force a renegotiation with this target just in
1160 * case the cable was pulled and will later be
1161 * re-attached. The target may forget its negotiation
1162 * settings with us should it attempt to reselect
1163 * during the interruption. The target will not issue
1164 * a unit attention in this case, so we must always
1165 * renegotiate.
1166 */
1167 ahc_force_renegotiation(ahc);
1141 ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
1142 ahc_freeze_devq(ahc, scb);
1143#ifdef AHC_DEBUG
1144 if ((ahc_debug & AHC_SHOW_SELTO) != 0) {
1145 ahc_print_path(ahc, scb);
1146 printf("Saw Selection Timeout for SCB 0x%x\n",
1147 scb_index);
1148 }
1149#endif
1150 }
1151 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1168 ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
1169 ahc_freeze_devq(ahc, scb);
1170#ifdef AHC_DEBUG
1171 if ((ahc_debug & AHC_SHOW_SELTO) != 0) {
1172 ahc_print_path(ahc, scb);
1173 printf("Saw Selection Timeout for SCB 0x%x\n",
1174 scb_index);
1175 }
1176#endif
1177 }
1178 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1152 /*
1153 * Force a renegotiation with this target just in
1154 * case the cable was pulled and will later be
1155 * re-attached. The target may forget its negotiation
1156 * settings with us should it attempt to reselect
1157 * during the interruption. The target will not issue
1158 * a unit attention in this case, so we must always
1159 * renegotiate.
1160 */
1161 ahc_force_renegotiation(ahc);
1162 ahc_restart(ahc);
1163 } else if ((status & BUSFREE) != 0
1164 && (ahc_inb(ahc, SIMODE1) & ENBUSFREE) != 0) {
1165 u_int lastphase;
1166 u_int saved_scsiid;
1167 u_int saved_lun;
1168 u_int target;
1169 u_int initiator_role_id;

--- 182 unchanged lines hidden (view full) ---

1352
1353 ahc_fetch_devinfo(ahc, &devinfo);
1354 targ_info = ahc_fetch_transinfo(ahc,
1355 devinfo.channel,
1356 devinfo.our_scsiid,
1357 devinfo.target,
1358 &tstate);
1359 ahc_update_neg_request(ahc, &devinfo, tstate,
1179 ahc_restart(ahc);
1180 } else if ((status & BUSFREE) != 0
1181 && (ahc_inb(ahc, SIMODE1) & ENBUSFREE) != 0) {
1182 u_int lastphase;
1183 u_int saved_scsiid;
1184 u_int saved_lun;
1185 u_int target;
1186 u_int initiator_role_id;

--- 182 unchanged lines hidden (view full) ---

1369
1370 ahc_fetch_devinfo(ahc, &devinfo);
1371 targ_info = ahc_fetch_transinfo(ahc,
1372 devinfo.channel,
1373 devinfo.our_scsiid,
1374 devinfo.target,
1375 &tstate);
1376 ahc_update_neg_request(ahc, &devinfo, tstate,
1360 targ_info, /*force*/TRUE);
1377 targ_info, AHC_NEG_IF_NON_ASYNC);
1361}
1362
1363#define AHC_MAX_STEPS 2000
1364void
1365ahc_clear_critical_section(struct ahc_softc *ahc)
1366{
1367 int stepping;
1368 int steps;

--- 46 unchanged lines hidden (view full) ---

1415 * Disable all interrupt sources so that the
1416 * sequencer will not be stuck by a pausing
1417 * interrupt condition while we attempt to
1418 * leave a critical section.
1419 */
1420 simode0 = ahc_inb(ahc, SIMODE0);
1421 ahc_outb(ahc, SIMODE0, 0);
1422 simode1 = ahc_inb(ahc, SIMODE1);
1378}
1379
1380#define AHC_MAX_STEPS 2000
1381void
1382ahc_clear_critical_section(struct ahc_softc *ahc)
1383{
1384 int stepping;
1385 int steps;

--- 46 unchanged lines hidden (view full) ---

1432 * Disable all interrupt sources so that the
1433 * sequencer will not be stuck by a pausing
1434 * interrupt condition while we attempt to
1435 * leave a critical section.
1436 */
1437 simode0 = ahc_inb(ahc, SIMODE0);
1438 ahc_outb(ahc, SIMODE0, 0);
1439 simode1 = ahc_inb(ahc, SIMODE1);
1423 ahc_outb(ahc, SIMODE1, 0);
1440 if ((ahc->features & AHC_DT) != 0)
1441 /*
1442 * On DT class controllers, we
1443 * use the enhanced busfree logic.
1444 * Unfortunately we cannot re-enable
1445 * busfree detection within the
1446 * current connection, so we must
1447 * leave it on while single stepping.
1448 */
1449 ahc_outb(ahc, SIMODE1, ENBUSFREE);
1450 else
1451 ahc_outb(ahc, SIMODE1, 0);
1424 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1425 ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) | STEP);
1426 stepping = TRUE;
1427 }
1452 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1453 ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) | STEP);
1454 stepping = TRUE;
1455 }
1456 if ((ahc->features & AHC_DT) != 0) {
1457 ahc_outb(ahc, CLRSINT1, CLRBUSFREE);
1458 ahc_outb(ahc, CLRINT, CLRSCSIINT);
1459 }
1428 ahc_outb(ahc, HCNTRL, ahc->unpause);
1429 while (!ahc_is_paused(ahc))
1430 ahc_delay(200);
1431 }
1432 if (stepping) {
1433 ahc_outb(ahc, SIMODE0, simode0);
1434 ahc_outb(ahc, SIMODE1, simode1);
1435 ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) & ~STEP);

--- 132 unchanged lines hidden (view full) ---

1568#endif
1569
1570/*
1571 * Called when we have an active connection to a target on the bus,
1572 * this function finds the nearest syncrate to the input period limited
1573 * by the capabilities of the bus connectivity of and sync settings for
1574 * the target.
1575 */
1460 ahc_outb(ahc, HCNTRL, ahc->unpause);
1461 while (!ahc_is_paused(ahc))
1462 ahc_delay(200);
1463 }
1464 if (stepping) {
1465 ahc_outb(ahc, SIMODE0, simode0);
1466 ahc_outb(ahc, SIMODE1, simode1);
1467 ahc_outb(ahc, SEQCTL, ahc_inb(ahc, SEQCTL) & ~STEP);

--- 132 unchanged lines hidden (view full) ---

1600#endif
1601
1602/*
1603 * Called when we have an active connection to a target on the bus,
1604 * this function finds the nearest syncrate to the input period limited
1605 * by the capabilities of the bus connectivity of and sync settings for
1606 * the target.
1607 */
1576static struct ahc_syncrate *
1608struct ahc_syncrate *
1577ahc_devlimited_syncrate(struct ahc_softc *ahc,
1578 struct ahc_initiator_tinfo *tinfo,
1579 u_int *period, u_int *ppr_options, role_t role)
1580{
1581 struct ahc_transinfo *transinfo;
1582 u_int maxsync;
1583
1584 if ((ahc->features & AHC_ULTRA2) != 0) {

--- 196 unchanged lines hidden (view full) ---

1781 * Update the bitmask of targets for which the controller should
1782 * negotiate with at the next convenient oportunity. This currently
1783 * means the next time we send the initial identify messages for
1784 * a new transaction.
1785 */
1786int
1787ahc_update_neg_request(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
1788 struct ahc_tmode_tstate *tstate,
1609ahc_devlimited_syncrate(struct ahc_softc *ahc,
1610 struct ahc_initiator_tinfo *tinfo,
1611 u_int *period, u_int *ppr_options, role_t role)
1612{
1613 struct ahc_transinfo *transinfo;
1614 u_int maxsync;
1615
1616 if ((ahc->features & AHC_ULTRA2) != 0) {

--- 196 unchanged lines hidden (view full) ---

1813 * Update the bitmask of targets for which the controller should
1814 * negotiate with at the next convenient oportunity. This currently
1815 * means the next time we send the initial identify messages for
1816 * a new transaction.
1817 */
1818int
1819ahc_update_neg_request(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
1820 struct ahc_tmode_tstate *tstate,
1789 struct ahc_initiator_tinfo *tinfo, int force)
1821 struct ahc_initiator_tinfo *tinfo, ahc_neg_type neg_type)
1790{
1791 u_int auto_negotiate_orig;
1792
1793 auto_negotiate_orig = tstate->auto_negotiate;
1822{
1823 u_int auto_negotiate_orig;
1824
1825 auto_negotiate_orig = tstate->auto_negotiate;
1826 if (neg_type == AHC_NEG_ALWAYS) {
1827 /*
1828 * Force our "current" settings to be
1829 * unknown so that unless a bus reset
1830 * occurs the need to renegotiate is
1831 * recorded persistently.
1832 */
1833 tinfo->curr.period = AHC_PERIOD_UNKNOWN;
1834 tinfo->curr.width = AHC_WIDTH_UNKNOWN;
1835 tinfo->curr.offset = AHC_OFFSET_UNKNOWN;
1836 tinfo->curr.ppr_options = AHC_OFFSET_UNKNOWN;
1837 }
1794 if (tinfo->curr.period != tinfo->goal.period
1795 || tinfo->curr.width != tinfo->goal.width
1796 || tinfo->curr.offset != tinfo->goal.offset
1797 || tinfo->curr.ppr_options != tinfo->goal.ppr_options
1838 if (tinfo->curr.period != tinfo->goal.period
1839 || tinfo->curr.width != tinfo->goal.width
1840 || tinfo->curr.offset != tinfo->goal.offset
1841 || tinfo->curr.ppr_options != tinfo->goal.ppr_options
1798 || (force
1842 || (neg_type == AHC_NEG_IF_NON_ASYNC
1799 && (tinfo->goal.offset != 0
1800 || tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT
1801 || tinfo->goal.ppr_options != 0)))
1802 tstate->auto_negotiate |= devinfo->target_mask;
1803 else
1804 tstate->auto_negotiate &= ~devinfo->target_mask;
1805
1806 return (auto_negotiate_orig != tstate->auto_negotiate);

--- 115 unchanged lines hidden (view full) ---

1922 printf("%s: target %d using "
1923 "asynchronous transfers\n",
1924 ahc_name(ahc), devinfo->target);
1925 }
1926 }
1927 }
1928
1929 update_needed += ahc_update_neg_request(ahc, devinfo, tstate,
1843 && (tinfo->goal.offset != 0
1844 || tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT
1845 || tinfo->goal.ppr_options != 0)))
1846 tstate->auto_negotiate |= devinfo->target_mask;
1847 else
1848 tstate->auto_negotiate &= ~devinfo->target_mask;
1849
1850 return (auto_negotiate_orig != tstate->auto_negotiate);

--- 115 unchanged lines hidden (view full) ---

1966 printf("%s: target %d using "
1967 "asynchronous transfers\n",
1968 ahc_name(ahc), devinfo->target);
1969 }
1970 }
1971 }
1972
1973 update_needed += ahc_update_neg_request(ahc, devinfo, tstate,
1930 tinfo, /*force*/FALSE);
1974 tinfo, AHC_NEG_TO_GOAL);
1931
1932 if (update_needed)
1933 ahc_update_pending_scbs(ahc);
1934}
1935
1936/*
1937 * Update the user/goal/curr tables of wide negotiation
1938 * parameters as well as, in the case of a current or active update,

--- 45 unchanged lines hidden (view full) ---

1984 if (bootverbose) {
1985 printf("%s: target %d using %dbit transfers\n",
1986 ahc_name(ahc), devinfo->target,
1987 8 * (0x01 << width));
1988 }
1989 }
1990
1991 update_needed += ahc_update_neg_request(ahc, devinfo, tstate,
1975
1976 if (update_needed)
1977 ahc_update_pending_scbs(ahc);
1978}
1979
1980/*
1981 * Update the user/goal/curr tables of wide negotiation
1982 * parameters as well as, in the case of a current or active update,

--- 45 unchanged lines hidden (view full) ---

2028 if (bootverbose) {
2029 printf("%s: target %d using %dbit transfers\n",
2030 ahc_name(ahc), devinfo->target,
2031 8 * (0x01 << width));
2032 }
2033 }
2034
2035 update_needed += ahc_update_neg_request(ahc, devinfo, tstate,
1992 tinfo, /*force*/FALSE);
2036 tinfo, AHC_NEG_TO_GOAL);
1993 if (update_needed)
1994 ahc_update_pending_scbs(ahc);
1995}
1996
1997/*
1998 * Update the current state of tagged queuing for a given target.
1999 */
2000void

--- 148 unchanged lines hidden (view full) ---

2149 devinfo->target_offset = target;
2150 devinfo->channel = channel;
2151 devinfo->role = role;
2152 if (channel == 'B')
2153 devinfo->target_offset += 8;
2154 devinfo->target_mask = (0x01 << devinfo->target_offset);
2155}
2156
2037 if (update_needed)
2038 ahc_update_pending_scbs(ahc);
2039}
2040
2041/*
2042 * Update the current state of tagged queuing for a given target.
2043 */
2044void

--- 148 unchanged lines hidden (view full) ---

2193 devinfo->target_offset = target;
2194 devinfo->channel = channel;
2195 devinfo->role = role;
2196 if (channel == 'B')
2197 devinfo->target_offset += 8;
2198 devinfo->target_mask = (0x01 << devinfo->target_offset);
2199}
2200
2157static void
2201void
2158ahc_print_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
2159{
2202ahc_print_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
2203{
2160 printf("%s:%c:%d:%d:", ahc_name(ahc), devinfo->channel,
2204 printf("%s:%c:%d:%d: ", ahc_name(ahc), devinfo->channel,
2161 devinfo->target, devinfo->lun);
2162}
2163
2164static void
2165ahc_scb_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
2166 struct scb *scb)
2167{
2168 role_t role;
2169 int our_id;
2170
2171 our_id = SCSIID_OUR_ID(scb->hscb->scsiid);
2172 role = ROLE_INITIATOR;
2205 devinfo->target, devinfo->lun);
2206}
2207
2208static void
2209ahc_scb_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
2210 struct scb *scb)
2211{
2212 role_t role;
2213 int our_id;
2214
2215 our_id = SCSIID_OUR_ID(scb->hscb->scsiid);
2216 role = ROLE_INITIATOR;
2173 if ((scb->hscb->control & TARGET_SCB) != 0)
2217 if ((scb->flags & SCB_TARGET_SCB) != 0)
2174 role = ROLE_TARGET;
2175 ahc_compile_devinfo(devinfo, our_id, SCB_GET_TARGET(ahc, scb),
2176 SCB_GET_LUN(scb), SCB_GET_CHANNEL(ahc, scb), role);
2177}
2178
2179
2180/************************ Message Phase Processing ****************************/
2181static void

--- 108 unchanged lines hidden (view full) ---

2290 * we want to renegotiate due to a check condition.
2291 */
2292 struct ahc_initiator_tinfo *tinfo;
2293 struct ahc_tmode_tstate *tstate;
2294 struct ahc_syncrate *rate;
2295 int dowide;
2296 int dosync;
2297 int doppr;
2218 role = ROLE_TARGET;
2219 ahc_compile_devinfo(devinfo, our_id, SCB_GET_TARGET(ahc, scb),
2220 SCB_GET_LUN(scb), SCB_GET_CHANNEL(ahc, scb), role);
2221}
2222
2223
2224/************************ Message Phase Processing ****************************/
2225static void

--- 108 unchanged lines hidden (view full) ---

2334 * we want to renegotiate due to a check condition.
2335 */
2336 struct ahc_initiator_tinfo *tinfo;
2337 struct ahc_tmode_tstate *tstate;
2338 struct ahc_syncrate *rate;
2339 int dowide;
2340 int dosync;
2341 int doppr;
2298 int use_ppr;
2299 u_int period;
2300 u_int ppr_options;
2301 u_int offset;
2302
2303 tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
2304 devinfo->target, &tstate);
2305 /*
2306 * Filter our period based on the current connection.

--- 5 unchanged lines hidden (view full) ---

2312 ppr_options = tinfo->goal.ppr_options;
2313 /* Target initiated PPR is not allowed in the SCSI spec */
2314 if (devinfo->role == ROLE_TARGET)
2315 ppr_options = 0;
2316 rate = ahc_devlimited_syncrate(ahc, tinfo, &period,
2317 &ppr_options, devinfo->role);
2318 dowide = tinfo->curr.width != tinfo->goal.width;
2319 dosync = tinfo->curr.period != period;
2342 u_int period;
2343 u_int ppr_options;
2344 u_int offset;
2345
2346 tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
2347 devinfo->target, &tstate);
2348 /*
2349 * Filter our period based on the current connection.

--- 5 unchanged lines hidden (view full) ---

2355 ppr_options = tinfo->goal.ppr_options;
2356 /* Target initiated PPR is not allowed in the SCSI spec */
2357 if (devinfo->role == ROLE_TARGET)
2358 ppr_options = 0;
2359 rate = ahc_devlimited_syncrate(ahc, tinfo, &period,
2360 &ppr_options, devinfo->role);
2361 dowide = tinfo->curr.width != tinfo->goal.width;
2362 dosync = tinfo->curr.period != period;
2320 doppr = tinfo->curr.ppr_options != ppr_options;
2363 /*
2364 * Only use PPR if we have options that need it, even if the device
2365 * claims to support it. There might be an expander in the way
2366 * that doesn't.
2367 */
2368 doppr = ppr_options != 0;
2321
2322 if (!dowide && !dosync && !doppr) {
2323 dowide = tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT;
2324 dosync = tinfo->goal.offset != 0;
2369
2370 if (!dowide && !dosync && !doppr) {
2371 dowide = tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT;
2372 dosync = tinfo->goal.offset != 0;
2325 doppr = tinfo->goal.ppr_options != 0;
2326 }
2327
2328 if (!dowide && !dosync && !doppr) {
2373 }
2374
2375 if (!dowide && !dosync && !doppr) {
2329 panic("ahc_intr: AWAITING_MSG for negotiation, "
2330 "but no negotiation needed\n");
2376 /*
2377 * Force async with a WDTR message if we have a wide bus,
2378 * or just issue an SDTR with a 0 offset.
2379 */
2380 if ((ahc->features & AHC_WIDE) != 0)
2381 dowide = 1;
2382 else
2383 dosync = 1;
2384
2385 if (bootverbose) {
2386 ahc_print_devinfo(ahc, devinfo);
2387 printf("Ensuring async\n");
2388 }
2331 }
2332
2389 }
2390
2333 use_ppr = (tinfo->curr.transport_version >= 3) || doppr;
2334 /* Target initiated PPR is not allowed in the SCSI spec */
2335 if (devinfo->role == ROLE_TARGET)
2391 /* Target initiated PPR is not allowed in the SCSI spec */
2392 if (devinfo->role == ROLE_TARGET)
2336 use_ppr = 0;
2393 doppr = 0;
2337
2338 /*
2339 * Both the PPR message and SDTR message require the
2340 * goal syncrate to be limited to what the target device
2341 * is capable of handling (based on whether an LVD->SE
2342 * expander is on the bus), so combine these two cases.
2343 * Regardless, guarantee that if we are using WDTR and SDTR
2344 * messages that WDTR comes first.
2345 */
2394
2395 /*
2396 * Both the PPR message and SDTR message require the
2397 * goal syncrate to be limited to what the target device
2398 * is capable of handling (based on whether an LVD->SE
2399 * expander is on the bus), so combine these two cases.
2400 * Regardless, guarantee that if we are using WDTR and SDTR
2401 * messages that WDTR comes first.
2402 */
2346 if (use_ppr || (dosync && !dowide)) {
2403 if (doppr || (dosync && !dowide)) {
2347
2348 offset = tinfo->goal.offset;
2349 ahc_validate_offset(ahc, tinfo, rate, &offset,
2404
2405 offset = tinfo->goal.offset;
2406 ahc_validate_offset(ahc, tinfo, rate, &offset,
2350 use_ppr ? tinfo->goal.width
2351 : tinfo->curr.width,
2407 doppr ? tinfo->goal.width
2408 : tinfo->curr.width,
2352 devinfo->role);
2409 devinfo->role);
2353 if (use_ppr) {
2410 if (doppr) {
2354 ahc_construct_ppr(ahc, devinfo, period, offset,
2355 tinfo->goal.width, ppr_options);
2356 } else {
2357 ahc_construct_sdtr(ahc, devinfo, period, offset);
2358 }
2359 } else {
2360 ahc_construct_wdtr(ahc, devinfo, tinfo->goal.width);
2361 }
2362}
2363
2364/*
2365 * Build a synchronous negotiation message in our message
2366 * buffer based on the input parameters.
2367 */
2368static void
2369ahc_construct_sdtr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
2370 u_int period, u_int offset)
2371{
2411 ahc_construct_ppr(ahc, devinfo, period, offset,
2412 tinfo->goal.width, ppr_options);
2413 } else {
2414 ahc_construct_sdtr(ahc, devinfo, period, offset);
2415 }
2416 } else {
2417 ahc_construct_wdtr(ahc, devinfo, tinfo->goal.width);
2418 }
2419}
2420
2421/*
2422 * Build a synchronous negotiation message in our message
2423 * buffer based on the input parameters.
2424 */
2425static void
2426ahc_construct_sdtr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
2427 u_int period, u_int offset)
2428{
2429 if (offset == 0)
2430 period = AHC_ASYNC_XFER_PERIOD;
2372 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
2373 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR_LEN;
2374 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR;
2375 ahc->msgout_buf[ahc->msgout_index++] = period;
2376 ahc->msgout_buf[ahc->msgout_index++] = offset;
2377 ahc->msgout_len += 5;
2378 if (bootverbose) {
2379 printf("(%s:%c:%d:%d): Sending SDTR period %x, offset %x\n",

--- 26 unchanged lines hidden (view full) ---

2406 * Build a parallel protocol request message in our message
2407 * buffer based on the input parameters.
2408 */
2409static void
2410ahc_construct_ppr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
2411 u_int period, u_int offset, u_int bus_width,
2412 u_int ppr_options)
2413{
2431 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
2432 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR_LEN;
2433 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR;
2434 ahc->msgout_buf[ahc->msgout_index++] = period;
2435 ahc->msgout_buf[ahc->msgout_index++] = offset;
2436 ahc->msgout_len += 5;
2437 if (bootverbose) {
2438 printf("(%s:%c:%d:%d): Sending SDTR period %x, offset %x\n",

--- 26 unchanged lines hidden (view full) ---

2465 * Build a parallel protocol request message in our message
2466 * buffer based on the input parameters.
2467 */
2468static void
2469ahc_construct_ppr(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
2470 u_int period, u_int offset, u_int bus_width,
2471 u_int ppr_options)
2472{
2473 if (offset == 0)
2474 period = AHC_ASYNC_XFER_PERIOD;
2414 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
2415 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR_LEN;
2416 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR;
2417 ahc->msgout_buf[ahc->msgout_index++] = period;
2418 ahc->msgout_buf[ahc->msgout_index++] = 0;
2419 ahc->msgout_buf[ahc->msgout_index++] = offset;
2420 ahc->msgout_buf[ahc->msgout_index++] = bus_width;
2421 ahc->msgout_buf[ahc->msgout_index++] = ppr_options;

--- 22 unchanged lines hidden (view full) ---

2444 */
2445 ahc_outb(ahc, CLRSINT1, CLRATNO);
2446 }
2447 ahc_outb(ahc, MSG_OUT, MSG_NOOP);
2448 ahc_outb(ahc, SEQ_FLAGS2,
2449 ahc_inb(ahc, SEQ_FLAGS2) & ~TARGET_MSG_PENDING);
2450}
2451
2475 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
2476 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR_LEN;
2477 ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR;
2478 ahc->msgout_buf[ahc->msgout_index++] = period;
2479 ahc->msgout_buf[ahc->msgout_index++] = 0;
2480 ahc->msgout_buf[ahc->msgout_index++] = offset;
2481 ahc->msgout_buf[ahc->msgout_index++] = bus_width;
2482 ahc->msgout_buf[ahc->msgout_index++] = ppr_options;

--- 22 unchanged lines hidden (view full) ---

2505 */
2506 ahc_outb(ahc, CLRSINT1, CLRATNO);
2507 }
2508 ahc_outb(ahc, MSG_OUT, MSG_NOOP);
2509 ahc_outb(ahc, SEQ_FLAGS2,
2510 ahc_inb(ahc, SEQ_FLAGS2) & ~TARGET_MSG_PENDING);
2511}
2512
2513static void
2514ahc_handle_proto_violation(struct ahc_softc *ahc)
2515{
2516 struct ahc_devinfo devinfo;
2517 struct scb *scb;
2518 u_int scbid;
2519 u_int seq_flags;
2520 u_int curphase;
2521 u_int lastphase;
2522 int found;
2523
2524 ahc_fetch_devinfo(ahc, &devinfo);
2525 scbid = ahc_inb(ahc, SCB_TAG);
2526 scb = ahc_lookup_scb(ahc, scbid);
2527 seq_flags = ahc_inb(ahc, SEQ_FLAGS);
2528 curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
2529 lastphase = ahc_inb(ahc, LASTPHASE);
2530 if ((seq_flags & NOT_IDENTIFIED) != 0) {
2531
2532 /*
2533 * The reconnecting target either did not send an
2534 * identify message, or did, but we didn't find an SCB
2535 * to match.
2536 */
2537 ahc_print_devinfo(ahc, &devinfo);
2538 printf("Target did not send an IDENTIFY message. "
2539 "LASTPHASE = 0x%x.\n", lastphase);
2540 scb = NULL;
2541 } else if (scb == NULL) {
2542 /*
2543 * We don't seem to have an SCB active for this
2544 * transaction. Print an error and reset the bus.
2545 */
2546 ahc_print_devinfo(ahc, &devinfo);
2547 printf("No SCB found during protocol violation\n");
2548 goto proto_violation_reset;
2549 } else {
2550 ahc_set_transaction_status(scb, CAM_SEQUENCE_FAIL);
2551 if ((seq_flags & NO_CDB_SENT) != 0) {
2552 ahc_print_path(ahc, scb);
2553 printf("No or incomplete CDB sent to device.\n");
2554 } else if ((ahc_inb(ahc, SCB_CONTROL) & STATUS_RCVD) == 0) {
2555 /*
2556 * The target never bothered to provide status to
2557 * us prior to completing the command. Since we don't
2558 * know the disposition of this command, we must attempt
2559 * to abort it. Assert ATN and prepare to send an abort
2560 * message.
2561 */
2562 ahc_print_path(ahc, scb);
2563 printf("Completed command without status.\n");
2564 } else {
2565 ahc_print_path(ahc, scb);
2566 printf("Unknown protocol violation.\n");
2567 ahc_dump_card_state(ahc);
2568 }
2569 }
2570 if ((lastphase & ~P_DATAIN_DT) == 0
2571 || lastphase == P_COMMAND) {
2572proto_violation_reset:
2573 /*
2574 * Target either went directly to data/command
2575 * phase or didn't respond to our ATN.
2576 * The only safe thing to do is to blow
2577 * it away with a bus reset.
2578 */
2579 found = ahc_reset_channel(ahc, 'A', TRUE);
2580 printf("%s: Issued Channel %c Bus Reset. "
2581 "%d SCBs aborted\n", ahc_name(ahc), 'A', found);
2582 } else {
2583 /*
2584 * Leave the selection hardware off in case
2585 * this abort attempt will affect yet to
2586 * be sent commands.
2587 */
2588 ahc_outb(ahc, SCSISEQ,
2589 ahc_inb(ahc, SCSISEQ) & ~ENSELO);
2590 ahc_assert_atn(ahc);
2591 ahc_outb(ahc, MSG_OUT, HOST_MSG);
2592 if (scb == NULL) {
2593 ahc_print_devinfo(ahc, &devinfo);
2594 ahc->msgout_buf[0] = MSG_ABORT_TASK;
2595 ahc->msgout_len = 1;
2596 ahc->msgout_index = 0;
2597 ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
2598 } else {
2599 ahc_print_path(ahc, scb);
2600 scb->flags |= SCB_ABORT;
2601 }
2602 printf("Protocol violation %s. Attempting to abort.\n",
2603 ahc_lookup_phase_entry(curphase)->phasemsg);
2604 }
2605}
2606
2452/*
2453 * Manual message loop handler.
2454 */
2455static void
2456ahc_handle_message_phase(struct ahc_softc *ahc)
2457{
2458 struct ahc_devinfo devinfo;
2459 u_int bus_phase;

--- 1364 unchanged lines hidden (view full) ---

3824 xpt_free_path(ahc->black_hole->path);
3825 free(ahc->black_hole, M_DEVBUF);
3826 }
3827#endif
3828 if (ahc->name != NULL)
3829 free(ahc->name, M_DEVBUF);
3830 if (ahc->seep_config != NULL)
3831 free(ahc->seep_config, M_DEVBUF);
2607/*
2608 * Manual message loop handler.
2609 */
2610static void
2611ahc_handle_message_phase(struct ahc_softc *ahc)
2612{
2613 struct ahc_devinfo devinfo;
2614 u_int bus_phase;

--- 1364 unchanged lines hidden (view full) ---

3979 xpt_free_path(ahc->black_hole->path);
3980 free(ahc->black_hole, M_DEVBUF);
3981 }
3982#endif
3983 if (ahc->name != NULL)
3984 free(ahc->name, M_DEVBUF);
3985 if (ahc->seep_config != NULL)
3986 free(ahc->seep_config, M_DEVBUF);
3987 if (ahc->saved_stack != NULL)
3988 free(ahc->saved_stack, M_DEVBUF);
3832#ifndef __FreeBSD__
3833 free(ahc, M_DEVBUF);
3834#endif
3835 return;
3836}
3837
3838void
3839ahc_shutdown(void *arg)

--- 519 unchanged lines hidden (view full) ---

4359 u_int scsi_conf;
4360 u_int scsiseq_template;
4361 u_int ultraenb;
4362 u_int discenable;
4363 u_int tagenable;
4364 size_t driver_data_size;
4365 uint32_t physaddr;
4366
3989#ifndef __FreeBSD__
3990 free(ahc, M_DEVBUF);
3991#endif
3992 return;
3993}
3994
3995void
3996ahc_shutdown(void *arg)

--- 519 unchanged lines hidden (view full) ---

4516 u_int scsi_conf;
4517 u_int scsiseq_template;
4518 u_int ultraenb;
4519 u_int discenable;
4520 u_int tagenable;
4521 size_t driver_data_size;
4522 uint32_t physaddr;
4523
4524 ahc->stack_size = ahc_probe_stack_size(ahc);
4525 ahc->saved_stack = malloc(ahc->stack_size * sizeof(uint16_t),
4526 M_DEVBUF, M_NOWAIT);
4527 if (ahc->saved_stack == NULL)
4528 return (ENOMEM);
4529
4367#ifdef AHC_DEBUG_SEQUENCER
4368 ahc->flags |= AHC_SEQUENCER_DEBUG;
4369#endif
4370
4371#ifdef AHC_PRINT_SRAM
4372 printf("Scratch Ram:");
4373 for (i = 0x20; i < 0x5f; i++) {
4374 if (((i % 8) == 0) && (i != 0)) {

--- 2091 unchanged lines hidden (view full) ---

6466 ahc_outsb(ahc, SEQRAM, instr.bytes, 4);
6467 break;
6468 default:
6469 panic("Unknown opcode encountered in seq program");
6470 break;
6471 }
6472}
6473
4530#ifdef AHC_DEBUG_SEQUENCER
4531 ahc->flags |= AHC_SEQUENCER_DEBUG;
4532#endif
4533
4534#ifdef AHC_PRINT_SRAM
4535 printf("Scratch Ram:");
4536 for (i = 0x20; i < 0x5f; i++) {
4537 if (((i % 8) == 0) && (i != 0)) {

--- 2091 unchanged lines hidden (view full) ---

6629 ahc_outsb(ahc, SEQRAM, instr.bytes, 4);
6630 break;
6631 default:
6632 panic("Unknown opcode encountered in seq program");
6633 break;
6634 }
6635}
6636
6637static int
6638ahc_probe_stack_size(struct ahc_softc *ahc)
6639{
6640 int last_probe;
6641
6642 last_probe = 0;
6643 while (1) {
6644 int i;
6645
6646 /*
6647 * We avoid using 0 as a pattern to avoid
6648 * confusion if the stack implementation
6649 * "back-fills" with zeros when "poping'
6650 * entries.
6651 */
6652 for (i = 1; i <= last_probe+1; i++) {
6653 ahc_outb(ahc, STACK, i & 0xFF);
6654 ahc_outb(ahc, STACK, (i >> 8) & 0xFF);
6655 }
6656
6657 /* Verify */
6658 for (i = last_probe+1; i > 0; i--) {
6659 u_int stack_entry;
6660
6661 stack_entry = ahc_inb(ahc, STACK)
6662 |(ahc_inb(ahc, STACK) << 8);
6663 if (stack_entry != i)
6664 goto sized;
6665 }
6666 last_probe++;
6667 }
6668sized:
6669 return (last_probe);
6670}
6671
6474int
6475ahc_print_register(ahc_reg_parse_entry_t *table, u_int num_entries,
6476 const char *name, u_int address, u_int value,
6477 u_int *cur_column, u_int wrap_point)
6478{
6479 int printed;
6480 u_int printed_mask;
6481
6672int
6673ahc_print_register(ahc_reg_parse_entry_t *table, u_int num_entries,
6674 const char *name, u_int address, u_int value,
6675 u_int *cur_column, u_int wrap_point)
6676{
6677 int printed;
6678 u_int printed_mask;
6679
6482 if (*cur_column >= wrap_point) {
6680 if (cur_column != NULL && *cur_column >= wrap_point) {
6483 printf("\n");
6484 *cur_column = 0;
6485 }
6486 printed = printf("%s[0x%x]", name, value);
6487 if (table == NULL) {
6488 printed += printf(" ");
6489 *cur_column += printed;
6490 return (printed);

--- 18 unchanged lines hidden (view full) ---

6509 }
6510 if (entry >= num_entries)
6511 break;
6512 }
6513 if (printed_mask != 0)
6514 printed += printf(") ");
6515 else
6516 printed += printf(" ");
6681 printf("\n");
6682 *cur_column = 0;
6683 }
6684 printed = printf("%s[0x%x]", name, value);
6685 if (table == NULL) {
6686 printed += printf(" ");
6687 *cur_column += printed;
6688 return (printed);

--- 18 unchanged lines hidden (view full) ---

6707 }
6708 if (entry >= num_entries)
6709 break;
6710 }
6711 if (printed_mask != 0)
6712 printed += printf(") ");
6713 else
6714 printed += printf(" ");
6517 *cur_column += printed;
6715 if (cur_column != NULL)
6716 *cur_column += printed;
6518 return (printed);
6519}
6520
6521void
6522ahc_dump_card_state(struct ahc_softc *ahc)
6523{
6717 return (printed);
6718}
6719
6720void
6721ahc_dump_card_state(struct ahc_softc *ahc)
6722{
6524 struct scb *scb;
6525 struct scb_tailq *untagged_q;
6526 int target;
6527 int maxtarget;
6528 int i;
6723 struct scb *scb;
6724 struct scb_tailq *untagged_q;
6725 u_int cur_col;
6726 int target;
6727 int maxtarget;
6728 int i;
6529 uint8_t last_phase;
6530 uint8_t qinpos;
6531 uint8_t qintail;
6532 uint8_t qoutpos;
6533 uint8_t scb_index;
6534 uint8_t saved_scbptr;
6535
6536 saved_scbptr = ahc_inb(ahc, SCBPTR);
6537
6538 last_phase = ahc_inb(ahc, LASTPHASE);
6539 printf("%s: Dumping Card State %s, at SEQADDR 0x%x\n",
6540 ahc_name(ahc), ahc_lookup_phase_entry(last_phase)->phasemsg,
6541 ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8));
6542 printf("ACCUM = 0x%x, SINDEX = 0x%x, DINDEX = 0x%x, ARG_2 = 0x%x\n",
6543 ahc_inb(ahc, ACCUM), ahc_inb(ahc, SINDEX), ahc_inb(ahc, DINDEX),
6544 ahc_inb(ahc, ARG_2));
6545 printf("HCNT = 0x%x SCBPTR = 0x%x\n", ahc_inb(ahc, HCNT),
6546 ahc_inb(ahc, SCBPTR));
6729 uint8_t last_phase;
6730 uint8_t qinpos;
6731 uint8_t qintail;
6732 uint8_t qoutpos;
6733 uint8_t scb_index;
6734 uint8_t saved_scbptr;
6735
6736 saved_scbptr = ahc_inb(ahc, SCBPTR);
6737
6738 last_phase = ahc_inb(ahc, LASTPHASE);
6739 printf("%s: Dumping Card State %s, at SEQADDR 0x%x\n",
6740 ahc_name(ahc), ahc_lookup_phase_entry(last_phase)->phasemsg,
6741 ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8));
6742 printf("ACCUM = 0x%x, SINDEX = 0x%x, DINDEX = 0x%x, ARG_2 = 0x%x\n",
6743 ahc_inb(ahc, ACCUM), ahc_inb(ahc, SINDEX), ahc_inb(ahc, DINDEX),
6744 ahc_inb(ahc, ARG_2));
6745 printf("HCNT = 0x%x SCBPTR = 0x%x\n", ahc_inb(ahc, HCNT),
6746 ahc_inb(ahc, SCBPTR));
6547 printf("SCSISEQ = 0x%x, SBLKCTL = 0x%x\n",
6548 ahc_inb(ahc, SCSISEQ), ahc_inb(ahc, SBLKCTL));
6549 printf(" DFCNTRL = 0x%x, DFSTATUS = 0x%x\n",
6550 ahc_inb(ahc, DFCNTRL), ahc_inb(ahc, DFSTATUS));
6551 printf("LASTPHASE = 0x%x, SCSISIGI = 0x%x, SXFRCTL0 = 0x%x\n",
6552 last_phase, ahc_inb(ahc, SCSISIGI), ahc_inb(ahc, SXFRCTL0));
6553 printf("SSTAT0 = 0x%x, SSTAT1 = 0x%x\n",
6554 ahc_inb(ahc, SSTAT0), ahc_inb(ahc, SSTAT1));
6747 cur_col = 0;
6555 if ((ahc->features & AHC_DT) != 0)
6748 if ((ahc->features & AHC_DT) != 0)
6556 printf("SCSIPHASE = 0x%x\n", ahc_inb(ahc, SCSIPHASE));
6557 printf("STACK == 0x%x, 0x%x, 0x%x, 0x%x\n",
6558 ahc_inb(ahc, STACK) | (ahc_inb(ahc, STACK) << 8),
6559 ahc_inb(ahc, STACK) | (ahc_inb(ahc, STACK) << 8),
6560 ahc_inb(ahc, STACK) | (ahc_inb(ahc, STACK) << 8),
6561 ahc_inb(ahc, STACK) | (ahc_inb(ahc, STACK) << 8));
6562 printf("SCB count = %d\n", ahc->scb_data->numscbs);
6749 ahc_scsisigi_print(ahc_inb(ahc, SCSISIGI), &cur_col, 50);
6750 ahc_scsiphase_print(ahc_inb(ahc, SCSIPHASE), &cur_col, 50);
6751 ahc_scsibusl_print(ahc_inb(ahc, SCSIBUSL), &cur_col, 50);
6752 ahc_lastphase_print(ahc_inb(ahc, LASTPHASE), &cur_col, 50);
6753 ahc_scsiseq_print(ahc_inb(ahc, SCSISEQ), &cur_col, 50);
6754 ahc_sblkctl_print(ahc_inb(ahc, SBLKCTL), &cur_col, 50);
6755 ahc_seqctl_print(ahc_inb(ahc, SEQCTL), &cur_col, 50);
6756 ahc_seq_flags_print(ahc_inb(ahc, SEQ_FLAGS), &cur_col, 50);
6757 ahc_sstat0_print(ahc_inb(ahc, SSTAT0), &cur_col, 50);
6758 ahc_sstat1_print(ahc_inb(ahc, SSTAT1), &cur_col, 50);
6759 ahc_sstat2_print(ahc_inb(ahc, SSTAT2), &cur_col, 50);
6760 ahc_sstat3_print(ahc_inb(ahc, SSTAT3), &cur_col, 50);
6761 ahc_simode0_print(ahc_inb(ahc, SIMODE0), &cur_col, 50);
6762 ahc_simode1_print(ahc_inb(ahc, SIMODE1), &cur_col, 50);
6763 ahc_sxfrctl0_print(ahc_inb(ahc, SXFRCTL0), &cur_col, 50);
6764 ahc_dfcntrl_print(ahc_inb(ahc, DFCNTRL), &cur_col, 50);
6765 ahc_dfstatus_print(ahc_inb(ahc, DFSTATUS), &cur_col, 50);
6766 if (cur_col != 0)
6767 printf("\n");
6768 printf("STACK:");
6769 for (i = 0; i < ahc->stack_size; i++) {
6770 ahc->saved_stack[i] =
6771 ahc_inb(ahc, STACK)|(ahc_inb(ahc, STACK) << 8);
6772 printf(" 0x%x", ahc->saved_stack[i]);
6773 }
6774 printf("\nSCB count = %d\n", ahc->scb_data->numscbs);
6563 printf("Kernel NEXTQSCB = %d\n", ahc->next_queued_scb->hscb->tag);
6564 printf("Card NEXTQSCB = %d\n", ahc_inb(ahc, NEXT_QUEUED_SCB));
6565 /* QINFIFO */
6566 printf("QINFIFO entries: ");
6567 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
6568 qinpos = ahc_inb(ahc, SNSCB_QOFF);
6569 ahc_outb(ahc, SNSCB_QOFF, qinpos);
6570 } else

--- 43 unchanged lines hidden (view full) ---

6614 printf("%d ", scb_index);
6615 scb_index = ahc_inb(ahc, SCB_NEXT);
6616 }
6617 printf("\n");
6618
6619 printf("Sequencer SCB Info: ");
6620 for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
6621 ahc_outb(ahc, SCBPTR, i);
6775 printf("Kernel NEXTQSCB = %d\n", ahc->next_queued_scb->hscb->tag);
6776 printf("Card NEXTQSCB = %d\n", ahc_inb(ahc, NEXT_QUEUED_SCB));
6777 /* QINFIFO */
6778 printf("QINFIFO entries: ");
6779 if ((ahc->features & AHC_QUEUE_REGS) != 0) {
6780 qinpos = ahc_inb(ahc, SNSCB_QOFF);
6781 ahc_outb(ahc, SNSCB_QOFF, qinpos);
6782 } else

--- 43 unchanged lines hidden (view full) ---

6826 printf("%d ", scb_index);
6827 scb_index = ahc_inb(ahc, SCB_NEXT);
6828 }
6829 printf("\n");
6830
6831 printf("Sequencer SCB Info: ");
6832 for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
6833 ahc_outb(ahc, SCBPTR, i);
6622 printf("%d(c 0x%x, s 0x%x, l %d, t 0x%x) ",
6623 i, ahc_inb(ahc, SCB_CONTROL),
6624 ahc_inb(ahc, SCB_SCSIID),
6625 ahc_inb(ahc, SCB_LUN),
6626 ahc_inb(ahc, SCB_TAG));
6834 cur_col = printf("\n%3d ", i);
6835
6836 ahc_scb_control_print(ahc_inb(ahc, SCB_CONTROL), &cur_col, 60);
6837 ahc_scb_scsiid_print(ahc_inb(ahc, SCB_SCSIID), &cur_col, 60);
6838 ahc_scb_lun_print(ahc_inb(ahc, SCB_LUN), &cur_col, 60);
6839 ahc_scb_tag_print(ahc_inb(ahc, SCB_TAG), &cur_col, 60);
6627 }
6628 printf("\n");
6629
6630 printf("Pending list: ");
6631 i = 0;
6632 LIST_FOREACH(scb, &ahc->pending_scbs, pending_links) {
6633 if (i++ > 256)
6634 break;
6840 }
6841 printf("\n");
6842
6843 printf("Pending list: ");
6844 i = 0;
6845 LIST_FOREACH(scb, &ahc->pending_scbs, pending_links) {
6846 if (i++ > 256)
6847 break;
6635 if (scb != LIST_FIRST(&ahc->pending_scbs))
6636 printf(", ");
6637 printf("%d(c 0x%x, s 0x%x, l %d)", scb->hscb->tag,
6638 scb->hscb->control, scb->hscb->scsiid, scb->hscb->lun);
6848 cur_col = printf("\n%3d ", scb->hscb->tag);
6849 ahc_scb_control_print(scb->hscb->control, &cur_col, 60);
6850 ahc_scb_scsiid_print(scb->hscb->scsiid, &cur_col, 60);
6851 ahc_scb_lun_print(scb->hscb->lun, &cur_col, 60);
6639 if ((ahc->flags & AHC_PAGESCBS) == 0) {
6640 ahc_outb(ahc, SCBPTR, scb->hscb->tag);
6852 if ((ahc->flags & AHC_PAGESCBS) == 0) {
6853 ahc_outb(ahc, SCBPTR, scb->hscb->tag);
6641 printf("(0x%x, 0x%x)", ahc_inb(ahc, SCB_CONTROL),
6642 ahc_inb(ahc, SCB_TAG));
6854 printf("(");
6855 ahc_scb_control_print(ahc_inb(ahc, SCB_CONTROL),
6856 &cur_col, 60);
6857 ahc_scb_tag_print(ahc_inb(ahc, SCB_TAG), &cur_col, 60);
6858 printf(")");
6643 }
6644 }
6645 printf("\n");
6646
6647 printf("Kernel Free SCB list: ");
6648 i = 0;
6649 SLIST_FOREACH(scb, &ahc->scb_data->free_scbs, links.sle) {
6650 if (i++ > 256)

--- 619 unchanged lines hidden --- 		6859 }
6860 }
6861 printf("\n");
6862
6863 printf("Kernel Free SCB list: ");
6864 i = 0;
6865 SLIST_FOREACH(scb, &ahc->scb_data->free_scbs, links.sle) {
6866 if (i++ > 256)

--- 619 unchanged lines hidden ---