| if_agereg.h (179100) | if_agereg.h (190499) |
|---|---|
| 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/dev/age/if_agereg.h 179100 2008-05-19 01:39:59Z yongari $ | 27 * $FreeBSD: head/sys/dev/age/if_agereg.h 190499 2009-03-28 07:39:35Z yongari $ |
| 28 */ 29 30#ifndef _IF_AGEREG_H 31#define _IF_AGEREG_H 32 33/* 34 * Attansic Technology Corp. PCI vendor ID 35 */ --- 50 unchanged lines hidden (view full) --- 86 87#define AGE_SPI_OP_RDSR 0x215 /* 8bits */ 88 89#define AGE_SPI_OP_WRSR 0x216 /* 8bits */ 90 91#define AGE_SPI_OP_READ 0x217 /* 8bits */ 92 93#define AGE_TWSI_CTRL 0x218 | 28 */ 29 30#ifndef _IF_AGEREG_H 31#define _IF_AGEREG_H 32 33/* 34 * Attansic Technology Corp. PCI vendor ID 35 */ --- 50 unchanged lines hidden (view full) --- 86 87#define AGE_SPI_OP_RDSR 0x215 /* 8bits */ 88 89#define AGE_SPI_OP_WRSR 0x216 /* 8bits */ 90 91#define AGE_SPI_OP_READ 0x217 /* 8bits */ 92 93#define AGE_TWSI_CTRL 0x218 |
| 94#define TWSI_CTRL_SW_LD_START 0x00000800 95#define TWSI_CTRL_HW_LD_START 0x00001000 96#define TWSI_CTRL_LD_EXIST 0x00400000 |
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| 94 95#define AGE_DEV_MISC_CTRL 0x21C 96 97#define AGE_MASTER_CFG 0x1400 98#define MASTER_RESET 0x00000001 99#define MASTER_MTIMER_ENB 0x00000002 100#define MASTER_ITIMER_ENB 0x00000004 101#define MASTER_MANUAL_INT_ENB 0x00000008 --- 555 unchanged lines hidden --- | 97 98#define AGE_DEV_MISC_CTRL 0x21C 99 100#define AGE_MASTER_CFG 0x1400 101#define MASTER_RESET 0x00000001 102#define MASTER_MTIMER_ENB 0x00000002 103#define MASTER_ITIMER_ENB 0x00000004 104#define MASTER_MANUAL_INT_ENB 0x00000008 --- 555 unchanged lines hidden --- |