| if_age.c (213844) | if_age.c (213893) |
|---|---|
| 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28/* Driver for Attansic Technology Corp. L1 Gigabit Ethernet. */ 29 30#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 14 unchanged lines hidden (view full) --- 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28/* Driver for Attansic Technology Corp. L1 Gigabit Ethernet. */ 29 30#include <sys/cdefs.h> |
| 31__FBSDID("$FreeBSD: head/sys/dev/age/if_age.c 213844 2010-10-14 18:31:40Z yongari $"); | 31__FBSDID("$FreeBSD: head/sys/dev/age/if_age.c 213893 2010-10-15 14:52:11Z marius $"); |
| 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/kernel.h> 38#include <sys/malloc.h> 39#include <sys/mbuf.h> --- 165 unchanged lines hidden (view full) --- 205static int 206age_miibus_readreg(device_t dev, int phy, int reg) 207{ 208 struct age_softc *sc; 209 uint32_t v; 210 int i; 211 212 sc = device_get_softc(dev); | 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/bus.h> 36#include <sys/endian.h> 37#include <sys/kernel.h> 38#include <sys/malloc.h> 39#include <sys/mbuf.h> --- 165 unchanged lines hidden (view full) --- 205static int 206age_miibus_readreg(device_t dev, int phy, int reg) 207{ 208 struct age_softc *sc; 209 uint32_t v; 210 int i; 211 212 sc = device_get_softc(dev); |
| 213 if (phy != sc->age_phyaddr) 214 return (0); | |
| 215 216 CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ | 217 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 218 for (i = AGE_PHY_TIMEOUT; i > 0; i--) { 219 DELAY(1); 220 v = CSR_READ_4(sc, AGE_MDIO); 221 if ((v & (MDIO_OP_EXECUTE | MDIO_OP_BUSY)) == 0) 222 break; --- 13 unchanged lines hidden (view full) --- 236static int 237age_miibus_writereg(device_t dev, int phy, int reg, int val) 238{ 239 struct age_softc *sc; 240 uint32_t v; 241 int i; 242 243 sc = device_get_softc(dev); | 213 214 CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ | 215 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 216 for (i = AGE_PHY_TIMEOUT; i > 0; i--) { 217 DELAY(1); 218 v = CSR_READ_4(sc, AGE_MDIO); 219 if ((v & (MDIO_OP_EXECUTE | MDIO_OP_BUSY)) == 0) 220 break; --- 13 unchanged lines hidden (view full) --- 234static int 235age_miibus_writereg(device_t dev, int phy, int reg, int val) 236{ 237 struct age_softc *sc; 238 uint32_t v; 239 int i; 240 241 sc = device_get_softc(dev); |
| 244 if (phy != sc->age_phyaddr) 245 return (0); | |
| 246 247 CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE | 248 (val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT | 249 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 250 for (i = AGE_PHY_TIMEOUT; i > 0; i--) { 251 DELAY(1); 252 v = CSR_READ_4(sc, AGE_MDIO); 253 if ((v & (MDIO_OP_EXECUTE | MDIO_OP_BUSY)) == 0) --- 362 unchanged lines hidden (view full) --- 616 ifp->if_hwassist = AGE_CSUM_FEATURES | CSUM_TSO; 617 if (pci_find_extcap(dev, PCIY_PMG, &pmc) == 0) { 618 sc->age_flags |= AGE_FLAG_PMCAP; 619 ifp->if_capabilities |= IFCAP_WOL_MAGIC | IFCAP_WOL_MCAST; 620 } 621 ifp->if_capenable = ifp->if_capabilities; 622 623 /* Set up MII bus. */ | 242 243 CSR_WRITE_4(sc, AGE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE | 244 (val & MDIO_DATA_MASK) << MDIO_DATA_SHIFT | 245 MDIO_SUP_PREAMBLE | MDIO_CLK_25_4 | MDIO_REG_ADDR(reg)); 246 for (i = AGE_PHY_TIMEOUT; i > 0; i--) { 247 DELAY(1); 248 v = CSR_READ_4(sc, AGE_MDIO); 249 if ((v & (MDIO_OP_EXECUTE | MDIO_OP_BUSY)) == 0) --- 362 unchanged lines hidden (view full) --- 612 ifp->if_hwassist = AGE_CSUM_FEATURES | CSUM_TSO; 613 if (pci_find_extcap(dev, PCIY_PMG, &pmc) == 0) { 614 sc->age_flags |= AGE_FLAG_PMCAP; 615 ifp->if_capabilities |= IFCAP_WOL_MAGIC | IFCAP_WOL_MCAST; 616 } 617 ifp->if_capenable = ifp->if_capabilities; 618 619 /* Set up MII bus. */ |
| 624 if ((error = mii_phy_probe(dev, &sc->age_miibus, age_mediachange, 625 age_mediastatus)) != 0) { 626 device_printf(dev, "no PHY found!\n"); | 620 error = mii_attach(dev, &sc->age_miibus, ifp, age_mediachange, 621 age_mediastatus, BMSR_DEFCAPMASK, sc->age_phyaddr, MII_OFFSET_ANY, 622 0); 623 if (error != 0) { 624 device_printf(dev, "attaching PHYs failed\n"); |
| 627 goto fail; 628 } 629 630 ether_ifattach(ifp, sc->age_eaddr); 631 632 /* VLAN capability setup. */ 633 ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | 634 IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO; --- 2662 unchanged lines hidden --- | 625 goto fail; 626 } 627 628 ether_ifattach(ifp, sc->age_eaddr); 629 630 /* VLAN capability setup. */ 631 ifp->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | 632 IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO; --- 2662 unchanged lines hidden --- |