| options.mips (188221) | options.mips (201986) |
|---|---|
| 1# Copyright (c) 2001, 2008, Juniper Networks, Inc. 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions 6# are met: 7# 1. Redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer. --- 12 unchanged lines hidden (view full) --- 21# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26# SUCH DAMAGE. 27# 28# JNPR: options.mips,v 1.2 2006/09/15 12:52:34 | 1# Copyright (c) 2001, 2008, Juniper Networks, Inc. 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions 6# are met: 7# 1. Redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer. --- 12 unchanged lines hidden (view full) --- 21# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26# SUCH DAMAGE. 27# 28# JNPR: options.mips,v 1.2 2006/09/15 12:52:34 |
| 29# $FreeBSD: head/sys/conf/options.mips 188221 2009-02-06 10:30:46Z wkoszek $ | 29# $FreeBSD: head/sys/conf/options.mips 201986 2010-01-10 05:46:19Z imp $ |
| 30 31CPU_MIPS4KC opt_global.h 32CPU_MIPS32 opt_global.h 33CPU_MIPS64 opt_global.h | 30 31CPU_MIPS4KC opt_global.h 32CPU_MIPS32 opt_global.h 33CPU_MIPS64 opt_global.h |
| 34CPU_NOFPU opt_global.h | |
| 35CPU_SENTRY5 opt_global.h | 34CPU_SENTRY5 opt_global.h |
| 35CPU_HAVEFPU opt_global.h 36CPU_SB1 opt_global.h |
|
| 36 37ISA_MIPS1 opt_cputype.h 38ISA_MIPS3 opt_cputype.h 39ISA_MIPS32 opt_cputype.h 40ISA_MIPS32v2 opt_cputype.h 41ISA_MIPS64 opt_cputype.h 42ISA_MIPS64v2 opt_cputype.h 43 44YAMON opt_global.h 45CFE opt_global.h 46CFE_CONSOLE opt_global.h | 37 38ISA_MIPS1 opt_cputype.h 39ISA_MIPS3 opt_cputype.h 40ISA_MIPS32 opt_cputype.h 41ISA_MIPS32v2 opt_cputype.h 42ISA_MIPS64 opt_cputype.h 43ISA_MIPS64v2 opt_cputype.h 44 45YAMON opt_global.h 46CFE opt_global.h 47CFE_CONSOLE opt_global.h |
| 48CFE_ENV opt_global.h 49CFE_ENV_SIZE opt_global.h |
|
| 47 48KERNPHYSADDR opt_global.h 49KERNVIRTADDR opt_global.h 50PHYSADDR opt_global.h | 50 51KERNPHYSADDR opt_global.h 52KERNVIRTADDR opt_global.h 53PHYSADDR opt_global.h |
| 51SOFTFLOAT opt_global.h 52 | 54PHYS_ADDR_64BIT opt_global.h 55NOFPU opt_global.h |
| 53TARGET_OCTEON opt_global.h 54TARGET_EMULATOR opt_ddb.h | 56TARGET_OCTEON opt_global.h 57TARGET_EMULATOR opt_ddb.h |
| 58TARGET_XLR_XLS opt_global.h |
|
| 55 56TICK_USE_YAMON_FREQ opt_global.h 57TICK_USE_MALTA_RTC opt_global.h | 59 60TICK_USE_YAMON_FREQ opt_global.h 61TICK_USE_MALTA_RTC opt_global.h |
| 62 63# 64# The MIPS architecture does not have separate memory and i/o address space 65# like x86. However some MIPS processors provide a memory-mapped window that 66# maps onto the PCI I/O space. 67# 68PCI_IOSPACE_SIZE opt_global.h 69PCI_IOSPACE_ADDR opt_global.h 70 71# 72# The highest memory address that can be used by the kernel in units of KB. 73# 74MAXMEM opt_global.h |
|