| exynos5250.dtsi (266332) | exynos5250.dtsi (266341) |
|---|---|
| 1/*- 2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi 266332 2014-05-17 17:54:38Z ian $ | 26 * $FreeBSD: stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi 266341 2014-05-17 19:37:04Z ian $ |
| 27 */ 28 29/ { 30 compatible = "samsung,exynos5250"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 interrupt-parent = <&GIC>; 34 --- 17 unchanged lines hidden (view full) --- 52 compatible = "arm,gic"; 53 reg = < 0x10481000 0x1000 >, /* Distributor Registers */ 54 < 0x10482000 0x2000 >; /* CPU Interface Registers */ 55 interrupt-controller; 56 #address-cells = <0>; 57 #interrupt-cells = <1>; 58 }; 59 | 27 */ 28 29/ { 30 compatible = "samsung,exynos5250"; 31 #address-cells = <1>; 32 #size-cells = <1>; 33 interrupt-parent = <&GIC>; 34 --- 17 unchanged lines hidden (view full) --- 52 compatible = "arm,gic"; 53 reg = < 0x10481000 0x1000 >, /* Distributor Registers */ 54 < 0x10482000 0x2000 >; /* CPU Interface Registers */ 55 interrupt-controller; 56 #address-cells = <0>; 57 #interrupt-cells = <1>; 58 }; 59 |
| 60 combiner: interrupt-controller@10440000 { 61 compatible = "exynos,combiner"; 62 reg = <0x10440000 0x1000>; 63 interrupts = < 32 33 34 35 36 37 38 39 64 40 41 42 43 44 45 46 47 65 48 49 50 51 52 53 54 55 66 56 57 58 59 60 61 62 63 >; 67 interrupt-parent = <&GIC>; 68 }; 69 |
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| 60 clk0: clk@10010000 { 61 compatible = "exynos,clk"; 62 reg = < 0x10020000 0x20000 >; 63 }; 64 65 mct { 66 compatible = "exynos,mct"; 67 reg = < 0x101C0000 0x1000 >; --- 8 unchanged lines hidden (view full) --- 76 pwm { 77 compatible = "samsung,s3c24x0-timer"; 78 reg = <0x12DD0000 0x1000>; 79 interrupts = < 71 >; 80 interrupt-parent = <&GIC>; 81 clock-frequency = <24000000>; 82 }; 83 | 70 clk0: clk@10010000 { 71 compatible = "exynos,clk"; 72 reg = < 0x10020000 0x20000 >; 73 }; 74 75 mct { 76 compatible = "exynos,mct"; 77 reg = < 0x101C0000 0x1000 >; --- 8 unchanged lines hidden (view full) --- 86 pwm { 87 compatible = "samsung,s3c24x0-timer"; 88 reg = <0x12DD0000 0x1000>; 89 interrupts = < 71 >; 90 interrupt-parent = <&GIC>; 91 clock-frequency = <24000000>; 92 }; 93 |
| 94 pad0: pad@11400000 { 95 compatible = "exynos,pad"; 96 status = "disabled"; 97 reg = <0x11400000 0x1000>, /* gpio left */ 98 <0x13400000 0x1000>, /* gpio right */ 99 <0x10D10000 0x1000>, /* gpio c2c */ 100 <0x03860000 0x1000>; 101 interrupts = < 78 77 82 79 >; 102 interrupt-parent = <&GIC>; 103 }; 104 |
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| 84 usb@12110000 { 85 compatible = "exynos,usb-ehci", "usb-ehci"; 86 reg = <0x12110000 0x1000>, /* EHCI */ 87 <0x12130000 0x1000>, /* EHCI host ctrl */ 88 <0x10040000 0x1000>, /* Power */ | 105 usb@12110000 { 106 compatible = "exynos,usb-ehci", "usb-ehci"; 107 reg = <0x12110000 0x1000>, /* EHCI */ 108 <0x12130000 0x1000>, /* EHCI host ctrl */ 109 <0x10040000 0x1000>, /* Power */ |
| 89 <0x10050230 0x10>, /* Sysreg */ 90 <0x11400C60 0x10>; /* GPIO left */ | 110 <0x10050230 0x10>; /* Sysreg */ |
| 91 interrupts = < 103 >; 92 interrupt-parent = <&GIC>; 93 }; 94 95 usb@12120000 { 96 compatible = "exynos,usb-ohci", "usb-ohci"; 97 reg = <0x12120000 0x10000>; 98 interrupts = < 103 >; --- 63 unchanged lines hidden (view full) --- 162 compatible = "exynos"; 163 reg = <0x12C30000 0x100>; 164 interrupts = < 86 >; 165 interrupt-parent = <&GIC>; 166 clock-frequency = < 100000000 >; 167 current-speed = <115200>; 168 }; 169 | 111 interrupts = < 103 >; 112 interrupt-parent = <&GIC>; 113 }; 114 115 usb@12120000 { 116 compatible = "exynos,usb-ohci", "usb-ohci"; 117 reg = <0x12120000 0x10000>; 118 interrupts = < 103 >; --- 63 unchanged lines hidden (view full) --- 182 compatible = "exynos"; 183 reg = <0x12C30000 0x100>; 184 interrupts = < 86 >; 185 interrupt-parent = <&GIC>; 186 clock-frequency = < 100000000 >; 187 current-speed = <115200>; 188 }; 189 |
| 190 i2c0: i2c@12C60000 { 191 compatible = "exynos,i2c"; 192 status = "disabled"; 193 reg = <0x12C60000 0x10000>; 194 interrupts = < 88 >; 195 interrupt-parent = <&GIC>; 196 }; 197 198 i2c1: i2c@12C70000 { 199 compatible = "exynos,i2c"; 200 status = "disabled"; 201 reg = <0x12C70000 0x10000>; 202 interrupts = < 89 >; 203 interrupt-parent = <&GIC>; 204 }; 205 206 i2c2: i2c@12C80000 { 207 compatible = "exynos,i2c"; 208 status = "disabled"; 209 reg = <0x12C80000 0x10000>; 210 interrupts = < 90 >; 211 interrupt-parent = <&GIC>; 212 }; 213 214 i2c3: i2c@12C90000 { 215 compatible = "exynos,i2c"; 216 status = "disabled"; 217 reg = <0x12C90000 0x10000>; 218 interrupts = < 91 >; 219 interrupt-parent = <&GIC>; 220 }; 221 222 i2c4: i2c@12CA0000 { 223 compatible = "exynos,i2c"; 224 status = "disabled"; 225 reg = <0x12CA0000 0x10000>; 226 interrupts = < 92 >; 227 interrupt-parent = <&GIC>; 228 }; 229 230 i2c5: i2c@12CB0000 { 231 compatible = "exynos,i2c"; 232 status = "disabled"; 233 reg = <0x12CB0000 0x10000>; 234 interrupts = < 93 >; 235 interrupt-parent = <&GIC>; 236 }; 237 238 i2c6: i2c@12CC0000 { 239 compatible = "exynos,i2c"; 240 status = "disabled"; 241 reg = <0x12CC0000 0x10000>; 242 interrupts = < 94 >; 243 interrupt-parent = <&GIC>; 244 }; 245 246 i2c7: i2c@12CD0000 { 247 compatible = "exynos,i2c"; 248 status = "disabled"; 249 reg = <0x12CD0000 0x10000>; 250 interrupts = < 95 >; 251 interrupt-parent = <&GIC>; 252 }; 253 |
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| 170 fimd0: fimd@14400000 { 171 compatible = "exynos,fimd"; 172 status = "disabled"; 173 reg = < 0x14400000 0x10000 >, /* fimd */ 174 < 0x14420000 0x10000 >, /* disp */ 175 < 0x10050000 0x220 >; /* sysreg */ 176 interrupt-parent = <&GIC>; 177 }; 178 179 dp0: dp@145B0000 { 180 compatible = "exynos,dp"; 181 status = "disabled"; 182 reg = < 0x145B0000 0x10000 >, 183 < 0x10040720 0x10 >; /* PHY */ 184 interrupt-parent = <&GIC>; 185 }; 186 }; 187}; | 254 fimd0: fimd@14400000 { 255 compatible = "exynos,fimd"; 256 status = "disabled"; 257 reg = < 0x14400000 0x10000 >, /* fimd */ 258 < 0x14420000 0x10000 >, /* disp */ 259 < 0x10050000 0x220 >; /* sysreg */ 260 interrupt-parent = <&GIC>; 261 }; 262 263 dp0: dp@145B0000 { 264 compatible = "exynos,dp"; 265 status = "disabled"; 266 reg = < 0x145B0000 0x10000 >, 267 < 0x10040720 0x10 >; /* PHY */ 268 interrupt-parent = <&GIC>; 269 }; 270 }; 271}; |