mci_device.h (161370) | mci_device.h (163533) |
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1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * This software is derived from software provide by Kwikbyte who specifically 25 * disclaimed copyright on the code. 26 * | 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * This software is derived from software provide by Kwikbyte who specifically 25 * disclaimed copyright on the code. 26 * |
27 * $FreeBSD: head/sys/boot/arm/at91/libat91/mci_device.h 161370 2006-08-16 23:39:58Z imp $ | 27 * $FreeBSD: head/sys/boot/arm/at91/libat91/mci_device.h 163533 2006-10-20 09:12:05Z imp $ |
28 */ 29 30//*--------------------------------------------------------------------------- 31//* ATMEL Microcontroller Software Support - ROUSSET - 32//*--------------------------------------------------------------------------- 33//* The software is delivered "AS IS" without warranty or condition of any 34//* kind, either express, implied or statutory. This includes without 35//* limitation any warranty or condition with respect to merchantability or --- 5 unchanged lines hidden (view full) --- 41//* Translator : 42//* 43//* 1.0 26/11/02 FB : Creation 44//*--------------------------------------------------------------------------- 45 46#ifndef __MCI_Device_h 47#define __MCI_Device_h 48 | 28 */ 29 30//*--------------------------------------------------------------------------- 31//* ATMEL Microcontroller Software Support - ROUSSET - 32//*--------------------------------------------------------------------------- 33//* The software is delivered "AS IS" without warranty or condition of any 34//* kind, either express, implied or statutory. This includes without 35//* limitation any warranty or condition with respect to merchantability or --- 5 unchanged lines hidden (view full) --- 41//* Translator : 42//* 43//* 1.0 26/11/02 FB : Creation 44//*--------------------------------------------------------------------------- 45 46#ifndef __MCI_Device_h 47#define __MCI_Device_h 48 |
49#include <sys/types.h> |
|
49 50typedef unsigned int AT91S_MCIDeviceStatus; 51 | 50 51typedef unsigned int AT91S_MCIDeviceStatus; 52 |
52///////////////////////////////////////////////////////////////////////////////////////////////////// | 53/////////////////////////////////////////////////////////////////////////////// |
53 54#define AT91C_CARD_REMOVED 0 55#define AT91C_MMC_CARD_INSERTED 1 56#define AT91C_SD_CARD_INSERTED 2 57 58#define AT91C_NO_ARGUMENT 0x0 59 60#define AT91C_FIRST_RCA 0xCAFE --- 10 unchanged lines hidden (view full) --- 71#define AT91C_MCI_RX_STREAM 0x4 72#define AT91C_MCI_TX_SINGLE_BLOCK 0x5 73#define AT91C_MCI_TX_MULTIPLE_BLOCK 0x6 74#define AT91C_MCI_TX_STREAM 0x7 75 76/* TimeOut */ 77#define AT91C_TIMEOUT_CMDRDY 30 78 | 54 55#define AT91C_CARD_REMOVED 0 56#define AT91C_MMC_CARD_INSERTED 1 57#define AT91C_SD_CARD_INSERTED 2 58 59#define AT91C_NO_ARGUMENT 0x0 60 61#define AT91C_FIRST_RCA 0xCAFE --- 10 unchanged lines hidden (view full) --- 72#define AT91C_MCI_RX_STREAM 0x4 73#define AT91C_MCI_TX_SINGLE_BLOCK 0x5 74#define AT91C_MCI_TX_MULTIPLE_BLOCK 0x6 75#define AT91C_MCI_TX_STREAM 0x7 76 77/* TimeOut */ 78#define AT91C_TIMEOUT_CMDRDY 30 79 |
79///////////////////////////////////////////////////////////////////////////////////////////////////// | 80 81 82/////////////////////////////////////////////////////////////////////////////// |
80// MMC & SDCard Structures | 83// MMC & SDCard Structures |
81///////////////////////////////////////////////////////////////////////////////////////////////////// | 84/////////////////////////////////////////////////////////////////////////////// |
82 83/*-----------------------------------------------*/ 84/* SDCard Device Descriptor Structure Definition */ 85/*-----------------------------------------------*/ 86typedef struct _AT91S_MciDeviceDesc 87{ 88 volatile unsigned char state; 89 unsigned char SDCard_bus_width; --- 4 unchanged lines hidden (view full) --- 94/* MMC & SDCard Structure Device Features */ 95/*---------------------------------------------*/ 96typedef struct _AT91S_MciDeviceFeatures 97{ 98 unsigned char Card_Inserted; // (0=AT91C_CARD_REMOVED) (1=AT91C_MMC_CARD_INSERTED) (2=AT91C_SD_CARD_INSERTED) 99 unsigned int Relative_Card_Address; // RCA 100 unsigned int READ_BL_LEN; 101 unsigned int WRITE_BL_LEN; | 85 86/*-----------------------------------------------*/ 87/* SDCard Device Descriptor Structure Definition */ 88/*-----------------------------------------------*/ 89typedef struct _AT91S_MciDeviceDesc 90{ 91 volatile unsigned char state; 92 unsigned char SDCard_bus_width; --- 4 unchanged lines hidden (view full) --- 97/* MMC & SDCard Structure Device Features */ 98/*---------------------------------------------*/ 99typedef struct _AT91S_MciDeviceFeatures 100{ 101 unsigned char Card_Inserted; // (0=AT91C_CARD_REMOVED) (1=AT91C_MMC_CARD_INSERTED) (2=AT91C_SD_CARD_INSERTED) 102 unsigned int Relative_Card_Address; // RCA 103 unsigned int READ_BL_LEN; 104 unsigned int WRITE_BL_LEN; |
102 unsigned int Max_Read_DataBlock_Length; // 2^(READ_BL_LEN) in CSD 103 unsigned int Max_Write_DataBlock_Length; // 2^(WRITE_BL_LEN) in CSD | |
104 unsigned char Read_Partial; // READ_BL_PARTIAL 105 unsigned char Write_Partial; // WRITE_BL_PARTIAL 106 unsigned char Erase_Block_Enable; // ERASE_BLK_EN 107 unsigned char Read_Block_Misalignment; // READ_BLK_MISALIGN 108 unsigned char Write_Block_Misalignment; // WRITE_BLK_MISALIGN 109 unsigned char Sector_Size; // SECTOR_SIZE 110 unsigned int Memory_Capacity; // Size in bits of the device 111 112} AT91S_MciDeviceFeatures, *AT91PS_MciDeviceFeatures ; 113 114/*---------------------------------------------*/ 115/* MCI Device Structure Definition */ 116/*---------------------------------------------*/ 117typedef struct _AT91S_MciDevice 118{ 119 AT91PS_MciDeviceDesc pMCI_DeviceDesc; // MCI device descriptor 120 AT91PS_MciDeviceFeatures pMCI_DeviceFeatures;// Pointer on a MCI device features array | 105 unsigned char Read_Partial; // READ_BL_PARTIAL 106 unsigned char Write_Partial; // WRITE_BL_PARTIAL 107 unsigned char Erase_Block_Enable; // ERASE_BLK_EN 108 unsigned char Read_Block_Misalignment; // READ_BLK_MISALIGN 109 unsigned char Write_Block_Misalignment; // WRITE_BLK_MISALIGN 110 unsigned char Sector_Size; // SECTOR_SIZE 111 unsigned int Memory_Capacity; // Size in bits of the device 112 113} AT91S_MciDeviceFeatures, *AT91PS_MciDeviceFeatures ; 114 115/*---------------------------------------------*/ 116/* MCI Device Structure Definition */ 117/*---------------------------------------------*/ 118typedef struct _AT91S_MciDevice 119{ 120 AT91PS_MciDeviceDesc pMCI_DeviceDesc; // MCI device descriptor 121 AT91PS_MciDeviceFeatures pMCI_DeviceFeatures;// Pointer on a MCI device features array |
121}AT91S_MciDevice, *AT91PS_MciDevice; | 122} AT91S_MciDevice, *AT91PS_MciDevice; |
122 | 123 |
123///////////////////////////////////////////////////////////////////////////////////////////////////// | 124#include <dev/mmc/mmcreg.h> 125 126/////////////////////////////////////////////////////////////////////////////// 127// Functions returnals 128/////////////////////////////////////////////////////////////////////////////// 129#define AT91C_CMD_SEND_OK 0 // Command ok 130#define AT91C_CMD_SEND_ERROR -1 // Command failed 131#define AT91C_INIT_OK 2 // Init Successfull 132#define AT91C_INIT_ERROR 3 // Init Failed 133#define AT91C_READ_OK 4 // Read Successfull 134#define AT91C_READ_ERROR 5 // Read Failed 135#define AT91C_WRITE_OK 6 // Write Successfull 136#define AT91C_WRITE_ERROR 7 // Write Failed 137#define AT91C_ERASE_OK 8 // Erase Successfull 138#define AT91C_ERASE_ERROR 9 // Erase Failed 139#define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull 140#define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed 141 142#define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE | AT91C_MCI_OVRE | AT91C_MCI_DTOE | \ 143 AT91C_MCI_DCRCE | AT91C_MCI_RTOE | AT91C_MCI_RENDE | AT91C_MCI_RCRCE | \ 144 AT91C_MCI_RDIRE | AT91C_MCI_RINDE) 145 146#define MMC_CMDNB (0x1Fu << 0) // Command Number 147#define MMC_RSPTYP (0x3u << 6) // Response Type 148#define MMC_RSPTYP_NO (0x0u << 6) // No response 149#define MMC_RSPTYP_48 (0x1u << 6) // 48-bit response 150#define MMC_RSPTYP_136 (0x2u << 6) // 136-bit response 151#define MMC_SPCMD (0x7u << 8) // Special CMD 152#define MMC_SPCMD_NONE (0x0u << 8) // Not a special CMD 153#define MMC_SPCMD_INIT (0x1u << 8) // Initialization CMD 154#define MMC_SPCMD_SYNC (0x2u << 8) // Synchronized CMD 155#define MMC_SPCMD_IT_CMD (0x4u << 8) // Interrupt command 156#define MMC_SPCMD_IT_REP (0x5u << 8) // Interrupt response 157#define MMC_OPDCMD (0x1u << 11) // Open Drain Command 158#define MMC_MAXLAT (0x1u << 12) // Maximum Latency for Command to respond 159#define MMC_TRCMD (0x3u << 16) // Transfer CMD 160#define MMC_TRCMD_NO (0x0u << 16) // No transfer 161#define MMC_TRCMD_START (0x1u << 16) // Start transfer 162#define MMC_TRCMD_STOP (0x2u << 16) // Stop transfer 163#define MMC_TRDIR (0x1u << 18) // Transfer Direction 164#define MMC_TRTYP (0x3u << 19) // Transfer Type 165#define MMC_TRTYP_BLOCK (0x0u << 19) // Block Transfer type 166#define MMC_TRTYP_MULTIPLE (0x1u << 19) // Multiple Block transfer type 167#define MMC_TRTYP_STREAM (0x2u << 19) // Stream transfer type 168 169/////////////////////////////////////////////////////////////////////////////// |
124// MCI_CMD Register Value | 170// MCI_CMD Register Value |
125///////////////////////////////////////////////////////////////////////////////////////////////////// 126#define AT91C_POWER_ON_INIT (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_INIT | AT91C_MCI_OPDCMD) | 171/////////////////////////////////////////////////////////////////////////////// 172#define POWER_ON_INIT \ 173 (0 | MMC_TRCMD_NO | MMC_SPCMD_INIT | MMC_OPDCMD) |
127 128///////////////////////////////////////////////////////////////// 129// Class 0 & 1 commands: Basic commands and Read Stream commands 130///////////////////////////////////////////////////////////////// 131 | 174 175///////////////////////////////////////////////////////////////// 176// Class 0 & 1 commands: Basic commands and Read Stream commands 177///////////////////////////////////////////////////////////////// 178 |
132#define AT91C_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE ) 133#define AT91C_MMC_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_OPDCMD) 134#define AT91C_MMC_SEND_OP_COND_CMD (1 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_OPDCMD) 135#define AT91C_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 ) 136#define AT91C_MMC_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_OPDCMD) 137#define AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) 138#define AT91C_MMC_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT | AT91C_MCI_OPDCMD) | 179#define GO_IDLE_STATE_CMD \ 180 (0 | MMC_TRCMD_NO | MMC_SPCMD_NONE ) 181#define MMC_GO_IDLE_STATE_CMD \ 182 (0 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_OPDCMD) 183#define MMC_SEND_OP_COND_CMD \ 184 (1 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_48 | \ 185 MMC_OPDCMD) |
139 | 186 |
140#define AT91C_SET_DSR_CMD (4 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_NO | AT91C_MCI_MAXLAT ) // no tested | 187#define ALL_SEND_CID_CMD \ 188 (2 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_136) 189#define MMC_ALL_SEND_CID_CMD \ 190 (2 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_136 | \ 191 MMC_OPDCMD) |
141 | 192 |
142#define AT91C_SEL_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) 143#define AT91C_SEND_CSD_CMD (9 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT ) 144#define AT91C_SEND_CID_CMD (10 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT ) 145#define AT91C_MMC_READ_DAT_UNTIL_STOP_CMD (11 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRDIR | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) | 193#define SET_RELATIVE_ADDR_CMD \ 194 (3 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_48 | \ 195 MMC_MAXLAT) 196#define MMC_SET_RELATIVE_ADDR_CMD \ 197 (3 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_48 | \ 198 MMC_MAXLAT | MMC_OPDCMD) |
146 | 199 |
147#define AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) 148#define AT91C_STOP_TRANSMISSION_SYNC_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_SYNC | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) 149#define AT91C_SEND_STATUS_CMD (13 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) 150#define AT91C_GO_INACTIVE_STATE_CMD (15 | AT91C_MCI_RSPTYP_NO ) | 200#define SET_DSR_CMD \ 201 (4 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_NO | \ 202 MMC_MAXLAT) // no tested |
151 | 203 |
204#define SEL_DESEL_CARD_CMD \ 205 (7 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_48 | \ 206 MMC_MAXLAT) 207#define SEND_CSD_CMD \ 208 (9 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_136 | \ 209 MMC_MAXLAT) 210#define SEND_CID_CMD \ 211 (10 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_136 | \ 212 MMC_MAXLAT) 213#define MMC_READ_DAT_UNTIL_STOP_CMD \ 214 (11 | MMC_TRTYP_STREAM | MMC_SPCMD_NONE | \ 215 MMC_RSPTYP_48 | MMC_TRDIR | MMC_TRCMD_START | \ 216 MMC_MAXLAT) 217 218#define STOP_TRANSMISSION_CMD \ 219 (12 | MMC_TRCMD_STOP | MMC_SPCMD_NONE | MMC_RSPTYP_48 | \ 220 MMC_MAXLAT) 221#define STOP_TRANSMISSION_SYNC_CMD \ 222 (12 | MMC_TRCMD_STOP | MMC_SPCMD_SYNC | MMC_RSPTYP_48 | \ 223 MMC_MAXLAT) 224#define SEND_STATUS_CMD \ 225 (13 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_48 | \ 226 MMC_MAXLAT) 227#define GO_INACTIVE_STATE_CMD \ 228 (15 | MMC_RSPTYP_NO) 229 |
|
152//*------------------------------------------------ 153//* Class 2 commands: Block oriented Read commands 154//*------------------------------------------------ 155 | 230//*------------------------------------------------ 231//* Class 2 commands: Block oriented Read commands 232//*------------------------------------------------ 233 |
156#define AT91C_SET_BLOCKLEN_CMD (16 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT ) 157#define AT91C_READ_SINGLE_BLOCK_CMD (17 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_BLOCK | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT) 158#define AT91C_READ_MULTIPLE_BLOCK_CMD (18 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_MULTIPLE | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT) | 234#define SET_BLOCKLEN_CMD (16 | MMC_TRCMD_NO | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_MAXLAT ) 235#define READ_SINGLE_BLOCK_CMD (17 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_START | MMC_TRTYP_BLOCK | MMC_TRDIR | MMC_MAXLAT) 236#define READ_MULTIPLE_BLOCK_CMD (18 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_START | MMC_TRTYP_MULTIPLE | MMC_TRDIR | MMC_MAXLAT) |
159 160//*-------------------------------------------- 161//* Class 3 commands: Sequential write commands 162//*-------------------------------------------- 163 | 237 238//*-------------------------------------------- 239//* Class 3 commands: Sequential write commands 240//*-------------------------------------------- 241 |
164#define AT91C_MMC_WRITE_DAT_UNTIL_STOP_CMD (20 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 & ~(AT91C_MCI_TRDIR) | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) // MMC | 242#define MMC_WRITE_DAT_UNTIL_STOP_CMD (20 | MMC_TRTYP_STREAM| MMC_SPCMD_NONE | MMC_RSPTYP_48 & ~(MMC_TRDIR) | MMC_TRCMD_START | MMC_MAXLAT ) // MMC |
165 166//*------------------------------------------------ 167//* Class 4 commands: Block oriented write commands 168//*------------------------------------------------ 169 | 243 244//*------------------------------------------------ 245//* Class 4 commands: Block oriented write commands 246//*------------------------------------------------ 247 |
170#define AT91C_WRITE_BLOCK_CMD (24 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_BLOCK & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT) 171#define AT91C_WRITE_MULTIPLE_BLOCK_CMD (25 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_MULTIPLE & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT) 172#define AT91C_PROGRAM_CSD_CMD (27 | AT91C_MCI_RSPTYP_48 ) | 248#define WRITE_BLOCK_CMD (24 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_START | (MMC_TRTYP_BLOCK & ~(MMC_TRDIR)) | MMC_MAXLAT) 249#define WRITE_MULTIPLE_BLOCK_CMD (25 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_START | (MMC_TRTYP_MULTIPLE & ~(MMC_TRDIR)) | MMC_MAXLAT) 250#define PROGRAM_CSD_CMD (27 | MMC_RSPTYP_48 ) |
173 174 175//*---------------------------------------- 176//* Class 6 commands: Group Write protect 177//*---------------------------------------- 178 | 251 252 253//*---------------------------------------- 254//* Class 6 commands: Group Write protect 255//*---------------------------------------- 256 |
179#define AT91C_SET_WRITE_PROT_CMD (28 | AT91C_MCI_RSPTYP_48 ) 180#define AT91C_CLR_WRITE_PROT_CMD (29 | AT91C_MCI_RSPTYP_48 ) 181#define AT91C_SEND_WRITE_PROT_CMD (30 | AT91C_MCI_RSPTYP_48 ) | 257#define SET_WRITE_PROT_CMD (28 | MMC_RSPTYP_48 ) 258#define CLR_WRITE_PROT_CMD (29 | MMC_RSPTYP_48 ) 259#define SEND_WRITE_PROT_CMD (30 | MMC_RSPTYP_48 ) |
182 183 184//*---------------------------------------- 185//* Class 5 commands: Erase commands 186//*---------------------------------------- 187 | 260 261 262//*---------------------------------------- 263//* Class 5 commands: Erase commands 264//*---------------------------------------- 265 |
188#define AT91C_TAG_SECTOR_START_CMD (32 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 189#define AT91C_TAG_SECTOR_END_CMD (33 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 190#define AT91C_MMC_UNTAG_SECTOR_CMD (34 | AT91C_MCI_RSPTYP_48 ) 191#define AT91C_MMC_TAG_ERASE_GROUP_START_CMD (35 | AT91C_MCI_RSPTYP_48 ) 192#define AT91C_MMC_TAG_ERASE_GROUP_END_CMD (36 | AT91C_MCI_RSPTYP_48 ) 193#define AT91C_MMC_UNTAG_ERASE_GROUP_CMD (37 | AT91C_MCI_RSPTYP_48 ) 194#define AT91C_ERASE_CMD (38 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT ) | 266#define TAG_SECTOR_START_CMD (32 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 267#define TAG_SECTOR_END_CMD (33 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 268#define MMC_UNTAG_SECTOR_CMD (34 | MMC_RSPTYP_48 ) 269#define MMC_TAG_ERASE_GROUP_START_CMD (35 | MMC_RSPTYP_48 ) 270#define MMC_TAG_ERASE_GROUP_END_CMD (36 | MMC_RSPTYP_48 ) 271#define MMC_UNTAG_ERASE_GROUP_CMD (37 | MMC_RSPTYP_48 ) 272#define ERASE_CMD (38 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT ) |
195 196//*---------------------------------------- 197//* Class 7 commands: Lock commands 198//*---------------------------------------- 199 | 273 274//*---------------------------------------- 275//* Class 7 commands: Lock commands 276//*---------------------------------------- 277 |
200#define AT91C_LOCK_UNLOCK (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested | 278#define LOCK_UNLOCK (42 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) // no tested |
201 202//*----------------------------------------------- 203// Class 8 commands: Application specific commands 204//*----------------------------------------------- 205 | 279 280//*----------------------------------------------- 281// Class 8 commands: Application specific commands 282//*----------------------------------------------- 283 |
206#define AT91C_APP_CMD (55 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 207#define AT91C_GEN_CMD (56 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested | 284#define APP_CMD (55 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 285#define GEN_CMD (56 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) // no tested |
208 | 286 |
209#define AT91C_SDCARD_SET_BUS_WIDTH_CMD (6 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 210#define AT91C_SDCARD_STATUS_CMD (13 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 211#define AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD (22 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 212#define AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 213#define AT91C_SDCARD_APP_OP_COND_CMD (41 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO ) 214#define AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) 215#define AT91C_SDCARD_SEND_SCR_CMD (51 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) | 287#define SDCARD_SET_BUS_WIDTH_CMD (6 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 288#define SDCARD_STATUS_CMD (13 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 289#define SDCARD_SEND_NUM_WR_BLOCKS_CMD (22 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 290#define SDCARD_SET_WR_BLK_ERASE_COUNT_CMD (23 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 291#define SDCARD_APP_OP_COND_CMD (41 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO ) 292#define SDCARD_SET_CLR_CARD_DETECT_CMD (42 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) 293#define SDCARD_SEND_SCR_CMD (51 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) |
216 | 294 |
217#define AT91C_SDCARD_APP_ALL_CMD (AT91C_SDCARD_SET_BUS_WIDTH_CMD +\ 218 AT91C_SDCARD_STATUS_CMD +\ 219 AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD +\ 220 AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD +\ 221 AT91C_SDCARD_APP_OP_COND_CMD +\ 222 AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD +\ 223 AT91C_SDCARD_SEND_SCR_CMD) | 295#define SDCARD_APP_ALL_CMD (SDCARD_SET_BUS_WIDTH_CMD +\ 296 SDCARD_STATUS_CMD +\ 297 SDCARD_SEND_NUM_WR_BLOCKS_CMD +\ 298 SDCARD_SET_WR_BLK_ERASE_COUNT_CMD +\ 299 SDCARD_APP_OP_COND_CMD +\ 300 SDCARD_SET_CLR_CARD_DETECT_CMD +\ 301 SDCARD_SEND_SCR_CMD) |
224 225//*---------------------------------------- 226//* Class 9 commands: IO Mode commands 227//*---------------------------------------- 228 | 302 303//*---------------------------------------- 304//* Class 9 commands: IO Mode commands 305//*---------------------------------------- 306 |
229#define AT91C_MMC_FAST_IO_CMD (39 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT) 230#define AT91C_MMC_GO_IRQ_STATE_CMD (40 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) | 307#define MMC_FAST_IO_CMD (39 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_MAXLAT) 308#define MMC_GO_IRQ_STATE_CMD (40 | MMC_SPCMD_NONE | MMC_RSPTYP_48 | MMC_TRCMD_NO | MMC_MAXLAT) |
231 | 309 |
232///////////////////////////////////////////////////////////////////////////////////////////////////// 233// Functions returnals 234///////////////////////////////////////////////////////////////////////////////////////////////////// 235#define AT91C_CMD_SEND_OK 0 // Command ok 236#define AT91C_CMD_SEND_ERROR -1 // Command failed 237#define AT91C_INIT_OK 2 // Init Successfull 238#define AT91C_INIT_ERROR 3 // Init Failed 239#define AT91C_READ_OK 4 // Read Successfull 240#define AT91C_READ_ERROR 5 // Read Failed 241#define AT91C_WRITE_OK 6 // Write Successfull 242#define AT91C_WRITE_ERROR 7 // Write Failed 243#define AT91C_ERASE_OK 8 // Erase Successfull 244#define AT91C_ERASE_ERROR 9 // Erase Failed 245#define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull 246#define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed 247 248///////////////////////////////////////////////////////////////////////////////////////////////////// 249// MCI_SR Errors 250///////////////////////////////////////////////////////////////////////////////////////////////////// 251#define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE |\ 252 AT91C_MCI_OVRE |\ 253 AT91C_MCI_DTOE |\ 254 AT91C_MCI_DCRCE |\ 255 AT91C_MCI_RTOE |\ 256 AT91C_MCI_RENDE |\ 257 AT91C_MCI_RCRCE |\ 258 AT91C_MCI_RDIRE |\ 259 AT91C_MCI_RINDE) 260 261//////////////////////////////////////////////////////////////////////////////////////////////////// | 310/////////////////////////////////////////////////////////////////////////////// |
262// OCR Register | 311// OCR Register |
263//////////////////////////////////////////////////////////////////////////////////////////////////// | 312/////////////////////////////////////////////////////////////////////////////// |
264#define AT91C_VDD_16_17 (1 << 4) 265#define AT91C_VDD_17_18 (1 << 5) 266#define AT91C_VDD_18_19 (1 << 6) 267#define AT91C_VDD_19_20 (1 << 7) 268#define AT91C_VDD_20_21 (1 << 8) 269#define AT91C_VDD_21_22 (1 << 9) 270#define AT91C_VDD_22_23 (1 << 10) 271#define AT91C_VDD_23_24 (1 << 11) --- 6 unchanged lines hidden (view full) --- 278#define AT91C_VDD_30_31 (1 << 18) 279#define AT91C_VDD_31_32 (1 << 19) 280#define AT91C_VDD_32_33 (1 << 20) 281#define AT91C_VDD_33_34 (1 << 21) 282#define AT91C_VDD_34_35 (1 << 22) 283#define AT91C_VDD_35_36 (1 << 23) 284#define AT91C_CARD_POWER_UP_BUSY (1 << 31) 285 | 313#define AT91C_VDD_16_17 (1 << 4) 314#define AT91C_VDD_17_18 (1 << 5) 315#define AT91C_VDD_18_19 (1 << 6) 316#define AT91C_VDD_19_20 (1 << 7) 317#define AT91C_VDD_20_21 (1 << 8) 318#define AT91C_VDD_21_22 (1 << 9) 319#define AT91C_VDD_22_23 (1 << 10) 320#define AT91C_VDD_23_24 (1 << 11) --- 6 unchanged lines hidden (view full) --- 327#define AT91C_VDD_30_31 (1 << 18) 328#define AT91C_VDD_31_32 (1 << 19) 329#define AT91C_VDD_32_33 (1 << 20) 330#define AT91C_VDD_33_34 (1 << 21) 331#define AT91C_VDD_34_35 (1 << 22) 332#define AT91C_VDD_35_36 (1 << 23) 333#define AT91C_CARD_POWER_UP_BUSY (1 << 31) 334 |
286#define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 +\ 287 AT91C_VDD_28_29 +\ 288 AT91C_VDD_29_30 +\ 289 AT91C_VDD_30_31 +\ 290 AT91C_VDD_31_32 +\ 291 AT91C_VDD_32_33) | 335#define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 | AT91C_VDD_28_29 | \ 336 AT91C_VDD_29_30 | AT91C_VDD_30_31 | AT91C_VDD_31_32 | AT91C_VDD_32_33) |
292 | 337 |
293//////////////////////////////////////////////////////////////////////////////////////////////////// | 338/////////////////////////////////////////////////////////////////////////////// |
294// CURRENT_STATE & READY_FOR_DATA in SDCard Status Register definition (response type R1) | 339// CURRENT_STATE & READY_FOR_DATA in SDCard Status Register definition (response type R1) |
295//////////////////////////////////////////////////////////////////////////////////////////////////// | 340/////////////////////////////////////////////////////////////////////////////// |
296#define AT91C_SR_READY_FOR_DATA (1 << 8) // corresponds to buffer empty signalling on the bus 297#define AT91C_SR_IDLE (0 << 9) 298#define AT91C_SR_READY (1 << 9) 299#define AT91C_SR_IDENT (2 << 9) 300#define AT91C_SR_STBY (3 << 9) 301#define AT91C_SR_TRAN (4 << 9) 302#define AT91C_SR_DATA (5 << 9) 303#define AT91C_SR_RCV (6 << 9) 304#define AT91C_SR_PRG (7 << 9) 305#define AT91C_SR_DIS (8 << 9) 306 307#define AT91C_SR_CARD_SELECTED (AT91C_SR_READY_FOR_DATA + AT91C_SR_TRAN) 308 | 341#define AT91C_SR_READY_FOR_DATA (1 << 8) // corresponds to buffer empty signalling on the bus 342#define AT91C_SR_IDLE (0 << 9) 343#define AT91C_SR_READY (1 << 9) 344#define AT91C_SR_IDENT (2 << 9) 345#define AT91C_SR_STBY (3 << 9) 346#define AT91C_SR_TRAN (4 << 9) 347#define AT91C_SR_DATA (5 << 9) 348#define AT91C_SR_RCV (6 << 9) 349#define AT91C_SR_PRG (7 << 9) 350#define AT91C_SR_DIS (8 << 9) 351 352#define AT91C_SR_CARD_SELECTED (AT91C_SR_READY_FOR_DATA + AT91C_SR_TRAN) 353 |
309///////////////////////////////////////////////////////////////////////////////////////////////////// | 354#define MMC_FIRST_RCA 0xCAFE 355 356/////////////////////////////////////////////////////////////////////////////// |
310// MMC CSD register header File | 357// MMC CSD register header File |
311// AT91C_CSD_xxx_S for shift value 312// AT91C_CSD_xxx_M for mask value 313///////////////////////////////////////////////////////////////////////////////////////////////////// | 358// CSD_x_xxx_S for shift value for word x 359// CSD_x_xxx_M for mask value for word x 360/////////////////////////////////////////////////////////////////////////////// |
314 315// First Response INT <=> CSD[3] : bits 0 to 31 | 361 362// First Response INT <=> CSD[3] : bits 0 to 31 |
316#define AT91C_CSD_BIT0_S 0 // [0:0] 317#define AT91C_CSD_BIT0_M 0x01 318#define AT91C_CSD_CRC_S 1 // [7:1] 319#define AT91C_CSD_CRC_M 0x7F 320#define AT91C_CSD_MMC_ECC_S 8 // [9:8] reserved for MMC compatibility 321#define AT91C_CSD_MMC_ECC_M 0x03 322#define AT91C_CSD_FILE_FMT_S 10 // [11:10] 323#define AT91C_CSD_FILE_FMT_M 0x03 324#define AT91C_CSD_TMP_WP_S 12 // [12:12] 325#define AT91C_CSD_TMP_WP_M 0x01 326#define AT91C_CSD_PERM_WP_S 13 // [13:13] 327#define AT91C_CSD_PERM_WP_M 0x01 328#define AT91C_CSD_COPY_S 14 // [14:14] 329#define AT91C_CSD_COPY_M 0x01 330#define AT91C_CSD_FILE_FMT_GRP_S 15 // [15:15] 331#define AT91C_CSD_FILE_FMT_GRP_M 0x01 332// reserved 16 // [20:16] 333// reserved 0x1F 334#define AT91C_CSD_WBLOCK_P_S 21 // [21:21] 335#define AT91C_CSD_WBLOCK_P_M 0x01 336#define AT91C_CSD_WBLEN_S 22 // [25:22] 337#define AT91C_CSD_WBLEN_M 0x0F 338#define AT91C_CSD_R2W_F_S 26 // [28:26] 339#define AT91C_CSD_R2W_F_M 0x07 340#define AT91C_CSD_MMC_DEF_ECC_S 29 // [30:29] reserved for MMC compatibility 341#define AT91C_CSD_MMC_DEF_ECC_M 0x03 342#define AT91C_CSD_WP_GRP_EN_S 31 // [31:31] 343#define AT91C_CSD_WP_GRP_EN_M 0x01 | 363#define CSD_3_BIT0_S 0 // [0:0] 364#define CSD_3_BIT0_M 0x01 365#define CSD_3_CRC_S 1 // [7:1] 366#define CSD_3_CRC_M 0x7F 367#define CSD_3_MMC_ECC_S 8 // [9:8] reserved for MMC compatibility 368#define CSD_3_MMC_ECC_M 0x03 369#define CSD_3_FILE_FMT_S 10 // [11:10] 370#define CSD_3_FILE_FMT_M 0x03 371#define CSD_3_TMP_WP_S 12 // [12:12] 372#define CSD_3_TMP_WP_M 0x01 373#define CSD_3_PERM_WP_S 13 // [13:13] 374#define CSD_3_PERM_WP_M 0x01 375#define CSD_3_COPY_S 14 // [14:14] 376#define CSD_3_COPY_M 0x01 377#define CSD_3_FILE_FMT_GRP_S 15 // [15:15] 378#define CSD_3_FILE_FMT_GRP_M 0x01 379// reserved 16 // [20:16] 380// reserved 0x1F 381#define CSD_3_WBLOCK_P_S 21 // [21:21] 382#define CSD_3_WBLOCK_P_M 0x01 383#define CSD_3_WBLEN_S 22 // [25:22] 384#define CSD_3_WBLEN_M 0x0F 385#define CSD_3_R2W_F_S 26 // [28:26] 386#define CSD_3_R2W_F_M 0x07 387#define CSD_3_MMC_DEF_ECC_S 29 // [30:29] reserved for MMC compatibility 388#define CSD_3_MMC_DEF_ECC_M 0x03 389#define CSD_3_WP_GRP_EN_S 31 // [31:31] 390#define CSD_3_WP_GRP_EN_M 0x01 |
344 345// Seconde Response INT <=> CSD[2] : bits 32 to 63 | 391 392// Seconde Response INT <=> CSD[2] : bits 32 to 63 |
346#define AT91C_CSD_v21_WP_GRP_SIZE_S 0 // [38:32] 347#define AT91C_CSD_v21_WP_GRP_SIZE_M 0x7F 348#define AT91C_CSD_v21_SECT_SIZE_S 7 // [45:39] 349#define AT91C_CSD_v21_SECT_SIZE_M 0x7F 350#define AT91C_CSD_v21_ER_BLEN_EN_S 14 // [46:46] 351#define AT91C_CSD_v21_ER_BLEN_EN_M 0x01 | 393#define CSD_2_v21_WP_GRP_SIZE_S 0 // [38:32] 394#define CSD_2_v21_WP_GRP_SIZE_M 0x7F 395#define CSD_2_v21_SECT_SIZE_S 7 // [45:39] 396#define CSD_2_v21_SECT_SIZE_M 0x7F 397#define CSD_2_v21_ER_BLEN_EN_S 14 // [46:46] 398#define CSD_2_v21_ER_BLEN_EN_M 0x01 |
352 | 399 |
353#define AT91C_CSD_v22_WP_GRP_SIZE_S 0 // [36:32] 354#define AT91C_CSD_v22_WP_GRP_SIZE_M 0x1F 355#define AT91C_CSD_v22_ER_GRP_SIZE_S 5 // [41:37] 356#define AT91C_CSD_v22_ER_GRP_SIZE_M 0x1F 357#define AT91C_CSD_v22_SECT_SIZE_S 10 // [46:42] 358#define AT91C_CSD_v22_SECT_SIZE_M 0x1F | 400#define CSD_2_v22_WP_GRP_SIZE_S 0 // [36:32] 401#define CSD_2_v22_WP_GRP_SIZE_M 0x1F 402#define CSD_2_v22_ER_GRP_SIZE_S 5 // [41:37] 403#define CSD_2_v22_ER_GRP_SIZE_M 0x1F 404#define CSD_2_v22_SECT_SIZE_S 10 // [46:42] 405#define CSD_2_v22_SECT_SIZE_M 0x1F |
359 | 406 |
360#define AT91C_CSD_C_SIZE_M_S 15 // [49:47] 361#define AT91C_CSD_C_SIZE_M_M 0x07 362#define AT91C_CSD_VDD_WMAX_S 18 // [52:50] 363#define AT91C_CSD_VDD_WMAX_M 0x07 364#define AT91C_CSD_VDD_WMIN_S 21 // [55:53] 365#define AT91C_CSD_VDD_WMIN_M 0x07 366#define AT91C_CSD_RCUR_MAX_S 24 // [58:56] 367#define AT91C_CSD_RCUR_MAX_M 0x07 368#define AT91C_CSD_RCUR_MIN_S 27 // [61:59] 369#define AT91C_CSD_RCUR_MIN_M 0x07 370#define AT91C_CSD_CSIZE_L_S 30 // [63:62] <=> 2 LSB of CSIZE 371#define AT91C_CSD_CSIZE_L_M 0x03 | 407#define CSD_2_C_SIZE_M_S 15 // [49:47] 408#define CSD_2_C_SIZE_M_M 0x07 409#define CSD_2_VDD_WMAX_S 18 // [52:50] 410#define CSD_2_VDD_WMAX_M 0x07 411#define CSD_2_VDD_WMIN_S 21 // [55:53] 412#define CSD_2_VDD_WMIN_M 0x07 413#define CSD_2_RCUR_MAX_S 24 // [58:56] 414#define CSD_2_RCUR_MAX_M 0x07 415#define CSD_2_RCUR_MIN_S 27 // [61:59] 416#define CSD_2_RCUR_MIN_M 0x07 417#define CSD_2_CSIZE_L_S 30 // [63:62] <=> 2 LSB of CSIZE 418#define CSD_2_CSIZE_L_M 0x03 |
372 373// Third Response INT <=> CSD[1] : bits 64 to 95 | 419 420// Third Response INT <=> CSD[1] : bits 64 to 95 |
374#define AT91C_CSD_CSIZE_H_S 0 // [73:64] <=> 10 MSB of CSIZE 375#define AT91C_CSD_CSIZE_H_M 0x03FF 376// reserved 10 // [75:74] 377// reserved 0x03 378#define AT91C_CSD_DSR_I_S 12 // [76:76] 379#define AT91C_CSD_DSR_I_M 0x01 380#define AT91C_CSD_RD_B_MIS_S 13 // [77:77] 381#define AT91C_CSD_RD_B_MIS_M 0x01 382#define AT91C_CSD_WR_B_MIS_S 14 // [78:78] 383#define AT91C_CSD_WR_B_MIS_M 0x01 384#define AT91C_CSD_RD_B_PAR_S 15 // [79:79] 385#define AT91C_CSD_RD_B_PAR_M 0x01 386#define AT91C_CSD_RD_B_LEN_S 16 // [83:80] 387#define AT91C_CSD_RD_B_LEN_M 0x0F 388#define AT91C_CSD_CCC_S 20 // [95:84] 389#define AT91C_CSD_CCC_M 0x0FFF | 421#define CSD_1_CSIZE_H_S 0 // [73:64] <=> 10 MSB of CSIZE 422#define CSD_1_CSIZE_H_M 0x03FF 423// reserved 10 // [75:74] 424// reserved 0x03 425#define CSD_1_DSR_I_S 12 // [76:76] 426#define CSD_1_DSR_I_M 0x01 427#define CSD_1_RD_B_MIS_S 13 // [77:77] 428#define CSD_1_RD_B_MIS_M 0x01 429#define CSD_1_WR_B_MIS_S 14 // [78:78] 430#define CSD_1_WR_B_MIS_M 0x01 431#define CSD_1_RD_B_PAR_S 15 // [79:79] 432#define CSD_1_RD_B_PAR_M 0x01 433#define CSD_1_RD_B_LEN_S 16 // [83:80] 434#define CSD_1_RD_B_LEN_M 0x0F 435#define CSD_1_CCC_S 20 // [95:84] 436#define CSD_1_CCC_M 0x0FFF |
390 391// Fourth Response INT <=> CSD[0] : bits 96 to 127 | 437 438// Fourth Response INT <=> CSD[0] : bits 96 to 127 |
392#define AT91C_CSD_TRANS_SPEED_S 0 // [103:96] 393#define AT91C_CSD_TRANS_SPEED_M 0xFF 394#define AT91C_CSD_NSAC_S 8 // [111:104] 395#define AT91C_CSD_NSAC_M 0xFF 396#define AT91C_CSD_TAAC_S 16 // [119:112] 397#define AT91C_CSD_TAAC_M 0xFF 398// reserved 24 // [121:120] 399// reserved 0x03 400#define AT91C_CSD_MMC_SPEC_VERS_S 26 // [125:122] reserved for MMC compatibility 401#define AT91C_CSD_MMC_SPEC_VERS_M 0x0F 402#define AT91C_CSD_STRUCT_S 30 // [127:126] 403#define AT91C_CSD_STRUCT_M 0x03 | 439#define CSD_0_TRANS_SPEED_S 0 // [103:96] 440#define CSD_0_TRANS_SPEED_M 0xFF 441#define CSD_0_NSAC_S 8 // [111:104] 442#define CSD_0_NSAC_M 0xFF 443#define CSD_0_TAAC_S 16 // [119:112] 444#define CSD_0_TAAC_M 0xFF 445// reserved 24 // [121:120] 446// reserved 0x03 447#define CSD_0_MMC_SPEC_VERS_S 26 // [125:122] reserved for MMC compatibility 448#define CSD_0_MMC_SPEC_VERS_M 0x0F 449#define CSD_0_STRUCT_S 30 // [127:126] 450#define CSD_0_STRUCT_M 0x03 |
404 | 451 |
405///////////////////////////////////////////////////////////////////////////////////////////////////// | 452/////////////////////////////////////////////////////////////////////////////// |
406 407void AT91F_MCI_Device_Handler(AT91PS_MciDevice,unsigned int); 408AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice); 409AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(unsigned int); 410AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock(AT91PS_MciDevice,int,unsigned int *,int); 411AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock(AT91PS_MciDevice,int,unsigned int *,int); 412#if 0 413AT91S_MCIDeviceStatus AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device); 414AT91S_MCIDeviceStatus AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address); 415#endif 416 417#endif | 453 454void AT91F_MCI_Device_Handler(AT91PS_MciDevice,unsigned int); 455AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice); 456AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(unsigned int); 457AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock(AT91PS_MciDevice,int,unsigned int *,int); 458AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock(AT91PS_MciDevice,int,unsigned int *,int); 459#if 0 460AT91S_MCIDeviceStatus AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device); 461AT91S_MCIDeviceStatus AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address); 462#endif 463 464#endif |