| at91rm9200_lowlevel.c (163533) | at91rm9200_lowlevel.c (164137) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * This software is derived from software provide by Kwikbyte who specifically 25 * disclaimed copyright on the code. 26 * | 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 10 unchanged lines hidden (view full) --- 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * This software is derived from software provide by Kwikbyte who specifically 25 * disclaimed copyright on the code. 26 * |
| 27 * $FreeBSD: head/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c 163533 2006-10-20 09:12:05Z imp $ | 27 * $FreeBSD: head/sys/boot/arm/at91/libat91/at91rm9200_lowlevel.c 164137 2006-11-09 20:32:36Z imp $ |
| 28 */ 29 30#include "at91rm9200.h" 31#include "at91rm9200_lowlevel.h" 32 33extern int __bss_start__[]; 34extern int __bss_end__[]; 35 --- 12 unchanged lines hidden (view full) --- 48 int *i; 49 50 AT91PS_USART pUSART = (AT91PS_USART)AT91C_BASE_DBGU; 51 AT91PS_PDC pPDC = (AT91PS_PDC)&(pUSART->US_RPR); 52 53 register unsigned value; 54 volatile sdram_size_t *p = (sdram_size_t *)SDRAM_BASE; 55 | 28 */ 29 30#include "at91rm9200.h" 31#include "at91rm9200_lowlevel.h" 32 33extern int __bss_start__[]; 34extern int __bss_end__[]; 35 --- 12 unchanged lines hidden (view full) --- 48 int *i; 49 50 AT91PS_USART pUSART = (AT91PS_USART)AT91C_BASE_DBGU; 51 AT91PS_PDC pPDC = (AT91PS_PDC)&(pUSART->US_RPR); 52 53 register unsigned value; 54 volatile sdram_size_t *p = (sdram_size_t *)SDRAM_BASE; 55 |
| 56#if 0 | |
| 57#ifdef BOOT_TSC 58 // For the TSC board, we turn ON the one LED we have while 59 // early in boot. 60 AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC10; 61 AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC10; 62 AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC10; 63#endif | 56#ifdef BOOT_TSC 57 // For the TSC board, we turn ON the one LED we have while 58 // early in boot. 59 AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC10; 60 AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC10; 61 AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC10; 62#endif |
| 63 64#ifdef BOOT_KB920X 65 AT91C_BASE_PIOC->PIO_PER = AT91C_PIO_PC18 | AT91C_PIO_PC19 | 66 AT91C_PIO_PC20; 67 AT91C_BASE_PIOC->PIO_OER = AT91C_PIO_PC18 | AT91C_PIO_PC19 | 68 AT91C_PIO_PC20; 69 AT91C_BASE_PIOC->PIO_SODR = AT91C_PIO_PC18 | AT91C_PIO_PC19 | 70 AT91C_PIO_PC20; 71 AT91C_BASE_PIOC->PIO_CODR = AT91C_PIO_PC18; |
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| 64#endif 65 66 // configure clocks 67 // assume: 68 // main osc = 10Mhz 69 // PLLB configured for 96MHz (48MHz after div) 70 // CSS = PLLB 71 // set PLLA = 180MHz --- 23 unchanged lines hidden (view full) --- 95 value &= ~AT91C_PMC_CSS; 96 value |= AT91C_PMC_CSS_PLLA_CLK; 97 AT91C_BASE_PMC->PMC_MCKR = value; 98 99 // wait for update 100 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) 101 continue; 102 | 72#endif 73 74 // configure clocks 75 // assume: 76 // main osc = 10Mhz 77 // PLLB configured for 96MHz (48MHz after div) 78 // CSS = PLLB 79 // set PLLA = 180MHz --- 23 unchanged lines hidden (view full) --- 103 value &= ~AT91C_PMC_CSS; 104 value |= AT91C_PMC_CSS_PLLA_CLK; 105 AT91C_BASE_PMC->PMC_MCKR = value; 106 107 // wait for update 108 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)) 109 continue; 110 |
| 103#ifdef BOOT_KB9202 | 111#ifdef BOOT_KB920X |
| 104 // setup flash access (allow ample margin) 105 // 9 wait states, 1 setup, 1 hold, 1 float for 8-bit device 106 ((AT91PS_SMC2)AT91C_BASE_SMC2)->SMC2_CSR[0] = 107 AT91C_SMC2_WSEN | 108 (9 & AT91C_SMC2_NWS) | 109 ((1 << 8) & AT91C_SMC2_TDF) | 110 AT91C_SMC2_DBW_8 | 111 ((1 << 24) & AT91C_SMC2_RWSETUP) | --- 99 unchanged lines hidden --- | 112 // setup flash access (allow ample margin) 113 // 9 wait states, 1 setup, 1 hold, 1 float for 8-bit device 114 ((AT91PS_SMC2)AT91C_BASE_SMC2)->SMC2_CSR[0] = 115 AT91C_SMC2_WSEN | 116 (9 & AT91C_SMC2_NWS) | 117 ((1 << 8) & AT91C_SMC2_TDF) | 118 AT91C_SMC2_DBW_8 | 119 ((1 << 24) & AT91C_SMC2_RWSETUP) | --- 99 unchanged lines hidden --- |