| if_npereg.h (164426) | if_npereg.h (186352) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * | 1/*- 2 * Copyright (c) 2006 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 12 unchanged lines hidden (view full) --- 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * |
| 29 * $FreeBSD: head/sys/arm/xscale/ixp425/if_npereg.h 164426 2006-11-19 23:55:23Z sam $ | 29 * $FreeBSD: head/sys/arm/xscale/ixp425/if_npereg.h 186352 2008-12-20 03:26:09Z sam $ |
| 30 */ 31 32/* 33 * Copyright (c) 2001-2005, Intel Corporation. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions --- 41 unchanged lines hidden (view full) --- 79 struct { /* NPE shared area, cacheline aligned */ 80 uint32_t next; /* phys addr of next segment */ 81 uint32_t len; /* buffer/segment length (bytes) */ 82 uint32_t data; /* phys addr of data segment */ 83 uint32_t pad[5]; /* pad to cacheline */ 84 } ix_ne[NPE_MAXSEG]; 85}; 86 | 30 */ 31 32/* 33 * Copyright (c) 2001-2005, Intel Corporation. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions --- 41 unchanged lines hidden (view full) --- 79 struct { /* NPE shared area, cacheline aligned */ 80 uint32_t next; /* phys addr of next segment */ 81 uint32_t len; /* buffer/segment length (bytes) */ 82 uint32_t data; /* phys addr of data segment */ 83 uint32_t pad[5]; /* pad to cacheline */ 84 } ix_ne[NPE_MAXSEG]; 85}; 86 |
| 87/* NPE ID's */ 88#define NPE_A 0 89#define NPE_B 1 90#define NPE_C 2 91#define NPE_MAX (NPE_C+1) 92 | |
| 93#define NPE_PORTS_MAX 2 /* logical ports */ 94#define NPE_FRAME_SIZE_DEFAULT 1536 95#define NPE_FRAME_SIZE_MAX (65536-64) 96#define NPE_FRAME_SIZE_MIN 64 97 98/* 99 * Queue Manager-related definitions. 100 * --- 188 unchanged lines hidden --- | 87#define NPE_PORTS_MAX 2 /* logical ports */ 88#define NPE_FRAME_SIZE_DEFAULT 1536 89#define NPE_FRAME_SIZE_MAX (65536-64) 90#define NPE_FRAME_SIZE_MIN 64 91 92/* 93 * Queue Manager-related definitions. 94 * --- 188 unchanged lines hidden --- |