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1/*-
2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
4 * All rights reserved.
5 *
6 * This code is derived from software written for Brini by Mark Brinicombe
7 *
8 * Redistribution and use in source and binary forms, with or without

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34 *
35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
36 */
37
38#include "opt_ddb.h"
39#include "opt_platform.h"
40
41#include <sys/cdefs.h>
42__FBSDID("$FreeBSD: stable/10/sys/arm/lpc/lpc_machdep.c 266084 2014-05-14 19:18:58Z ian $");
43
44#define _ARM32_BUS_DMA_PRIVATE
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/bus.h>
48
49#include <vm/vm.h>
50#include <vm/pmap.h>
51
52#include <machine/bus.h>
53#include <machine/fdt.h>
54#include <machine/devmap.h>
55#include <machine/machdep.h>
56
57#include <arm/lpc/lpcreg.h>
58#include <arm/lpc/lpcvar.h>
59
60#include <dev/fdt/fdt_common.h>
61
62vm_offset_t
63initarm_lastaddr(void)
64{
65
66 return (arm_devmap_lastaddr());
67}
68
69void
70initarm_early_init(void)
71{
72}
73
74void
75initarm_gpio_init(void)
76{
77
78 /*
79 * Set initial values of GPIO output ports
80 */
81 platform_gpio_init();
82}
83
84void
85initarm_late_init(void)
86{
87}
88
89/*
90 * Add a single static device mapping.
91 * The values used were taken from the ranges property of the SoC node in the
92 * dts file when this code was converted to arm_devmap_add_entry().
93 */
94int
95initarm_devmap_init(void)
96{
97
98 arm_devmap_add_entry(LPC_DEV_PHYS_BASE, LPC_DEV_SIZE);
99 return (0);
100}
101
102struct arm32_dma_range *
103bus_dma_get_range(void)
104{
105
106 return (NULL);

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111{
112
113 return (0);
114}
115
116void
117cpu_reset(void)
118{
119 bus_space_tag_t bst;
120 bus_space_handle_t bsh;
121
122 bst = fdtbus_bs_tag;
123
124 /* Enable WDT */
125 bus_space_map(bst, LPC_CLKPWR_PHYS_BASE, LPC_CLKPWR_SIZE, 0, &bsh);
126 bus_space_write_4(bst, bsh, LPC_CLKPWR_TIMCLK_CTRL,
127 LPC_CLKPWR_TIMCLK_CTRL_WATCHDOG);
128 bus_space_unmap(bst, bsh, LPC_CLKPWR_SIZE);
129
130 /* Instant assert of RESETOUT_N with pulse length 1ms */
131 bus_space_map(bst, LPC_WDTIM_PHYS_BASE, LPC_WDTIM_SIZE, 0, &bsh);
132 bus_space_write_4(bst, bsh, LPC_WDTIM_PULSE, 13000);
133 bus_space_write_4(bst, bsh, LPC_WDTIM_MCTRL, 0x70);
134 bus_space_unmap(bst, bsh, LPC_WDTIM_SIZE);
135
136 for (;;)
137 continue;
138}
139