| armreg.h (266058) | armreg.h (266198) |
|---|---|
| 1/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2001 Ben Harris 5 * Copyright (c) 1994-1996 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * --- 21 unchanged lines hidden (view full) --- 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * | 1/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2001 Ben Harris 5 * Copyright (c) 1994-1996 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * --- 21 unchanged lines hidden (view full) --- 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * |
| 38 * $FreeBSD: stable/10/sys/arm/include/armreg.h 266058 2014-05-14 17:40:18Z ian $ | 38 * $FreeBSD: stable/10/sys/arm/include/armreg.h 266198 2014-05-15 22:03:24Z ian $ |
| 39 */ 40 41#ifndef MACHINE_ARMREG_H 42#define MACHINE_ARMREG_H 43 44#define INSN_SIZE 4 45#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 46#define PSR_MODE 0x0000001f /* mode mask */ --- 351 unchanged lines hidden (view full) --- 398#define FAULT_TRANS_F 0x06 /* Translation -- Flag */ 399#define FAULT_TRANS_P 0x07 /* Translation -- Page */ 400#define FAULT_DOMAIN_S 0x09 /* Domain -- Section */ 401#define FAULT_DOMAIN_P 0x0b /* Domain -- Page */ 402#define FAULT_PERM_S 0x0d /* Permission -- Section */ 403#define FAULT_PERM_P 0x0f /* Permission -- Page */ 404 405#define FAULT_IMPRECISE 0x400 /* Imprecise exception (XSCALE) */ | 39 */ 40 41#ifndef MACHINE_ARMREG_H 42#define MACHINE_ARMREG_H 43 44#define INSN_SIZE 4 45#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 46#define PSR_MODE 0x0000001f /* mode mask */ --- 351 unchanged lines hidden (view full) --- 398#define FAULT_TRANS_F 0x06 /* Translation -- Flag */ 399#define FAULT_TRANS_P 0x07 /* Translation -- Page */ 400#define FAULT_DOMAIN_S 0x09 /* Domain -- Section */ 401#define FAULT_DOMAIN_P 0x0b /* Domain -- Page */ 402#define FAULT_PERM_S 0x0d /* Permission -- Section */ 403#define FAULT_PERM_P 0x0f /* Permission -- Page */ 404 405#define FAULT_IMPRECISE 0x400 /* Imprecise exception (XSCALE) */ |
| 406#define FAULT_EXTERNAL 0x400 /* External abort (armv6+) */ 407#define FAULT_WNR 0x800 /* Write-not-Read access (armv6+) */ |
|
| 406 407/* 408 * Address of the vector page, low and high versions. 409 */ 410#ifndef __ASSEMBLER__ 411#define ARM_VECTORS_LOW 0x00000000U 412#define ARM_VECTORS_HIGH 0xffff0000U 413#else --- 22 unchanged lines hidden --- | 408 409/* 410 * Address of the vector page, low and high versions. 411 */ 412#ifndef __ASSEMBLER__ 413#define ARM_VECTORS_LOW 0x00000000U 414#define ARM_VECTORS_HIGH 0xffff0000U 415#else --- 22 unchanged lines hidden --- |