| armreg.h (261455) | armreg.h (266046) |
|---|---|
| 1/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2001 Ben Harris 5 * Copyright (c) 1994-1996 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * --- 21 unchanged lines hidden (view full) --- 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * | 1/* $NetBSD: armreg.h,v 1.37 2007/01/06 00:50:54 christos Exp $ */ 2 3/*- 4 * Copyright (c) 1998, 2001 Ben Harris 5 * Copyright (c) 1994-1996 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * --- 21 unchanged lines hidden (view full) --- 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * |
| 38 * $FreeBSD: stable/10/sys/arm/include/armreg.h 261455 2014-02-04 03:36:42Z eadler $ | 38 * $FreeBSD: stable/10/sys/arm/include/armreg.h 266046 2014-05-14 16:32:27Z ian $ |
| 39 */ 40 41#ifndef MACHINE_ARMREG_H 42#define MACHINE_ARMREG_H 43 44#define INSN_SIZE 4 45#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 46#define PSR_MODE 0x0000001f /* mode mask */ --- 120 unchanged lines hidden (view full) --- 167 * L2-cache instructions so need to disable it. 0x41159260 is a generic ARM926E-S ID. 168 */ 169#ifdef SOC_MV_LOKIPLUS 170#define CPU_ID_MV88FR571_41 0x00000000 171#else 172#define CPU_ID_MV88FR571_41 0x41159260 /* Marvell Feroceon 88FR571-VD Core (actual ID from CPU reg) */ 173#endif 174 | 39 */ 40 41#ifndef MACHINE_ARMREG_H 42#define MACHINE_ARMREG_H 43 44#define INSN_SIZE 4 45#define INSN_COND_MASK 0xf0000000 /* Condition mask */ 46#define PSR_MODE 0x0000001f /* mode mask */ --- 120 unchanged lines hidden (view full) --- 167 * L2-cache instructions so need to disable it. 0x41159260 is a generic ARM926E-S ID. 168 */ 169#ifdef SOC_MV_LOKIPLUS 170#define CPU_ID_MV88FR571_41 0x00000000 171#else 172#define CPU_ID_MV88FR571_41 0x41159260 /* Marvell Feroceon 88FR571-VD Core (actual ID from CPU reg) */ 173#endif 174 |
| 175#define CPU_ID_MV88SV581X_V6 0x560F5810 /* Marvell Sheeva 88SV581x v6 Core */ | |
| 176#define CPU_ID_MV88SV581X_V7 0x561F5810 /* Marvell Sheeva 88SV581x v7 Core */ | 175#define CPU_ID_MV88SV581X_V7 0x561F5810 /* Marvell Sheeva 88SV581x v7 Core */ |
| 177#define CPU_ID_MV88SV584X_V6 0x561F5840 /* Marvell Sheeva 88SV584x v6 Core */ | |
| 178#define CPU_ID_MV88SV584X_V7 0x562F5840 /* Marvell Sheeva 88SV584x v7 Core */ 179/* Marvell's CPUIDs with ARM ID in implementor field */ | 176#define CPU_ID_MV88SV584X_V7 0x562F5840 /* Marvell Sheeva 88SV584x v7 Core */ 177/* Marvell's CPUIDs with ARM ID in implementor field */ |
| 180#define CPU_ID_ARM_88SV581X_V6 0x410fb760 /* Marvell Sheeva 88SV581x v6 Core */ | |
| 181#define CPU_ID_ARM_88SV581X_V7 0x413FC080 /* Marvell Sheeva 88SV581x v7 Core */ | 178#define CPU_ID_ARM_88SV581X_V7 0x413FC080 /* Marvell Sheeva 88SV581x v7 Core */ |
| 182#define CPU_ID_ARM_88SV584X_V6 0x410FB020 /* Marvell Sheeva 88SV584x v6 Core */ | |
| 183 184#define CPU_ID_FA526 0x66015260 185#define CPU_ID_FA626TE 0x66056260 186#define CPU_ID_SA1110 0x6901b110 187#define CPU_ID_IXP1200 0x6901c120 188#define CPU_ID_80200 0x69052000 189#define CPU_ID_PXA250 0x69052100 /* sans core revision */ 190#define CPU_ID_PXA210 0x69052120 --- 248 unchanged lines hidden --- | 179 180#define CPU_ID_FA526 0x66015260 181#define CPU_ID_FA626TE 0x66056260 182#define CPU_ID_SA1110 0x6901b110 183#define CPU_ID_IXP1200 0x6901c120 184#define CPU_ID_80200 0x69052000 185#define CPU_ID_PXA250 0x69052100 /* sans core revision */ 186#define CPU_ID_PXA210 0x69052120 --- 248 unchanged lines hidden --- |