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vf_iomuxc.c (266152) vf_iomuxc.c (266203)
1/*-
2 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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25 */
26
27/*
28 * Vybrid Family Input/Output Multiplexer Controller (IOMUXC)
29 * Chapter 5, Vybrid Reference Manual, Rev. 5, 07/2013
30 */
31
32#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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25 */
26
27/*
28 * Vybrid Family Input/Output Multiplexer Controller (IOMUXC)
29 * Chapter 5, Vybrid Reference Manual, Rev. 5, 07/2013
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/vybrid/vf_iomuxc.c 266152 2014-05-15 16:11:06Z ian $");
33__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/vybrid/vf_iomuxc.c 266203 2014-05-16 00:14:50Z ian $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/bus.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/malloc.h>
41#include <sys/rman.h>

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51#include <machine/bus.h>
52#include <machine/fdt.h>
53#include <machine/cpu.h>
54#include <machine/intr.h>
55
56#include <arm/freescale/vybrid/vf_iomuxc.h>
57#include <arm/freescale/vybrid/vf_common.h>
58
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/bus.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/malloc.h>
41#include <sys/rman.h>

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51#include <machine/bus.h>
52#include <machine/fdt.h>
53#include <machine/cpu.h>
54#include <machine/intr.h>
55
56#include <arm/freescale/vybrid/vf_iomuxc.h>
57#include <arm/freescale/vybrid/vf_common.h>
58
59#define IBE (1 << 0) /* Input Buffer Enable Field */
60#define OBE (1 << 1) /* Output Buffer Enable Field. */
61#define PUE (1 << 2) /* Pull / Keep Select Field. */
62#define PKE (1 << 3) /* Pull / Keep Enable Field. */
63#define PUS_MASK (3 << 4) /* Pull Up / Down Config Field. */
64#define DSE_MASK (7 << 6) /* Drive Strength Field. */
65#define HYS (1 << 9) /* Hysteresis Enable Field */
66
67#define MUX_MODE_MASK 7
68#define MUX_MODE_SHIFT 20
69#define MUX_MODE_GPIO 0
70#define MUX_MODE_VBUS_EN_OTG 2
71
59#define MUX_MODE_MASK 7
60#define MUX_MODE_SHIFT 20
61#define MUX_MODE_GPIO 0
62#define MUX_MODE_VBUS_EN_OTG 2
63
72#define PUS_22_KOHM_PULL_UP (3 << 4)
73#define DSE_25_OHM (6 << 6)
64#define IBE (1 << 0) /* Input Buffer Enable Field */
65#define OBE (1 << 1) /* Output Buffer Enable Field. */
66#define PUE (1 << 2) /* Pull / Keep Select Field. */
67#define PKE (1 << 3) /* Pull / Keep Enable Field. */
68#define HYS (1 << 9) /* Hysteresis Enable Field */
69#define ODE (1 << 10) /* Open Drain Enable Field. */
70#define SRE (1 << 11) /* Slew Rate Field. */
74
71
72#define SPEED_SHIFT 12
73#define SPEED_MASK 0x3
74#define SPEED_LOW 0 /* 50 MHz */
75#define SPEED_MEDIUM 0x1 /* 100 MHz */
76#define SPEED_HIGH 0x3 /* 200 MHz */
77
78#define PUS_SHIFT 4 /* Pull Up / Down Config Field Shift */
79#define PUS_MASK 0x3
80#define PUS_100_KOHM_PULL_DOWN 0
81#define PUS_47_KOHM_PULL_UP 0x1
82#define PUS_100_KOHM_PULL_UP 0x2
83#define PUS_22_KOHM_PULL_UP 0x3
84
85#define DSE_SHIFT 6 /* Drive Strength Field Shift */
86#define DSE_MASK 0x7
87#define DSE_DISABLED 0 /* Output driver disabled */
88#define DSE_150_OHM 0x1
89#define DSE_75_OHM 0x2
90#define DSE_50_OHM 0x3
91#define DSE_37_OHM 0x4
92#define DSE_30_OHM 0x5
93#define DSE_25_OHM 0x6
94#define DSE_20_OHM 0x7
95
75#define MAX_MUX_LEN 1024
76
77struct iomuxc_softc {
78 struct resource *tmr_res[1];
79 bus_space_tag_t bst;
80 bus_space_handle_t bsh;
81 device_t dev;
82};

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96 if (!ofw_bus_is_compatible(dev, "fsl,mvf600-iomuxc"))
97 return (ENXIO);
98
99 device_set_desc(dev, "Vybrid Family IOMUXC Unit");
100 return (BUS_PROBE_DEFAULT);
101}
102
103static int
96#define MAX_MUX_LEN 1024
97
98struct iomuxc_softc {
99 struct resource *tmr_res[1];
100 bus_space_tag_t bst;
101 bus_space_handle_t bsh;
102 device_t dev;
103};

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117 if (!ofw_bus_is_compatible(dev, "fsl,mvf600-iomuxc"))
118 return (ENXIO);
119
120 device_set_desc(dev, "Vybrid Family IOMUXC Unit");
121 return (BUS_PROBE_DEFAULT);
122}
123
124static int
104configure_pad(struct iomuxc_softc *sc, int pad, int mux_mode)
105{
106 int reg;
107
108 reg = READ4(sc, pad);
109 reg &= ~(MUX_MODE_MASK << MUX_MODE_SHIFT);
110 reg |= (mux_mode << MUX_MODE_SHIFT);
111 WRITE4(sc, pad, reg);
112
113 return (0);
114}
115
116static int
117pinmux_set(struct iomuxc_softc *sc)
118{
119 phandle_t child, parent, root;
120 pcell_t iomux_config[MAX_MUX_LEN];
121 int len;
122 int values;
123 int pin;
125pinmux_set(struct iomuxc_softc *sc)
126{
127 phandle_t child, parent, root;
128 pcell_t iomux_config[MAX_MUX_LEN];
129 int len;
130 int values;
131 int pin;
124 int mux_mode;
132 int pin_cfg;
125 int i;
126
127 root = OF_finddevice("/");
128 len = 0;
129 parent = root;
130
131 /* Find 'iomux_config' prop in the nodes */
132 for (child = OF_child(parent); child != 0; child = OF_peer(child)) {

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141 continue;
142
143 if ((len = OF_getproplen(child, "iomux_config")) > 0) {
144 OF_getprop(child, "iomux_config", &iomux_config, len);
145
146 values = len / (sizeof(uint32_t));
147 for (i = 0; i < values; i += 2) {
148 pin = fdt32_to_cpu(iomux_config[i]);
133 int i;
134
135 root = OF_finddevice("/");
136 len = 0;
137 parent = root;
138
139 /* Find 'iomux_config' prop in the nodes */
140 for (child = OF_child(parent); child != 0; child = OF_peer(child)) {

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149 continue;
150
151 if ((len = OF_getproplen(child, "iomux_config")) > 0) {
152 OF_getprop(child, "iomux_config", &iomux_config, len);
153
154 values = len / (sizeof(uint32_t));
155 for (i = 0; i < values; i += 2) {
156 pin = fdt32_to_cpu(iomux_config[i]);
149 mux_mode = fdt32_to_cpu(iomux_config[i+1]);
157 pin_cfg = fdt32_to_cpu(iomux_config[i+1]);
150#if 0
158#if 0
151 device_printf(sc->dev, "Set pin %d to ALT%d\n",
152 pin, mux_mode);
159 device_printf(sc->dev, "Set pin %d to 0x%08x\n",
160 pin, pin_cfg);
153#endif
161#endif
154 configure_pad(sc, IOMUXC(pin), mux_mode);
162 WRITE4(sc, IOMUXC(pin), pin_cfg);
155 }
156 }
157
158 if (OF_peer(child) == 0) {
159 /* No more siblings. */
160 child = parent;
161 parent = OF_parent(child);
162 }
163 }
164
165 return (0);
166}
167
168static int
169iomuxc_attach(device_t dev)
170{
171 struct iomuxc_softc *sc;
163 }
164 }
165
166 if (OF_peer(child) == 0) {
167 /* No more siblings. */
168 child = parent;
169 parent = OF_parent(child);
170 }
171 }
172
173 return (0);
174}
175
176static int
177iomuxc_attach(device_t dev)
178{
179 struct iomuxc_softc *sc;
172 int reg;
173
174 sc = device_get_softc(dev);
175 sc->dev = dev;
176
177 if (bus_alloc_resources(dev, iomuxc_spec, sc->tmr_res)) {
178 device_printf(dev, "could not allocate resources\n");
179 return (ENXIO);
180 }
181
182 /* Memory interface */
183 sc->bst = rman_get_bustag(sc->tmr_res[0]);
184 sc->bsh = rman_get_bushandle(sc->tmr_res[0]);
185
180
181 sc = device_get_softc(dev);
182 sc->dev = dev;
183
184 if (bus_alloc_resources(dev, iomuxc_spec, sc->tmr_res)) {
185 device_printf(dev, "could not allocate resources\n");
186 return (ENXIO);
187 }
188
189 /* Memory interface */
190 sc->bst = rman_get_bustag(sc->tmr_res[0]);
191 sc->bsh = rman_get_bushandle(sc->tmr_res[0]);
192
186 /* USB */
187 configure_pad(sc, IOMUXC_PTA17, MUX_MODE_VBUS_EN_OTG);
188 reg = (PKE | PUE | PUS_22_KOHM_PULL_UP | DSE_25_OHM | OBE);
189 WRITE4(sc, IOMUXC_PTA7, reg);
190
191 pinmux_set(sc);
192
193 return (0);
194}
195
196static device_method_t iomuxc_methods[] = {
197 DEVMETHOD(device_probe, iomuxc_probe),
198 DEVMETHOD(device_attach, iomuxc_attach),

--- 12 unchanged lines hidden --- 		193 pinmux_set(sc);
194
195 return (0);
196}
197
198static device_method_t iomuxc_methods[] = {
199 DEVMETHOD(device_probe, iomuxc_probe),
200 DEVMETHOD(device_attach, iomuxc_attach),

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