| uart_dev_at91usart.c (157570) | uart_dev_at91usart.c (158531) |
|---|---|
| 1/*- 2 * Copyright (c) 2005 M. Warner Losh | 1/*- 2 * Copyright (c) 2005 M. Warner Losh |
| 3 * Copyright (c) 2005 cognet | 3 * Copyright (c) 2005 Olivier Houchard |
| 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. --- 9 unchanged lines hidden (view full) --- 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> | 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. --- 9 unchanged lines hidden (view full) --- 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> |
| 29__FBSDID("$FreeBSD: head/sys/arm/at91/uart_dev_at91usart.c 157570 2006-04-06 20:47:54Z cognet $"); | 29__FBSDID("$FreeBSD: head/sys/arm/at91/uart_dev_at91usart.c 158531 2006-05-13 23:41:16Z cognet $"); |
| 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/conf.h> 35#include <sys/cons.h> 36#include <sys/tty.h> 37#include <machine/bus.h> --- 279 unchanged lines hidden (view full) --- 317 err = bus_dmamap_create(atsc->dmatag, 0, &atsc->rx_map); 318 if (err != 0) 319 goto errout; 320errout:; 321 // XXX bad 322 return (err); 323} 324 | 30 31#include <sys/param.h> 32#include <sys/systm.h> 33#include <sys/bus.h> 34#include <sys/conf.h> 35#include <sys/cons.h> 36#include <sys/tty.h> 37#include <machine/bus.h> --- 279 unchanged lines hidden (view full) --- 317 err = bus_dmamap_create(atsc->dmatag, 0, &atsc->rx_map); 318 if (err != 0) 319 goto errout; 320errout:; 321 // XXX bad 322 return (err); 323} 324 |
| 325#ifndef SKYEYE_WORKAROUNDS |
|
| 325static void 326at91_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 327{ 328 if (error != 0) 329 return; 330 *(bus_addr_t *)arg = segs[0].ds_addr; 331} | 326static void 327at91_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 328{ 329 if (error != 0) 330 return; 331 *(bus_addr_t *)arg = segs[0].ds_addr; 332} |
| 333#endif |
|
| 332 333 334static int 335at91_usart_bus_transmit(struct uart_softc *sc) 336{ | 334 335 336static int 337at91_usart_bus_transmit(struct uart_softc *sc) 338{ |
| 339#ifndef SKYEYE_WORKAROUNDS |
|
| 337 bus_addr_t addr; | 340 bus_addr_t addr; |
| 341#endif |
|
| 338 struct at91_usart_softc *atsc; 339 340 atsc = (struct at91_usart_softc *)sc; | 342 struct at91_usart_softc *atsc; 343 344 atsc = (struct at91_usart_softc *)sc; |
| 345#ifndef SKYEYE_WORKAROUNDS |
|
| 341 if (bus_dmamap_load(atsc->dmatag, atsc->tx_map, sc->sc_txbuf, 342 sc->sc_txdatasz, at91_getaddr, &addr, 0) != 0) 343 return (EAGAIN); 344 bus_dmamap_sync(atsc->dmatag, atsc->tx_map, BUS_DMASYNC_PREWRITE); | 346 if (bus_dmamap_load(atsc->dmatag, atsc->tx_map, sc->sc_txbuf, 347 sc->sc_txdatasz, at91_getaddr, &addr, 0) != 0) 348 return (EAGAIN); 349 bus_dmamap_sync(atsc->dmatag, atsc->tx_map, BUS_DMASYNC_PREWRITE); |
| 350#endif |
|
| 345 346 uart_lock(sc->sc_hwmtx); 347 sc->sc_txbusy = 1; | 351 352 uart_lock(sc->sc_hwmtx); 353 sc->sc_txbusy = 1; |
| 354#ifndef SKYEYE_WORKAROUNDS |
|
| 348 /* 349 * Setup the PDC to transfer the data and interrupt us when it 350 * is done. We've already requested the interrupt. 351 */ 352 WR4(&sc->sc_bas, PDC_TPR, addr); 353 WR4(&sc->sc_bas, PDC_TCR, sc->sc_txdatasz); 354 WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_TXTEN); 355 uart_unlock(sc->sc_hwmtx); | 355 /* 356 * Setup the PDC to transfer the data and interrupt us when it 357 * is done. We've already requested the interrupt. 358 */ 359 WR4(&sc->sc_bas, PDC_TPR, addr); 360 WR4(&sc->sc_bas, PDC_TCR, sc->sc_txdatasz); 361 WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_TXTEN); 362 uart_unlock(sc->sc_hwmtx); |
| 356#ifdef USART0_CONSOLE | 363#else 364 for (int i = 0; i < sc->sc_txdatasz; i++) 365 at91_usart_putc(&sc->sc_bas, sc->sc_txbuf[i]); |
| 357 /* 358 * XXX: Gross hack : Skyeye doesn't raise an interrupt once the 359 * transfer is done, so simulate it. 360 */ 361 WR4(&sc->sc_bas, USART_IER, USART_CSR_TXRDY); 362#endif 363 return (0); 364} --- 46 unchanged lines hidden (view full) --- 411} 412static int 413at91_usart_bus_ipend(struct uart_softc *sc) 414{ 415 int csr = RD4(&sc->sc_bas, USART_CSR); 416 int ipend = 0; 417 struct at91_usart_softc *atsc; 418 | 366 /* 367 * XXX: Gross hack : Skyeye doesn't raise an interrupt once the 368 * transfer is done, so simulate it. 369 */ 370 WR4(&sc->sc_bas, USART_IER, USART_CSR_TXRDY); 371#endif 372 return (0); 373} --- 46 unchanged lines hidden (view full) --- 420} 421static int 422at91_usart_bus_ipend(struct uart_softc *sc) 423{ 424 int csr = RD4(&sc->sc_bas, USART_CSR); 425 int ipend = 0; 426 struct at91_usart_softc *atsc; 427 |
| 419 atsc = (struct at91_usart_softc *)sc; 420#ifdef USART0_CONSOLE 421 /* 422 * XXX: We have to cheat for skyeye, as it will return 0xff for all 423 * the devices it doesn't emulate. 424 */ 425 if (sc->sc_bas.chan != 1) 426 return (0); 427#endif 428 | 428 atsc = (struct at91_usart_softc *)sc; |
| 429 if (csr & USART_CSR_ENDTX) { 430 bus_dmamap_sync(atsc->dmatag, atsc->tx_map, 431 BUS_DMASYNC_POSTWRITE); 432 bus_dmamap_unload(atsc->dmatag, atsc->tx_map); 433 } 434 uart_lock(sc->sc_hwmtx); 435 if (csr & USART_CSR_TXRDY && sc->sc_txbusy) 436 ipend |= SER_INT_TXIDLE; --- 54 unchanged lines hidden --- | 429 if (csr & USART_CSR_ENDTX) { 430 bus_dmamap_sync(atsc->dmatag, atsc->tx_map, 431 BUS_DMASYNC_POSTWRITE); 432 bus_dmamap_unload(atsc->dmatag, atsc->tx_map); 433 } 434 uart_lock(sc->sc_hwmtx); 435 if (csr & USART_CSR_TXRDY && sc->sc_txbusy) 436 ipend |= SER_INT_TXIDLE; --- 54 unchanged lines hidden --- |