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at91var.h (238348) at91var.h (238376)
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

--- 9 unchanged lines hidden (view full) ---

18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.

--- 9 unchanged lines hidden (view full) ---

18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26/* $FreeBSD: head/sys/arm/at91/at91var.h 238348 2012-07-10 15:02:29Z imp $ */
26/* $FreeBSD: head/sys/arm/at91/at91var.h 238376 2012-07-11 20:17:14Z imp $ */
27
28#ifndef _AT91VAR_H_
29#define _AT91VAR_H_
30
31#include <sys/bus.h>
32#include <sys/rman.h>
33
34#include <arm/at91/at91reg.h>

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69 AT91_T_SAM9G20,
70 AT91_T_SAM9G45,
71 AT91_T_SAM9N12,
72 AT91_T_SAM9RL,
73 AT91_T_SAM9X5,
74};
75
76enum at91_soc_subtype {
27
28#ifndef _AT91VAR_H_
29#define _AT91VAR_H_
30
31#include <sys/bus.h>
32#include <sys/rman.h>
33
34#include <arm/at91/at91reg.h>

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69 AT91_T_SAM9G20,
70 AT91_T_SAM9G45,
71 AT91_T_SAM9N12,
72 AT91_T_SAM9RL,
73 AT91_T_SAM9X5,
74};
75
76enum at91_soc_subtype {
77 AT91_ST_ANY = -1, /* Match any type */
77 AT91_ST_NONE = 0,
78 /* AT91RM9200 */
79 AT91_ST_RM9200_BGA,
80 AT91_ST_RM9200_PQFP,
81 /* AT91SAM9260 */
82 AT91_ST_SAM9XE,
83 /* AT91SAM9G45 */
84 AT91_ST_SAM9G45,

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99 AT91_FAMILY_RM92 = 0x92,
100};
101
102#define AT91_SOC_NAME_MAX 50
103
104typedef void (*DELAY_t)(int);
105typedef void (*cpu_reset_t)(void);
106
78 AT91_ST_NONE = 0,
79 /* AT91RM9200 */
80 AT91_ST_RM9200_BGA,
81 AT91_ST_RM9200_PQFP,
82 /* AT91SAM9260 */
83 AT91_ST_SAM9XE,
84 /* AT91SAM9G45 */
85 AT91_ST_SAM9G45,

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100 AT91_FAMILY_RM92 = 0x92,
101};
102
103#define AT91_SOC_NAME_MAX 50
104
105typedef void (*DELAY_t)(int);
106typedef void (*cpu_reset_t)(void);
107
108struct at91_soc_data {
109 DELAY_t soc_delay;
110 cpu_reset_t soc_reset;
111};
112
107struct at91_soc_info {
108 enum at91_soc_type type;
109 enum at91_soc_subtype subtype;
110 enum at91_soc_family family;
111 uint32_t cidr;
112 uint32_t exid;
113 char name[AT91_SOC_NAME_MAX];
113struct at91_soc_info {
114 enum at91_soc_type type;
115 enum at91_soc_subtype subtype;
116 enum at91_soc_family family;
117 uint32_t cidr;
118 uint32_t exid;
119 char name[AT91_SOC_NAME_MAX];
114 DELAY_t delay;
115 cpu_reset_t reset;
120 struct at91_soc_data *soc_data;
116};
117
121};
122
118extern struct at91_soc_info soc_data;
123extern struct at91_soc_info soc_info;
119
120static inline int at91_is_rm92(void);
121static inline int at91_is_sam9(void);
122static inline int at91_is_sam9xe(void);
123static inline int at91_cpu_is(u_int cpu);
124
125static inline int
126at91_is_rm92(void)
127{
128
124
125static inline int at91_is_rm92(void);
126static inline int at91_is_sam9(void);
127static inline int at91_is_sam9xe(void);
128static inline int at91_cpu_is(u_int cpu);
129
130static inline int
131at91_is_rm92(void)
132{
133
129 return (soc_data.type == AT91_T_RM9200);
134 return (soc_info.type == AT91_T_RM9200);
130}
131
132static inline int
133at91_is_sam9(void)
134{
135
135}
136
137static inline int
138at91_is_sam9(void)
139{
140
136 return (soc_data.family == AT91_FAMILY_SAM9);
141 return (soc_info.family == AT91_FAMILY_SAM9);
137}
138
139static inline int
140at91_is_sam9xe(void)
141{
142
142}
143
144static inline int
145at91_is_sam9xe(void)
146{
147
143 return (soc_data.family == AT91_FAMILY_SAM9XE);
148 return (soc_info.family == AT91_FAMILY_SAM9XE);
144}
145
146static inline int
147at91_cpu_is(u_int cpu)
148{
149
149}
150
151static inline int
152at91_cpu_is(u_int cpu)
153{
154
150 return (soc_data.type == cpu);
155 return (soc_info.type == cpu);
151}
152
153void at91_add_child(device_t dev, int prio, const char *name, int unit,
154 bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2);
155
156extern uint32_t at91_irq_system;
157extern uint32_t at91_master_clock;
158void at91_pmc_init_clock(void);
159
160#endif /* _AT91VAR_H_ */
156}
157
158void at91_add_child(device_t dev, int prio, const char *name, int unit,
159 bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2);
160
161extern uint32_t at91_irq_system;
162extern uint32_t at91_master_clock;
163void at91_pmc_init_clock(void);
164
165#endif /* _AT91VAR_H_ */