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at91sam9x5.c (238390) at91sam9x5.c (238397)
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
4 * Copyright (c) 2012 M. Warner Losh.. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
4 * Copyright (c) 2012 M. Warner Losh.. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 12 unchanged lines hidden (view full) ---

21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9x25.c 238390 2012-07-12 04:23:11Z imp $");
29__FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9x25.c 238397 2012-07-12 13:45:58Z imp $");
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/bus.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37

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42#include <arm/at91/at91soc.h>
43#include <arm/at91/at91_aicreg.h>
44#include <arm/at91/at91sam9x25reg.h>
45#include <arm/at91/at91_pitreg.h>
46#include <arm/at91/at91_pmcreg.h>
47#include <arm/at91/at91_pmcvar.h>
48#include <arm/at91/at91_rstreg.h>
49
30
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/bus.h>
34#include <sys/kernel.h>
35#include <sys/malloc.h>
36#include <sys/module.h>
37

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42#include <arm/at91/at91soc.h>
43#include <arm/at91/at91_aicreg.h>
44#include <arm/at91/at91sam9x25reg.h>
45#include <arm/at91/at91_pitreg.h>
46#include <arm/at91/at91_pmcreg.h>
47#include <arm/at91/at91_pmcvar.h>
48#include <arm/at91/at91_rstreg.h>
49
50struct at91sam9x25_softc {
51 int filler;
52};
53
54/*
55 * Standard priority levels for the system. 0 is lowest and 7 is highest.
56 * These values are the ones Atmel uses for its Linux port
57 */
58static const int at91_irq_prio[32] =
59{
60 7, /* Advanced Interrupt Controller (FIQ) */
61 7, /* System Peripherals */

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149static uint32_t
150at91_pll_outb(int freq)
151{
152
153 return (0);
154}
155
156static void
50/*
51 * Standard priority levels for the system. 0 is lowest and 7 is highest.
52 * These values are the ones Atmel uses for its Linux port
53 */
54static const int at91_irq_prio[32] =
55{
56 7, /* Advanced Interrupt Controller (FIQ) */
57 7, /* System Peripherals */

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145static uint32_t
146at91_pll_outb(int freq)
147{
148
149 return (0);
150}
151
152static void
157at91_identify(driver_t *drv, device_t parent)
153at91_clock_init(void)
158{
154{
159
160 if (soc_info.type == AT91_T_SAM9X5 && soc_info.subtype == AT91_ST_SAM9X25)
161 at91_add_child(parent, 0, "at91sam9x25", 0, 0, 0, -1, 0, 0);
162}
163
164static int
165at91_probe(device_t dev)
166{
167
168 device_set_desc(dev, "AT91SAM9X25");
169 return (0);
170}
171
172static int
173at91_attach(device_t dev)
174{
175 struct at91_pmc_clock *clk;
176
177 /* Update USB device port clock info */
178 clk = at91_pmc_clock_ref("udpck");
179 clk->pmc_mask = PMC_SCER_UDP_SAM9;
180 at91_pmc_clock_deref(clk);
181
182 /* Update USB host port clock info */

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203 clk->pll_min_out = SAM9X25_PLL_B_MIN_OUT_FREQ; /* 30 MHz */
204 clk->pll_max_out = SAM9X25_PLL_B_MAX_OUT_FREQ; /* 100 MHz */
205 clk->pll_mul_shift = SAM9X25_PLL_B_MUL_SHIFT;
206 clk->pll_mul_mask = SAM9X25_PLL_B_MUL_MASK;
207 clk->pll_div_shift = SAM9X25_PLL_B_DIV_SHIFT;
208 clk->pll_div_mask = SAM9X25_PLL_B_DIV_MASK;
209 clk->set_outb = at91_pll_outb;
210 at91_pmc_clock_deref(clk);
155 struct at91_pmc_clock *clk;
156
157 /* Update USB device port clock info */
158 clk = at91_pmc_clock_ref("udpck");
159 clk->pmc_mask = PMC_SCER_UDP_SAM9;
160 at91_pmc_clock_deref(clk);
161
162 /* Update USB host port clock info */

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183 clk->pll_min_out = SAM9X25_PLL_B_MIN_OUT_FREQ; /* 30 MHz */
184 clk->pll_max_out = SAM9X25_PLL_B_MAX_OUT_FREQ; /* 100 MHz */
185 clk->pll_mul_shift = SAM9X25_PLL_B_MUL_SHIFT;
186 clk->pll_mul_mask = SAM9X25_PLL_B_MUL_MASK;
187 clk->pll_div_shift = SAM9X25_PLL_B_DIV_SHIFT;
188 clk->pll_div_mask = SAM9X25_PLL_B_DIV_MASK;
189 clk->set_outb = at91_pll_outb;
190 at91_pmc_clock_deref(clk);
211 return (0);
212}
213
191}
192
214static device_method_t at91sam9x25_methods[] = {
215 DEVMETHOD(device_probe, at91_probe),
216 DEVMETHOD(device_attach, at91_attach),
217 DEVMETHOD(device_identify, at91_identify),
218 {0, 0},
219};
220
221static driver_t at91sam9x25_driver = {
222 "at91sam9x25",
223 at91sam9x25_methods,
224 sizeof(struct at91sam9x25_softc),
225};
226
227static devclass_t at91sam9x25_devclass;
228
229DRIVER_MODULE(at91sam9x25, atmelarm, at91sam9x25_driver, at91sam9x25_devclass, 0, 0);
230
231static struct at91_soc_data soc_data = {
232 .soc_delay = at91_pit_delay,
233 .soc_reset = at91_rst_cpu_reset,
193static struct at91_soc_data soc_data = {
194 .soc_delay = at91_pit_delay,
195 .soc_reset = at91_rst_cpu_reset,
196 .soc_clock_init = at91_clock_init,
234 .soc_irq_prio = at91_irq_prio,
197 .soc_irq_prio = at91_irq_prio,
235 .soc_childpren = at91_devs,
198 .soc_children = at91_devs,
236};
237
238AT91_SOC_SUB(AT91_T_SAM9X5, AT91_ST_SAM9X25, &soc_data);
199};
200
201AT91_SOC_SUB(AT91_T_SAM9X5, AT91_ST_SAM9X25, &soc_data);