| at91sam9g20.c (238390) | at91sam9g20.c (238397) |
|---|---|
| 1/*- 2 * Copyright (c) 2005 Olivier Houchard. All rights reserved. 3 * Copyright (c) 2010 Greg Ansley. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2005 Olivier Houchard. All rights reserved. 3 * Copyright (c) 2010 Greg Ansley. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9g20.c 238390 2012-07-12 04:23:11Z imp $"); | 28__FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9g20.c 238397 2012-07-12 13:45:58Z imp $"); |
| 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/malloc.h> 35#include <sys/module.h> 36 --- 5 unchanged lines hidden (view full) --- 42#include <arm/at91/at91soc.h> 43#include <arm/at91/at91_aicreg.h> 44#include <arm/at91/at91sam9g20reg.h> 45#include <arm/at91/at91_pitreg.h> 46#include <arm/at91/at91_pmcreg.h> 47#include <arm/at91/at91_pmcvar.h> 48#include <arm/at91/at91_rstreg.h> 49 | 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/malloc.h> 35#include <sys/module.h> 36 --- 5 unchanged lines hidden (view full) --- 42#include <arm/at91/at91soc.h> 43#include <arm/at91/at91_aicreg.h> 44#include <arm/at91/at91sam9g20reg.h> 45#include <arm/at91/at91_pitreg.h> 46#include <arm/at91/at91_pmcreg.h> 47#include <arm/at91/at91_pmcvar.h> 48#include <arm/at91/at91_rstreg.h> 49 |
| 50struct at91sam9_softc { 51 bus_space_tag_t sc_st; 52 bus_space_handle_t sc_sh; 53 bus_space_handle_t sc_matrix_sh; 54}; 55 | |
| 56/* 57 * Standard priority levels for the system. 0 is lowest and 7 is highest. 58 * These values are the ones Atmel uses for its Linux port 59 */ 60static const int at91_irq_prio[32] = 61{ 62 7, /* Advanced Interrupt Controller */ 63 7, /* System Peripherals */ --- 84 unchanged lines hidden (view full) --- 148static uint32_t 149at91_pll_outb(int freq) 150{ 151 152 return (0); 153} 154 155static void | 50/* 51 * Standard priority levels for the system. 0 is lowest and 7 is highest. 52 * These values are the ones Atmel uses for its Linux port 53 */ 54static const int at91_irq_prio[32] = 55{ 56 7, /* Advanced Interrupt Controller */ 57 7, /* System Peripherals */ --- 84 unchanged lines hidden (view full) --- 142static uint32_t 143at91_pll_outb(int freq) 144{ 145 146 return (0); 147} 148 149static void |
| 156at91_identify(driver_t *drv, device_t parent) | 150at91_clock_init(void) |
| 157{ | 151{ |
| 158 159 if (at91_cpu_is(AT91_T_SAM9G20)) 160 at91_add_child(parent, 0, "at91sam", 9, 0, 0, -1, 0, 0); 161} 162 163static int 164at91_probe(device_t dev) 165{ 166 167 device_set_desc(dev, soc_info.name); 168 return (0); 169} 170 171static int 172at91_attach(device_t dev) 173{ | |
| 174 struct at91_pmc_clock *clk; | 152 struct at91_pmc_clock *clk; |
| 175 struct at91sam9_softc *sc = device_get_softc(dev); 176 struct at91_softc *at91sc = device_get_softc(device_get_parent(dev)); 177 uint32_t i; | |
| 178 | 153 |
| 179 sc->sc_st = at91sc->sc_st; 180 sc->sc_sh = at91sc->sc_sh; 181 182 if (bus_space_subregion(sc->sc_st, sc->sc_sh, 183 AT91SAM9G20_MATRIX_BASE, AT91SAM9G20_MATRIX_SIZE, 184 &sc->sc_matrix_sh) != 0) 185 panic("Enable to map matrix registers"); 186 187 /* activate NAND*/ 188 i = bus_space_read_4(sc->sc_st, sc->sc_matrix_sh, 189 AT91SAM9G20_EBICSA); 190 bus_space_write_4(sc->sc_st, sc->sc_matrix_sh, 191 AT91SAM9G20_EBICSA, 192 i | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); 193 194 | |
| 195 /* Update USB device port clock info */ 196 clk = at91_pmc_clock_ref("udpck"); 197 clk->pmc_mask = PMC_SCER_UDP_SAM9; 198 at91_pmc_clock_deref(clk); 199 200 /* Update USB host port clock info */ 201 clk = at91_pmc_clock_ref("uhpck"); 202 clk->pmc_mask = PMC_SCER_UHP_SAM9; --- 18 unchanged lines hidden (view full) --- 221 clk->pll_min_out = SAM9G20_PLL_B_MIN_OUT_FREQ; /* 30 MHz */ 222 clk->pll_max_out = SAM9G20_PLL_B_MAX_OUT_FREQ; /* 100 MHz */ 223 clk->pll_mul_shift = SAM9G20_PLL_B_MUL_SHIFT; 224 clk->pll_mul_mask = SAM9G20_PLL_B_MUL_MASK; 225 clk->pll_div_shift = SAM9G20_PLL_B_DIV_SHIFT; 226 clk->pll_div_mask = SAM9G20_PLL_B_DIV_MASK; 227 clk->set_outb = at91_pll_outb; 228 at91_pmc_clock_deref(clk); | 154 /* Update USB device port clock info */ 155 clk = at91_pmc_clock_ref("udpck"); 156 clk->pmc_mask = PMC_SCER_UDP_SAM9; 157 at91_pmc_clock_deref(clk); 158 159 /* Update USB host port clock info */ 160 clk = at91_pmc_clock_ref("uhpck"); 161 clk->pmc_mask = PMC_SCER_UHP_SAM9; --- 18 unchanged lines hidden (view full) --- 180 clk->pll_min_out = SAM9G20_PLL_B_MIN_OUT_FREQ; /* 30 MHz */ 181 clk->pll_max_out = SAM9G20_PLL_B_MAX_OUT_FREQ; /* 100 MHz */ 182 clk->pll_mul_shift = SAM9G20_PLL_B_MUL_SHIFT; 183 clk->pll_mul_mask = SAM9G20_PLL_B_MUL_MASK; 184 clk->pll_div_shift = SAM9G20_PLL_B_DIV_SHIFT; 185 clk->pll_div_mask = SAM9G20_PLL_B_DIV_MASK; 186 clk->set_outb = at91_pll_outb; 187 at91_pmc_clock_deref(clk); |
| 229 return (0); | |
| 230} 231 | 188} 189 |
| 232static device_method_t at91_methods[] = { 233 DEVMETHOD(device_probe, at91_probe), 234 DEVMETHOD(device_attach, at91_attach), 235 DEVMETHOD(device_identify, at91_identify), 236 {0, 0}, 237}; 238 239static driver_t at91sam9_driver = { 240 "at91sam", 241 at91_methods, 242 sizeof(struct at91sam9_softc), 243}; 244 245static devclass_t at91sam9_devclass; 246 247DRIVER_MODULE(at91sam, atmelarm, at91sam9_driver, at91sam9_devclass, 0, 0); 248 | |
| 249static struct at91_soc_data soc_data = { 250 .soc_delay = at91_pit_delay, 251 .soc_reset = at91_rst_cpu_reset, | 190static struct at91_soc_data soc_data = { 191 .soc_delay = at91_pit_delay, 192 .soc_reset = at91_rst_cpu_reset, |
| 193 .soc_clock_init = at91_clock_init, |
|
| 252 .soc_irq_prio = at91_irq_prio, | 194 .soc_irq_prio = at91_irq_prio, |
| 253 .soc_childpren = at91_devs, | 195 .soc_children = at91_devs, |
| 254}; 255 256AT91_SOC(AT91_T_SAM9G20, &soc_data); | 196}; 197 198AT91_SOC(AT91_T_SAM9G20, &soc_data); |