28c28
< __FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9260.c 213498 2010-10-06 22:40:27Z cognet $");
---
> __FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9260.c 234281 2012-04-14 11:29:32Z marius $");
96c96
< #define DEVICE(_name, _id, _unit) \
---
> #define DEVICE(_name, _id, _unit) \
160c160
< if (addr != 0 && addr < AT91SAM9260_BASE)
---
> if (addr != 0 && addr < AT91SAM9260_BASE)
185c185
< else
---
> else
191a192
>
229c230
< /*
---
> /*
250c251
< bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
---
> bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
279c280
< AT91SAM9260_EBICSA,
---
> AT91SAM9260_EBICSA,
282d282
<
307,311c307,312
< * Fudge MAX pll in frequence down below 3.0 Mhz to ensure
< * PMC alogrithm choose the divisor that causes the input clock
< * to be near the optimal 2 Mhz per datasheet. We know
< * we are going to be using this for the USB clock at 96 Mhz.
< * Causes no extra frequency deviation for all recomended crystal values.
---
> * Fudge MAX pll in frequence down below 3.0 MHz to ensure
> * PMC alogrithm choose the divisor that causes the input clock
> * to be near the optimal 2 MHz per datasheet. We know
> * we are going to be using this for the USB clock at 96 MHz.
> * Causes no extra frequency deviation for all recomended crystal
> * values.
332c333
< {0, 0},
---
> DEVMETHOD_END
343c344,345
< DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass, 0, 0);
---
> DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass,
> NULL, NULL);
< __FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9260.c 213498 2010-10-06 22:40:27Z cognet $");
---
> __FBSDID("$FreeBSD: head/sys/arm/at91/at91sam9260.c 234281 2012-04-14 11:29:32Z marius $");
96c96
< #define DEVICE(_name, _id, _unit) \
---
> #define DEVICE(_name, _id, _unit) \
160c160
< if (addr != 0 && addr < AT91SAM9260_BASE)
---
> if (addr != 0 && addr < AT91SAM9260_BASE)
185c185
< else
---
> else
191a192
>
229c230
< /*
---
> /*
250c251
< bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
---
> bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_SVR +
279c280
< AT91SAM9260_EBICSA,
---
> AT91SAM9260_EBICSA,
282d282
<
307,311c307,312
< * Fudge MAX pll in frequence down below 3.0 Mhz to ensure
< * PMC alogrithm choose the divisor that causes the input clock
< * to be near the optimal 2 Mhz per datasheet. We know
< * we are going to be using this for the USB clock at 96 Mhz.
< * Causes no extra frequency deviation for all recomended crystal values.
---
> * Fudge MAX pll in frequence down below 3.0 MHz to ensure
> * PMC alogrithm choose the divisor that causes the input clock
> * to be near the optimal 2 MHz per datasheet. We know
> * we are going to be using this for the USB clock at 96 MHz.
> * Causes no extra frequency deviation for all recomended crystal
> * values.
332c333
< {0, 0},
---
> DEVMETHOD_END
343c344,345
< DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass, 0, 0);
---
> DRIVER_MODULE(at91sam9260, atmelarm, at91sam9260_driver, at91sam9260_devclass,
> NULL, NULL);