at91rm9200.c (238390) | at91rm9200.c (238397) |
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1/*- 2 * Copyright (c) 2005 Olivier Houchard. All rights reserved. 3 * Copyright (c) 2010 Greg Ansley. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2005 Olivier Houchard. All rights reserved. 3 * Copyright (c) 2010 Greg Ansley. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/arm/at91/at91rm9200.c 238390 2012-07-12 04:23:11Z imp $"); | 28__FBSDID("$FreeBSD: head/sys/arm/at91/at91rm9200.c 238397 2012-07-12 13:45:58Z imp $"); |
29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/malloc.h> 35#include <sys/module.h> 36 --- 4 unchanged lines hidden (view full) --- 41#include <arm/at91/at91reg.h> 42#include <arm/at91/at91rm92reg.h> 43#include <arm/at91/at91_aicreg.h> 44#include <arm/at91/at91_pmcreg.h> 45#include <arm/at91/at91_streg.h> 46#include <arm/at91/at91_pmcvar.h> 47#include <arm/at91/at91soc.h> 48 | 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/kernel.h> 34#include <sys/malloc.h> 35#include <sys/module.h> 36 --- 4 unchanged lines hidden (view full) --- 41#include <arm/at91/at91reg.h> 42#include <arm/at91/at91rm92reg.h> 43#include <arm/at91/at91_aicreg.h> 44#include <arm/at91/at91_pmcreg.h> 45#include <arm/at91/at91_streg.h> 46#include <arm/at91/at91_pmcvar.h> 47#include <arm/at91/at91soc.h> 48 |
49 50struct at91rm92_softc { 51 device_t dev; 52 bus_space_tag_t sc_st; 53 bus_space_handle_t sc_sh; 54 bus_space_handle_t sc_sys_sh; 55 bus_space_handle_t sc_aic_sh; 56}; | |
57/* 58 * Standard priority levels for the system. 0 is lowest and 7 is highest. 59 * These values are the ones Atmel uses for its Linux port, which differ 60 * a little form the ones that are in the standard distribution. Also, 61 * the ones marked with 'TWEEK' are different based on experience. 62 */ 63static const int at91_irq_prio[32] = 64{ --- 77 unchanged lines hidden (view full) --- 142{ 143 144 if (freq > 155000000) 145 return (0x0000); 146 else 147 return (0x8000); 148} 149 | 49/* 50 * Standard priority levels for the system. 0 is lowest and 7 is highest. 51 * These values are the ones Atmel uses for its Linux port, which differ 52 * a little form the ones that are in the standard distribution. Also, 53 * the ones marked with 'TWEEK' are different based on experience. 54 */ 55static const int at91_irq_prio[32] = 56{ --- 77 unchanged lines hidden (view full) --- 134{ 135 136 if (freq > 155000000) 137 return (0x0000); 138 else 139 return (0x8000); 140} 141 |
150static void 151at91_identify(driver_t *drv, device_t parent) 152{ 153 154 if (at91_cpu_is(AT91_T_RM9200)) 155 at91_add_child(parent, 0, "at91rm920", 0, 0, 0, -1, 0, 0); 156} 157 158static int 159at91_probe(device_t dev) 160{ 161 162 device_set_desc(dev, soc_info.name); 163 return (0); 164} 165 166static int 167at91_attach(device_t dev) 168{ 169 struct at91_pmc_clock *clk; 170 struct at91rm92_softc *sc = device_get_softc(dev); 171 struct at91_softc *at91sc = device_get_softc(device_get_parent(dev)); 172 173 sc->sc_st = at91sc->sc_st; 174 sc->sc_sh = at91sc->sc_sh; 175 sc->dev = dev; 176 177 if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_SYS_BASE, 178 AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0) 179 panic("Enable to map system registers"); 180 | 142#if 0 143/* -- XXX are these needed? */ |
181 /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */ 182 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff); 183 184 /* Disable all interrupts for the SDRAM controller */ 185 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff); | 144 /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */ 145 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff); 146 147 /* Disable all interrupts for the SDRAM controller */ 148 bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff); |
149#endif |
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186 | 150 |
151static void 152at91_clock_init(void) 153{ 154 struct at91_pmc_clock *clk; 155 |
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187 /* Update USB device port clock info */ 188 clk = at91_pmc_clock_ref("udpck"); 189 clk->pmc_mask = PMC_SCER_UDP; 190 at91_pmc_clock_deref(clk); 191 192 /* Update USB host port clock info */ 193 clk = at91_pmc_clock_ref("uhpck"); 194 clk->pmc_mask = PMC_SCER_UHP; --- 18 unchanged lines hidden (view full) --- 213 clk->pll_min_out = RM9200_PLL_B_MIN_OUT_FREQ; /* 30 MHz */ 214 clk->pll_max_out = RM9200_PLL_B_MAX_OUT_FREQ; /* 240 MHz */ 215 clk->pll_mul_shift = RM9200_PLL_B_MUL_SHIFT; 216 clk->pll_mul_mask = RM9200_PLL_B_MUL_MASK; 217 clk->pll_div_shift = RM9200_PLL_B_DIV_SHIFT; 218 clk->pll_div_mask = RM9200_PLL_B_DIV_MASK; 219 clk->set_outb = at91_pll_outb; 220 at91_pmc_clock_deref(clk); | 156 /* Update USB device port clock info */ 157 clk = at91_pmc_clock_ref("udpck"); 158 clk->pmc_mask = PMC_SCER_UDP; 159 at91_pmc_clock_deref(clk); 160 161 /* Update USB host port clock info */ 162 clk = at91_pmc_clock_ref("uhpck"); 163 clk->pmc_mask = PMC_SCER_UHP; --- 18 unchanged lines hidden (view full) --- 182 clk->pll_min_out = RM9200_PLL_B_MIN_OUT_FREQ; /* 30 MHz */ 183 clk->pll_max_out = RM9200_PLL_B_MAX_OUT_FREQ; /* 240 MHz */ 184 clk->pll_mul_shift = RM9200_PLL_B_MUL_SHIFT; 185 clk->pll_mul_mask = RM9200_PLL_B_MUL_MASK; 186 clk->pll_div_shift = RM9200_PLL_B_DIV_SHIFT; 187 clk->pll_div_mask = RM9200_PLL_B_DIV_MASK; 188 clk->set_outb = at91_pll_outb; 189 at91_pmc_clock_deref(clk); |
221 222 return (0); | |
223} 224 | 190} 191 |
225static device_method_t at91_methods[] = { 226 DEVMETHOD(device_probe, at91_probe), 227 DEVMETHOD(device_attach, at91_attach), 228 DEVMETHOD(device_identify, at91_identify), 229 {0, 0}, 230}; 231 232static driver_t at91rm92_driver = { 233 "at91rm920", 234 at91_methods, 235 sizeof(struct at91rm92_softc), 236}; 237 238static devclass_t at91rm92_devclass; 239 240DRIVER_MODULE(at91rm920, atmelarm, at91rm92_driver, at91rm92_devclass, 0, 0); 241 | |
242static struct at91_soc_data soc_data = { 243 .soc_delay = at91_st_delay, 244 .soc_reset = at91_st_cpu_reset, | 192static struct at91_soc_data soc_data = { 193 .soc_delay = at91_st_delay, 194 .soc_reset = at91_st_cpu_reset, |
195 .soc_clock_init = at91_clock_init, |
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245 .soc_irq_prio = at91_irq_prio, 246 .soc_children = at91_devs, 247}; 248 249AT91_SOC(AT91_T_RM9200, &soc_data); | 196 .soc_irq_prio = at91_irq_prio, 197 .soc_children = at91_devs, 198}; 199 200AT91_SOC(AT91_T_RM9200, &soc_data); |