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at91rm9200.c (238358) at91rm9200.c (238376)
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 11 unchanged lines hidden (view full) ---

20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/arm/at91/at91rm9200.c 238358 2012-07-10 23:11:52Z imp $");
28__FBSDID("$FreeBSD: head/sys/arm/at91/at91rm9200.c 238376 2012-07-11 20:17:14Z imp $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/kernel.h>
34#include <sys/malloc.h>
35#include <sys/module.h>
36
37#define _ARM32_BUS_DMA_PRIVATE
38#include <machine/bus.h>
39
40#include <arm/at91/at91var.h>
41#include <arm/at91/at91reg.h>
42#include <arm/at91/at91rm92reg.h>
43#include <arm/at91/at91_aicreg.h>
44#include <arm/at91/at91_pmcreg.h>
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/kernel.h>
34#include <sys/malloc.h>
35#include <sys/module.h>
36
37#define _ARM32_BUS_DMA_PRIVATE
38#include <machine/bus.h>
39
40#include <arm/at91/at91var.h>
41#include <arm/at91/at91reg.h>
42#include <arm/at91/at91rm92reg.h>
43#include <arm/at91/at91_aicreg.h>
44#include <arm/at91/at91_pmcreg.h>
45#include <arm/at91/at91_streg.h>
45#include <arm/at91/at91_pmcvar.h>
46#include <arm/at91/at91_pmcvar.h>
47#include <arm/at91/at91soc.h>
46
48
49
47struct at91rm92_softc {
48 device_t dev;
49 bus_space_tag_t sc_st;
50 bus_space_handle_t sc_sh;
51 bus_space_handle_t sc_sys_sh;
52 bus_space_handle_t sc_aic_sh;
53};
54/*

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166 at91_cpu_add_builtin_children(parent);
167 }
168}
169
170static int
171at91_probe(device_t dev)
172{
173
50struct at91rm92_softc {
51 device_t dev;
52 bus_space_tag_t sc_st;
53 bus_space_handle_t sc_sh;
54 bus_space_handle_t sc_sys_sh;
55 bus_space_handle_t sc_aic_sh;
56};
57/*

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169 at91_cpu_add_builtin_children(parent);
170 }
171}
172
173static int
174at91_probe(device_t dev)
175{
176
174 device_set_desc(dev, soc_data.name);
177 device_set_desc(dev, soc_info.name);
175 return (0);
176}
177
178static int
179at91_attach(device_t dev)
180{
181 struct at91_pmc_clock *clk;
182 struct at91rm92_softc *sc = device_get_softc(dev);

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272 "at91rm920",
273 at91_methods,
274 sizeof(struct at91rm92_softc),
275};
276
277static devclass_t at91rm92_devclass;
278
279DRIVER_MODULE(at91rm920, atmelarm, at91rm92_driver, at91rm92_devclass, 0, 0);
178 return (0);
179}
180
181static int
182at91_attach(device_t dev)
183{
184 struct at91_pmc_clock *clk;
185 struct at91rm92_softc *sc = device_get_softc(dev);

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275 "at91rm920",
276 at91_methods,
277 sizeof(struct at91rm92_softc),
278};
279
280static devclass_t at91rm92_devclass;
281
282DRIVER_MODULE(at91rm920, atmelarm, at91rm92_driver, at91rm92_devclass, 0, 0);
283
284static struct at91_soc_data soc_data = {
285 .soc_delay = at91_st_delay,
286 .soc_reset = at91_st_cpu_reset
287};
288
289AT91_SOC(AT91_T_RM9200, &soc_data);