| at91_pioreg.h (256281) | at91_pioreg.h (259378) |
|---|---|
| 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 9 unchanged lines hidden (view full) --- 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 | 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 9 unchanged lines hidden (view full) --- 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 |
| 26/* $FreeBSD: stable/10/sys/arm/at91/at91_pioreg.h 235271 2012-05-11 14:40:25Z imp $ */ | 26/* $FreeBSD: stable/10/sys/arm/at91/at91_pioreg.h 259378 2013-12-14 01:14:38Z ian $ */ |
| 27 28#ifndef ARM_AT91_AT91_PIOREG_H 29#define ARM_AT91_AT91_PIOREG_H 30 31#ifndef ATMEL_ENV 32/* Registers */ 33#define PIO_PER 0x00 /* PIO Enable Register */ 34#define PIO_PDR 0x04 /* PIO Disable Register */ --- 124 unchanged lines hidden (view full) --- 159#define AT91C_PIO_PC24 ((unsigned int) 1 << 24) // Pin Controlled by PC24 160#define AT91C_PIO_PC25 ((unsigned int) 1 << 25) // Pin Controlled by PC25 161#define AT91C_PIO_PC26 ((unsigned int) 1 << 26) // Pin Controlled by PC26 162#define AT91C_PIO_PC27 ((unsigned int) 1 << 27) // Pin Controlled by PC27 163#define AT91C_PIO_PC28 ((unsigned int) 1 << 28) // Pin Controlled by PC28 164#define AT91C_PIO_PC29 ((unsigned int) 1 << 29) // Pin Controlled by PC29 165#define AT91C_PIO_PC30 ((unsigned int) 1 << 30) // Pin Controlled by PC30 166#define AT91C_PIO_PC31 ((unsigned int) 1 << 31) // Pin Controlled by PC31 | 27 28#ifndef ARM_AT91_AT91_PIOREG_H 29#define ARM_AT91_AT91_PIOREG_H 30 31#ifndef ATMEL_ENV 32/* Registers */ 33#define PIO_PER 0x00 /* PIO Enable Register */ 34#define PIO_PDR 0x04 /* PIO Disable Register */ --- 124 unchanged lines hidden (view full) --- 159#define AT91C_PIO_PC24 ((unsigned int) 1 << 24) // Pin Controlled by PC24 160#define AT91C_PIO_PC25 ((unsigned int) 1 << 25) // Pin Controlled by PC25 161#define AT91C_PIO_PC26 ((unsigned int) 1 << 26) // Pin Controlled by PC26 162#define AT91C_PIO_PC27 ((unsigned int) 1 << 27) // Pin Controlled by PC27 163#define AT91C_PIO_PC28 ((unsigned int) 1 << 28) // Pin Controlled by PC28 164#define AT91C_PIO_PC29 ((unsigned int) 1 << 29) // Pin Controlled by PC29 165#define AT91C_PIO_PC30 ((unsigned int) 1 << 30) // Pin Controlled by PC30 166#define AT91C_PIO_PC31 ((unsigned int) 1 << 31) // Pin Controlled by PC31 |
| 167#define AT91C_PIO_PD0 ((unsigned int) 1 << 0) // Pin Controlled by PD0 168#define AT91C_PIO_PD1 ((unsigned int) 1 << 1) // Pin Controlled by PD1 169#define AT91C_PIO_PD2 ((unsigned int) 1 << 2) // Pin Controlled by PD2 170#define AT91C_PIO_PD3 ((unsigned int) 1 << 3) // Pin Controlled by PD3 171#define AT91C_PIO_PD4 ((unsigned int) 1 << 4) // Pin Controlled by PD4 172#define AT91C_PIO_PD5 ((unsigned int) 1 << 5) // Pin Controlled by PD5 173#define AT91C_PIO_PD6 ((unsigned int) 1 << 6) // Pin Controlled by PD6 174#define AT91C_PIO_PD7 ((unsigned int) 1 << 7) // Pin Controlled by PD7 175#define AT91C_PIO_PD8 ((unsigned int) 1 << 8) // Pin Controlled by PD8 176#define AT91C_PIO_PD9 ((unsigned int) 1 << 9) // Pin Controlled by PD9 177#define AT91C_PIO_PD10 ((unsigned int) 1 << 10) // Pin Controlled by PD10 178#define AT91C_PIO_PD11 ((unsigned int) 1 << 11) // Pin Controlled by PD11 179#define AT91C_PIO_PD12 ((unsigned int) 1 << 12) // Pin Controlled by PD12 180#define AT91C_PIO_PD13 ((unsigned int) 1 << 13) // Pin Controlled by PD13 181#define AT91C_PIO_PD14 ((unsigned int) 1 << 14) // Pin Controlled by PD14 182#define AT91C_PIO_PD15 ((unsigned int) 1 << 15) // Pin Controlled by PD15 183#define AT91C_PIO_PD16 ((unsigned int) 1 << 16) // Pin Controlled by PD16 184#define AT91C_PIO_PD17 ((unsigned int) 1 << 17) // Pin Controlled by PD17 185#define AT91C_PIO_PD18 ((unsigned int) 1 << 18) // Pin Controlled by PD18 186#define AT91C_PIO_PD19 ((unsigned int) 1 << 19) // Pin Controlled by PD19 187#define AT91C_PIO_PD20 ((unsigned int) 1 << 20) // Pin Controlled by PD20 188#define AT91C_PIO_PD21 ((unsigned int) 1 << 21) // Pin Controlled by PD21 189#define AT91C_PIO_PD22 ((unsigned int) 1 << 22) // Pin Controlled by PD22 190#define AT91C_PIO_PD23 ((unsigned int) 1 << 23) // Pin Controlled by PD23 191#define AT91C_PIO_PD24 ((unsigned int) 1 << 24) // Pin Controlled by PD24 192#define AT91C_PIO_PD25 ((unsigned int) 1 << 25) // Pin Controlled by PD25 193#define AT91C_PIO_PD26 ((unsigned int) 1 << 26) // Pin Controlled by PD26 194#define AT91C_PIO_PD27 ((unsigned int) 1 << 27) // Pin Controlled by PD27 195#define AT91C_PIO_PD28 ((unsigned int) 1 << 28) // Pin Controlled by PD28 196#define AT91C_PIO_PD29 ((unsigned int) 1 << 29) // Pin Controlled by PD29 197#define AT91C_PIO_PD30 ((unsigned int) 1 << 30) // Pin Controlled by PD30 198#define AT91C_PIO_PD31 ((unsigned int) 1 << 31) // Pin Controlled by PD31 199#define AT91C_PIO_PE0 ((unsigned int) 1 << 0) // Pin Controlled by PE0 200#define AT91C_PIO_PE1 ((unsigned int) 1 << 1) // Pin Controlled by PE1 201#define AT91C_PIO_PE2 ((unsigned int) 1 << 2) // Pin Controlled by PE2 202#define AT91C_PIO_PE3 ((unsigned int) 1 << 3) // Pin Controlled by PE3 203#define AT91C_PIO_PE4 ((unsigned int) 1 << 4) // Pin Controlled by PE4 204#define AT91C_PIO_PE5 ((unsigned int) 1 << 5) // Pin Controlled by PE5 205#define AT91C_PIO_PE6 ((unsigned int) 1 << 6) // Pin Controlled by PE6 206#define AT91C_PIO_PE7 ((unsigned int) 1 << 7) // Pin Controlled by PE7 207#define AT91C_PIO_PE8 ((unsigned int) 1 << 8) // Pin Controlled by PE8 208#define AT91C_PIO_PE9 ((unsigned int) 1 << 9) // Pin Controlled by PE9 209#define AT91C_PIO_PE10 ((unsigned int) 1 << 10) // Pin Controlled by PE10 210#define AT91C_PIO_PE11 ((unsigned int) 1 << 11) // Pin Controlled by PE11 211#define AT91C_PIO_PE12 ((unsigned int) 1 << 12) // Pin Controlled by PE12 212#define AT91C_PIO_PE13 ((unsigned int) 1 << 13) // Pin Controlled by PE13 213#define AT91C_PIO_PE14 ((unsigned int) 1 << 14) // Pin Controlled by PE14 214#define AT91C_PIO_PE15 ((unsigned int) 1 << 15) // Pin Controlled by PE15 215#define AT91C_PIO_PE16 ((unsigned int) 1 << 16) // Pin Controlled by PE16 216#define AT91C_PIO_PE17 ((unsigned int) 1 << 17) // Pin Controlled by PE17 217#define AT91C_PIO_PE18 ((unsigned int) 1 << 18) // Pin Controlled by PE18 218#define AT91C_PIO_PE19 ((unsigned int) 1 << 19) // Pin Controlled by PE19 219#define AT91C_PIO_PE20 ((unsigned int) 1 << 20) // Pin Controlled by PE20 220#define AT91C_PIO_PE21 ((unsigned int) 1 << 21) // Pin Controlled by PE21 221#define AT91C_PIO_PE22 ((unsigned int) 1 << 22) // Pin Controlled by PE22 222#define AT91C_PIO_PE23 ((unsigned int) 1 << 23) // Pin Controlled by PE23 223#define AT91C_PIO_PE24 ((unsigned int) 1 << 24) // Pin Controlled by PE24 224#define AT91C_PIO_PE25 ((unsigned int) 1 << 25) // Pin Controlled by PE25 225#define AT91C_PIO_PE26 ((unsigned int) 1 << 26) // Pin Controlled by PE26 226#define AT91C_PIO_PE27 ((unsigned int) 1 << 27) // Pin Controlled by PE27 227#define AT91C_PIO_PE28 ((unsigned int) 1 << 28) // Pin Controlled by PE28 228#define AT91C_PIO_PE29 ((unsigned int) 1 << 29) // Pin Controlled by PE29 229#define AT91C_PIO_PE30 ((unsigned int) 1 << 30) // Pin Controlled by PE30 230#define AT91C_PIO_PE31 ((unsigned int) 1 << 31) // Pin Controlled by PE31 |
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| 167 168#endif /* ARM_AT91_AT91_PIOREG_H */ | 231 232#endif /* ARM_AT91_AT91_PIOREG_H */ |