at91_pioreg.h (213496) | at91_pioreg.h (235271) |
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1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 9 unchanged lines hidden (view full) --- 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 | 1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. --- 9 unchanged lines hidden (view full) --- 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 |
26/* $FreeBSD: head/sys/arm/at91/at91_pioreg.h 213496 2010-10-06 22:25:21Z cognet $ */ | 26/* $FreeBSD: head/sys/arm/at91/at91_pioreg.h 235271 2012-05-11 14:40:25Z imp $ */ |
27 28#ifndef ARM_AT91_AT91_PIOREG_H 29#define ARM_AT91_AT91_PIOREG_H 30 | 27 28#ifndef ARM_AT91_AT91_PIOREG_H 29#define ARM_AT91_AT91_PIOREG_H 30 |
31#ifndef ATMEL_ENV |
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31/* Registers */ 32#define PIO_PER 0x00 /* PIO Enable Register */ 33#define PIO_PDR 0x04 /* PIO Disable Register */ 34#define PIO_PSR 0x08 /* PIO Status Register */ 35 /* 0x0c reserved */ 36#define PIO_OER 0x10 /* PIO Output Enable Register */ 37#define PIO_ODR 0x14 /* PIO Output Disable Register */ 38#define PIO_OSR 0x18 /* PIO Output Status Register */ --- 21 unchanged lines hidden (view full) --- 60#define PIO_ASR 0x70 /* PIO Peripheral A Select Register */ 61#define PIO_BSR 0x74 /* PIO Peripheral B Select Register */ 62#define PIO_ABSR 0x78 /* PIO AB Status Register */ 63 /* 0x7c-0x9c reserved */ 64#define PIO_OWER 0xa0 /* PIO Output Write Enable Register */ 65#define PIO_OWDR 0xa4 /* PIO Output Write Disable Register */ 66#define PIO_OWSR 0xa8 /* PIO Output Write Status Register */ 67 /* 0xac reserved */ | 32/* Registers */ 33#define PIO_PER 0x00 /* PIO Enable Register */ 34#define PIO_PDR 0x04 /* PIO Disable Register */ 35#define PIO_PSR 0x08 /* PIO Status Register */ 36 /* 0x0c reserved */ 37#define PIO_OER 0x10 /* PIO Output Enable Register */ 38#define PIO_ODR 0x14 /* PIO Output Disable Register */ 39#define PIO_OSR 0x18 /* PIO Output Status Register */ --- 21 unchanged lines hidden (view full) --- 61#define PIO_ASR 0x70 /* PIO Peripheral A Select Register */ 62#define PIO_BSR 0x74 /* PIO Peripheral B Select Register */ 63#define PIO_ABSR 0x78 /* PIO AB Status Register */ 64 /* 0x7c-0x9c reserved */ 65#define PIO_OWER 0xa0 /* PIO Output Write Enable Register */ 66#define PIO_OWDR 0xa4 /* PIO Output Write Disable Register */ 67#define PIO_OWSR 0xa8 /* PIO Output Write Status Register */ 68 /* 0xac reserved */ |
69#endif |
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68 69#define AT91C_PIO_PA0 ((unsigned int) 1 << 0) // Pin Controlled by PA0 70#define AT91C_PIO_PA1 ((unsigned int) 1 << 1) // Pin Controlled by PA1 71#define AT91C_PIO_PA2 ((unsigned int) 1 << 2) // Pin Controlled by PA2 72#define AT91C_PIO_PA3 ((unsigned int) 1 << 3) // Pin Controlled by PA3 73#define AT91C_PIO_PA4 ((unsigned int) 1 << 4) // Pin Controlled by PA4 74#define AT91C_PIO_PA5 ((unsigned int) 1 << 5) // Pin Controlled by PA5 75#define AT91C_PIO_PA6 ((unsigned int) 1 << 6) // Pin Controlled by PA6 --- 91 unchanged lines hidden --- | 70 71#define AT91C_PIO_PA0 ((unsigned int) 1 << 0) // Pin Controlled by PA0 72#define AT91C_PIO_PA1 ((unsigned int) 1 << 1) // Pin Controlled by PA1 73#define AT91C_PIO_PA2 ((unsigned int) 1 << 2) // Pin Controlled by PA2 74#define AT91C_PIO_PA3 ((unsigned int) 1 << 3) // Pin Controlled by PA3 75#define AT91C_PIO_PA4 ((unsigned int) 1 << 4) // Pin Controlled by PA4 76#define AT91C_PIO_PA5 ((unsigned int) 1 << 5) // Pin Controlled by PA5 77#define AT91C_PIO_PA6 ((unsigned int) 1 << 6) // Pin Controlled by PA6 --- 91 unchanged lines hidden --- |